XC61CN2502MR [TOREX]
Power Supply Support Circuit, Fixed, 1 Channel, +2.5VV, CMOS, PDSO3, ROHS COMPLIANT, SOT-23, 3 PIN;
| 型号： | XC61CN2502MR |
| 厂家： | 
Torex Semiconductor |
| 描述： | Power Supply Support Circuit, Fixed, 1 Channel, +2.5VV, CMOS, PDSO3, ROHS COMPLIANT, SOT-23, 3 PIN 光电二极管 |
| 文件： | 总14页 (文件大小：286K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 143
Series
Standard Voltage Detectors（VDF=1.6V～6.0V）�
ꢁCMOS
■Applications
ꢀMicroprocessor reset circuitry
ꢁHighly Accurate : ±±2
2
ꢀMemory battery back-up circuits
ꢀPower-on reset circuits
ꢁLow Power Consumption : 0.7µA (VIN = 1.5V)
ꢁUltra small SSOT-±4 (SC-8±) Package
ꢀPower failure detection
ꢀSystem battery life and charge voltage monitors
■General Description
■Features
The XC61C series are highly precise, low power consumption
voltage detectors, manufactured using CMOS and laser trimming
technologies. Detect voltage is extremely accurate with minimal
temperature drift.
Highly accurate
:
2%
Low power consumption : TYP 0.7 µA [ VIN=1.5V ]
Detect voltage range : 1.6V ~ 6.0V in 0.1V increments
Operating voltage range : 0.7V ~ 10.0V
Detect voltage temperature characteristics
: TYP 100ppm/°C
Both CMOS and N-channel open drain output configurations are
available.
Output configuration
Ultra small package
: N-channel open drain or CMOS
: SSOT-24 (150mW) super mini-mold
: SOT-23 (150mW) mini-mold
: SOT-89 (500mW) mini-power mold
: TO-92 (300mW)
■Typical Application Circuits
R
100kΩ
VIN
VIN
VIN
VIN
VOUT
VOUT
VSS
VSS
CMOS Output
N-ch Open Drain Output
■Typical Performance Characteristic
SUPPLY CURRENT vs. INPUT VOLTAGE
ＸＣ６１ＣＣ４５０２ (４.５Ｖ)
3.5
3.0
2.5
2.0
Ta=85℃�
25℃�
1.5
1.0
-40℃�
0.5
0
0
2
4
6
8
10
Input Voltage: VIN (V)
143
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 144
XC61C Series
■Pin Configuration
■Pin Assignment
VIN
３�
VSS
４�
NC
PIN NUMBER
PIN
３�
FUNCTION
SSOT-24
SOT-23
SOT-89
TO-92 (T) TO-92 (L) NAME
2
4
1
3
3
2
1
-
2
3
1
-
2
3
1
-
1
2
3
-
V
V
IN
Supply Voltage Input
Ground
SS
1
２�
VIN
２�
VSS
SOT-23
(TOP VIEW)
1
VOUT
VOUT
Output
VOUT
SSOT-24(SC-82)
(TOP VIEW)
NC
No Connection
2
1
２�
VIN
３�
VSS
VOUT
SOT-89
(TOP VIEW)
1
2
3
1
2
3
VOUTꢀ
VIN
ꢀ
VSS
VIN
VSS
VOUT
TO-92 (T Type)�
（TOP VIEW）�
TO-92 (L Type)�
（TOP VIEW）�
■Product Classification
ꢀOrdering Information
XC61C xx xx x x x
a
b c d e f
DESIGNATOR
a
DESCRIPTION
Output Configuration :
C = CMOS
N = N-ch open drain
Detect Voltage :
25 = 2.5V
38 = 3.8V
Output Delay :
0 = No delay
DESIGNATOR
DESCRIPTION
Package Type:
N = SSOT-24 (SC-82)
M = SOT-23
P= SOT-89
T = TO-92 (Standard)
L = TO-92 (Custom Pin Configuration)
Device Orientation :
R = Embossed Tape ( Right )
L = Embossed Tape ( Left )
H = Paper Type ( TO-92)
B = Bag ( TO-92 )
e
b
c
d
f
Detect Accuracy :
2 = within 2.0%
144
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 145
XC61C
Series
■Packaging Information
ꢀSSOT-24 (SC-82)
D
e
C
b
2
b1
SIZEꢀmm
TYP
MIN
MAX
A
A1
A2
b
0.80
0.00
0.80
0.15
0.25
0.075
1.80
1.15
1.80
1.10
0.10
1.10
0.10
1.00
0.30
0.40
0.225
2.20
1.45
2.40
1.50
0.25
0.35
0.125
2.00
1.25
2.10
1.30
0.30
b1
C
D
E
y
He
e
L
y
0.10
ꢀSOT-23
+0.1�
-0.05
+0.1�
-0.05
0.15
0.4
0～0.1
（0.95）�
1.1±0.1
1.9±0.2
2.9±0.2
145
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 146
XC61C Series
ꢀSOT-89
1.5±0.1
4.5±0.1
+0.15�
-0.2
1.6
2
+0.03�
-0.02
0.4
0.42±0.06
0.42±0.06
0.47±0.06
1.5±0.1 1.5±0.1
ꢀTO-92
+0.35�
-0.45
4.65
3.7±0.3
0.45±0.1
0.4±0.05
+0.4�
�
+0.4�
2.5
2.5
-0.1
�
-0.1
146
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 147
XC61C
Series
■Marking
ꢀSSOT-24, SOT-23, SOT-89
w
q
r
e
q
w e r
q
w r
SOT - 23
TOP VIEW
SOT - 89
)
TOP VIEW
SSOT-24(SC-82)
(TOP VIEW)
(
)
(
2
q Represents the integer of the Output Voltage and Detect Voltage
DESIGNATOR
CONFIGURATION
CMOS
VOLTAGE (V)
0.w
DESIGNATOR
CONFIGURATION
VOLTAGE (V)
A
B
C
D
E
F
K
L
0.w
1.w
2.w
3.w
4.w
5.w
6.w
N-ch
N-ch
N-ch
N-ch
N-ch
N-ch
N-ch
1.w
2.w
3.w
4.w
5.w
6.w
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
M
N
P
R
S
H
w
Represents the decimal number of the Detect Voltage
e
r
Based on Internal Standards
( SSOT-24 excepted )
DESIGNATOR
VOLTAGE
q.0
DESIGNATOR
VOLTAGE
q.5
DESIGNATOR
0
1
2
3
4
5
6
7
8
9
3
q.1
q.6
q.2
q.7
q.3
q.8
Represents the assembly lot no.
Based on internal standards
q.4
q.9
ꢀTO-92
w
Represents the Detect Voltage
DESIGNATOR
q
Represents the output �
configuration
1
L
7
61C
1
5
7
61C
VOLTAGE�
OUTPUT�
CONFIGURATION
(V)
②�
③�
DESIGNATOR
2
3
4
5
6
2
3
4
6
3
5
3
0
3.3
5.0
C
N
CMOS
N-ch
r
Indicates Delay Time
DESIGNATOR
0
DELAY TIME�
�
No delay
t
Represents the Detect Voltage Accuracy
DESIGNATOR
DETECT VOLTAGE ACCURACY�
TO-92（L Type）�
(TOP VIEW)
TO-92（T Type）�
(TOP VIEW)
�
1
2
within 1% (semi-custom)
within 2％�
y
Represents a least significant �
digit of the produced year�
�
u
Denotes the production lot number�
0 to 9, A to Z repeated(G.I.J.O.Q.W excepted)
DESIGNATOR Produced year�
�
0
1
2000
2001
147
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 148
XC61C Series
■Block Diagram
(1) CMOS Output
(2) N-ch Open Drain Output
V
IN
V
IN
V
OUT
�
－
�
－
V
OUT
Vref
Vref
V
SS
V
SS
2
■Absolute Maximum Ratings
O
Ta = 25 C
PARAMETER
Input Voltage
Output Current
SYMBOL
IN
OUT
RATINGS
UNITS
V
V
12
50
I
mA
V
SS -0.3 ~ VIN +0.3
CMOS
N-ch open drain
SSOT-24
SOT-23
Output Voltage
V
OUT
V
VSS -0.3 ~ 12
150
150
Power Dissipation
mW
Pd
SOT-89
500
TO-92
300
O
Operating Ambient Temperature
StorageTemperature
Topr
Tstg
-40 ~ +85
C
O
-40 ~ +125
C
148
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 149
XC61C
Series
■Electrical Characteristics
O
V
DF (T) = 1.6 to 6.0V
PARAMETER
2%
Ta = 25 C
SYMBOL
DF
CONDITIONS
MIN
DF
x 0.98
DF
x 0.02
TYP
MAX
DF
x 1.02
DF
UNITS CIRCUIT
V
V
VDF
Detect Voltage
V
V
V
1
1
V
VDF
V
Hysteresis Range
VHYS
x 0.05
0.7
0.8
0.9
1.0
x 0.08
V
IN =1.5V
=2.0V
=3.0V
=4.0V
=5.0V
2.3
2.7
3.0
3.2
3.6
10.0
Supply Current
I
SS
µA
2
1
2
1.1
Operating Voltage
VIN
V
DF(T) = 1.6V to 6.0V
0.7
V
N-ch
P-ch
V
V
DS=0.5V
IN=1.0V
=2.0V
=3.0V
=4.0V
=5.0V
DS=2.1V
IN=8.0V
1.0
3.0
5.0
6.0
7.0
2.2
7.7
10.1
11.5
13.0
3
4
Output Current
IOUT
mA
V
V
-10.0
100
-2.0
0.2
( with CMOS output )
∆ VDF
-40OC ≤ Topr 85OC
≤
ppm/°C
-
Temperature Characteristics
Delay Time
∆ Topr
•
VDF
ms
tDLY
5
(VDR
VOUT inversion)
Note :
DF (T) : Established Detect Voltage Value
Release Voltage : VDR = VDF + VHYS
V
149
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 150
XC61C Series
■Functional Description
ꢀFunctional Description ( CMOS output )
q When input voltage (VIN) rises above detect voltage (VDF), output voltage (VOUT) will be equal to VIN
.
( A condition of high impedance exists with N-ch open drain output configurations. )
w When input voltage (VIN) falls below detect voltage (VDF), output voltage (VOUT) will be equal to the ground voltage (VSS) level.
e When input voltage (VIN) falls to a level below that of the minimum operating voltage (VMIN), output will become unstable. In this
condition, VIN will equal the pulled-up output ( should output be pulled-up.)
r When input voltage (VIN) rises above the ground voltage (VSS) level, output will be unstable at levels below the minimum
operating voltage (VMIN). Between the VMIN and detect release voltage (VDR) levels, the ground voltage (VSS) level will be
maintained.
2
t When input voltage (VIN) rises above detect release voltage (VDR), output voltage (VOUT) will be equal to VIN
( A condition of high impedance exists with N-ch open drain output configurations. )
y The difference between VDR and VDF represents the hysteresis range.
.
ꢀTiming Chart
INPUT VOLTAGE (VIN
)
DETECT RELEASE VOLTAGE(VDR
)
y
DETECT VOLTAGE(VDF
)
MIN. OPERATING VOLTAGE(VMIN
GROUND VOLTAGE (VSS
)
)
OUTPUT VOLTAGE (VOUT
)
GROUND VOLTAGE(VSS
)
w
e
r
t
q
150
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 151
XC61C
Series
■Directions for use
ꢀNotes on Use
1. Please use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent
damage to the device.
2. When a resistor is connected between the VIN pin and the input with CMOS output configurations, oscillation may occur as
a result of voltage drops at RIN if load current (IOUT) exists. ( refer to the Oscillation Description (1) below )
3. When a resistor is connected between the VIN pin and the input with CMOS output configurations, irrespective of N-ch
output configurations, oscillation may occur as a result of through current at the time of voltage release even if load current
(IOUT) does not exist. ( refer to the Oscillation Description (2) below )
4. With a resistor connected between the VIN pin and the input, detect and release voltage will rise as a result of the IC's
supply current flowing through the VIN pin.
5. In order to stabilise the IC's operations, please ensure that VIN pin's input frequency's rise and fall times are more than
several µ sec / V.
2
6. Please use N-ch open drains configuration, when a resistor RIN is connected between the VIN pin and power source.
In such cases, please ensure that RIN is less than 10kΩ and that C is more than 0.1µ F.
XC61CN Series
RIN
VOUT
VIN
VSS
C
Diagram: Circuit using an input resistor
ꢀOscillation Description
(1) Output current oscillation with the CMOS output configuration
When the voltage applied at IN rises, release operations commence and the detector's output voltage increases. Load
current (IOUT) will flow at R . Because a voltage drop ( RIN x IOUT) is produced at the RIN resistor, located between the
L
input (IN) and the VIN pin, the load current will flow via the IC's VIN pin. The voltage drop will also lead to a fall in the
voltage level at the VIN pin. When the VIN pin voltage level falls below the detect voltage level, detect operations
will commence. Following detect operations, load current flow will cease and since voltage drop at RIN will disappear,
the voltage level at the VIN pin will rise and release operations will begin over again.
Oscillation may occur with this " release - detect - release " repetition.
Further, this condition will also appear via means of a similar mechanism during detect operations.
(2) Oscillation as a result of through current
Since the XC61C series are CMOS ICS, through current will flow when the IC's internal circuit switching operates
( during release and detect operations ). Consequently, oscillation is liable to occur as a result of drops in voltage at the
through current's resistor (RIN) during release voltage operations. ( refer to diagram 2 )
Since hysteresis exists during detect operations, oscillation is unlikely to occur.
IN
IN
XC61CC Series
XC61CN Series
XC61CC Series
RIN
RIN
RIN
x IOUT
RIN
x ISS
IOUT
Voltage Drop
VIN
VOUT
VIN
VOUT
Voltage Drop
VSS
VSS
RL
ISS*
（In udes through
Current）�
Diagram 1: Oscillation in relation to output current
Diagram 2: Oscillation in relation to through current
151
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 152
XC61C Series
■Measuring Circuits
Circuit 2
Circuit 1
A
100 k
(Note 1)
Ω
R
VIN
VIN
VIN
VIN
VOUT
VOUT
V
VSS
VSS
V
2
Circuit 3
Circuit 4
VDS
VIN
VIN
VIN
VIN
VOUT
VOUT
A
A
VSS
VSS
VDS
Circuit 5
100 k
(Note 1)
Ω
R
VIN
VOUT
VSS
Measurement
waveform
Note 1 : Not necessary with CMOS output products.
152
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 153
XC61C
Series
■Typical Performance Characteristics
(1) SUPPLY CURRENT vs. INPUT VOLTAGE
ＸＣ６１ＣＣ１８０２ (１.８Ｖ）�
ＸＣ６１ＣＣ２７０２ (２.７Ｖ)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Ta=85℃�
25℃�
Ta=85℃�
-40℃�
25℃�
2
-40℃�
0
2
4
6
8
10
0
2
4
6
8
10
Input Voltage: VIN (V)
Input Voltage: VIN (V)
ＸＣ６１ＣＣ３６０２ (３.６Ｖ)
ＸＣ６１ＣＣ４５０２ (４.５Ｖ)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Ta=85℃�
25℃�
Ta=85℃�
25℃�
-40℃�
-40℃�
0
2
4
6
8
10
0
2
4
6
8
10
Input Voltage: VIN (V)
Input Voltage: VIN (V)
(2) DETECT, RELEASE VOLTAGE vs. AMBIENT TEMPERATURE
ＸＣ６１ＣＣ１８０２ (１.８Ｖ)
ＸＣ６１ＣＣ２７０２ (２.７Ｖ)
1.90
1.85
1.80
1.75
2.80
2.75
2.70
2.65
VDR
VDR
VDF
VDF
25
-50
-25
0
50
75
100
-50
-25
0
25
50
75
100
Ambient Temp.: Ta (℃)
Ambient Temp.: Ta (℃)
ＸＣ６１ＣＣ３６０２ (３.６Ｖ)
ＸＣ６１ＣＣ４５０２ (４.５Ｖ)
3.8
3.7
3.6
3.5
4.7
4.6
4.5
4.4
VDR
VDR
VDF
VDF
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temp.: Ta (℃)
Ambient Temp.: Ta (℃)
153
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 154
XC61C Series
(3) OUTPUT VOLTAGE vs. INPUT VOLTAGE
ＸＣ６１ＣＮ１８０２ （１.８V)
ＸＣ６１ＣＮ２７０２ （２.７Ｖ)
2
3
2
1
0
Ta=25℃�
Ta=25℃�
1
2
0
0
1
2
0
1
2
3
Input Voltage: VIN (V)
Input Voltage: VIN (V)
ＸＣ６１ＣＮ３６０２ (３.６V)
ＸＣ６１ＣＮ４５０２ (４.５V)
4
3
2
1
0
5
4
3
2
1
0
Ta=25℃�
Ta=25℃�
0
1
2
3
4
0
1
2
3
4
5
Input Voltage: VIN (V)
Input Voltage: VIN (V)
Note : The N-channel open drain pull up resistance value is 100kΩ.
(4) N-ch DRIVER OUTPUT CURRENT vs. VDS
ＸＣ６１ＣＣ１８０２ (１.８Ｖ)
ＸＣ６１ＣＣ２７０２ (２.７V)
10
30
25
20
15
10
5
Ta=25℃�
VIN =1.5V
Ta=25℃
VIN =2.5V
8
6
4
2
0
2.0V
1.0V
1.5V
1.0V
0
0
0.5
1.0
DS (V)
1.5
2.0
0
0.5
1.0
1.5
DS (V)
2.0
2.5
3.0
V
V
ＸＣ６１ＣＣ３６０２ (３.６Ｖ)
ＸＣ６１ＣＣ４５０２ (４.５V)
40
30
20
10
0
80
70
60
50
40
30
20
10
0
Ta=25℃�
VIN =4.0V
Ta=25℃�
VIN =3.0V
3.5V
3.0V
2.5V
2.0V
2.5V
2.0V
1.5V
1.5
1.5V
0
0.5
1.0
2.0
2.5
3.0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
DS (V)
V
DS (V)
V
154
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 155
XC61C
Series
(4) N-ch DRIVER OUTPUT CURRENT vs. VDS
ＸＣ６１ＣＣ１８０２ (１.８V)
ＸＣ６１ＣＣ２７０２ （２.７V)
1000
1000
800
600
400
200
0
VIN =0.8V
Ta=25℃�
Ta=25℃�
800
600
400
200
0
VIN =0.8V
0.7V
0.7V
2
0
0.2
0.4
0.6
0.8
1.0
0
0.2
0.4
0.6
0.8
1.0
V
DS (V)
V
DS (V)
ＸＣ６１ＣＣ３６０２ (３.６V)
ＸＣ６１ＣＣ４５０２ (４.５V)
1000
800
600
400
200
0
1000
800
600
400
200
0
Ta=25℃�
Ta=25℃�
VIN =0.8V
VIN =0.8V
0.7V
0.7V
0
0.2
0.4
0.6
0.8
1.0
0
0.2
0.4
0.6
0.8
1.0
V
DS (V)
V
DS (V)
(5) N-ch DRIVER OUTPUT CURRENT vs. INPUT VOLTAGE
ＸＣ６１ＣＣ１８０２ (１.８V)
ＸＣ６１ＣＣ２７０２ (２.７V)
15
25
20
15
10
5
VDS=0.5V
VDS=0.5V
Ta=-40℃�
Ta=-40℃�
25℃�
10
5
25℃�
85℃�
2.5
85℃�
0
0
0
0.5
1.0
1.5
2.0
0
0.5
1.0
1.5
2.0
3.0
Input Voltage: VIN (V)
Input Voltage: VIN (V)
ＸＣ６１ＣＣ３６０２ (３.６V)
ＸＣ６１ＣＣ４５０２ (４.５V)
30
25
20
15
10
5
40
30
20
10
0
VDS=0.5V
VDS=0.5V
Ta=-40℃�
25℃�
Ta=-40℃�
25℃�
85℃�
85℃�
4
0
0
1
2
3
4
0
1
2
3
5
Input Voltage: VIN (V)
Input Voltage: VIN (V)
155
02S_03XC61C（通常電圧用） 02.09.12 14:02 ページ 156
XC61C Series
(6) P-ch DRIVER OUTPUT CURRENT vs. INPUT VOLTAGE
ＸＣ６１ＣＣ１８０２ (１.８V)
ＸＣ６１ＣＣ２７０２ (２.７V)
15
15
10
5
VDS=2.1V
VDS=2.1V
1.5V
1.0V
0.5V
1.5V
10
1.0V
5
0.5V
2
0
0
0
2
4
6
8
10
0
2
4
6
8
10
Input Voltage: VIN (V)
Input Voltage: VIN (V)
ＸＣ６１ＣＣ３６０２ (３.６V)
ＸＣ６１ＣＣ４５０２ (４.５V)
15
10
5
15
10
5
VDS=2.1V
VDS=2.1V
1.5V
1.0V
1.5V
1.0V
0.5V
0.5V
0
0
0
2
4
6
8
10
0
2
4
6
8
10
Input Voltage: VIN (V)
Input Voltage: VIN (V)
156
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