T6LD4 [TOSHIBA]

Gate Driver for TFT LCD Panels; 栅极驱动器,用于TFT LCD面板
T6LD4
型号: T6LD4
厂家: TOSHIBA    TOSHIBA
描述:

Gate Driver for TFT LCD Panels
栅极驱动器,用于TFT LCD面板

驱动器 栅极 栅极驱动 CD
文件: 总11页 (文件大小:143K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
T6LD4  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
T6LD4  
Gate Driver for TFT LCD Panels  
Unit : mm  
User Pitch Area  
IN OUT  
The T6LD4 is a 350 / 342-channel output gate driver  
for TFT LCD panels.  
T6LD4  
For the latest TCP / COF specifications  
and product line-up, contact Toshiba or  
your local sales office.  
Features  
LCD drive output pins  
: Switchable 350 / 342 pins  
Logic power supply voltage : 2.3 to 3.6V  
LCD drive voltage  
: max 43.5V  
Data transfer method  
Operating temperature  
Package  
: Bidirectional shift register  
: 20 to 75°C  
COF (Chip On Film)  
: COF  
Built-in power on reset circuit  
Application  
Modules for PC monitor and Note PC  
2006-09-20  
1
T6LD4  
Block Diagram  
DO/I  
DI/O  
CPV  
Bidirectional shift registers  
U/D  
MODE  
Input circuit block  
Control circuit block  
OE  
V
V
GG  
Output circuit block  
V
EE  
DD  
V
SS  
G1 G2 G3  
G348 G349 G350  
2006-09-20  
2
T6LD4  
Pin Assignment  
G350 365  
G349 364  
G348 363  
1
2
3
4
5
6
7
8
9
V
V
V
DO/I  
OE  
GG  
EE  
DD  
CPV  
(V  
)
DD  
U/D  
(V  
T6LD4  
(chip top view)  
)
SS  
10 MODE  
11 (V  
)
DD  
12 DI/O  
13  
14  
15  
V
V
V
SS  
EE  
GG  
G3 18  
G2 17  
G1 16  
The above diagram shows the device’s pin configuration only and does not necessarily correspond to the pad layout  
on the chip. Please contact Toshiba or our distributors for the latest COF specification.  
2006-09-20  
3
T6LD4  
Pin Description  
Signal Name  
I/O  
Function  
Vertical shift data input/output pins  
These pins are used to input and output shift data. The function of these pins is switched for input or output  
by U/D as shown below:  
U/D  
H
DI/O  
Input  
DO/I  
Output  
Input  
DI/O  
DO/I  
I/O  
L
Output  
When set for input  
The data is latched into the internal shift registers synchronously with the rising edge of CPV.  
When set for output  
When two or more T6LD4s are cascaded, this pin outputs the data to be fed into the next stage. This  
data changes state synchronously with the falling edge of CPV.  
Transfer direction select pin  
This pin specifies the direction in which data is transferred through the shift registers.  
The shift register data is shifted synchronously with each rising edge of CPV as follows:  
When U/D is high, data is shifted in the direction  
U/D  
I
U/D = “H”: G1 G2 G3 G4 ··· G350  
When U / D is low, the direction is reversed to give  
U/D = “L”: G350 G349 G348 G347 ··· G1  
The voltage applied to this pin must be a DC-level voltage that is either high (V ) or low (V ).  
DD  
SS  
Apply the same DC-level voltage to these pins.  
Vertical shift clock pin  
CPV  
OE  
I
I
This is the shift clock for the shift registers. Data is shifted through the shift registers synchronously with  
the rising edge of CPV.  
Output enable pin  
This signal controls the data appearing at the TFT -LCD panel drive pins (G1 to G350).  
This pin operates asynchronously with CPV.  
OE = high level : controls the LCD panel drive output to V  
EE  
OE = low level : outputs shift data and data contents.  
Output select pin  
This signal selects 350 / 342-pin mode for the LCD panel driver.  
MODE  
Output mode  
350-out  
The unapplied LCD panel drive pins  
MODE  
I
H
L
342-out  
G171 to G178 (V level)  
EE  
The voltage applied to this pin must be a DC -level voltage that is either high (V ) or low (V ).  
DD SS  
TFT-LCD panel driver pins  
G1 to G350  
O
These pins output the shift register data or the voltage of V  
or V  
depending on the control OE  
EE  
GG  
signal.  
V
Power supply for TFT-LCD drive pin  
Power supply for TFT-LCD drive pin  
GG  
V
EE  
Power supply for the internal logic pin  
V
These signals arranged right and left is connected on the film.  
DD  
Apply the same voltage to these pins. The (V ) is the pin for connection.  
DD  
Power supply for the internal logic pin  
V
These signals arranged right and left is connected on the film.  
SS  
Apply the same voltage to these pins. The (V ) is the pin for connection.  
SS  
2006-09-20  
4
T6LD4  
Device Operation  
Shift data transfer method  
Shift data  
Output  
Mode  
MODE  
U/DPin  
Data Transfer Method  
Input  
Output  
H
L
DI/O  
DO/I  
DI/O  
DO/I  
DO/I  
DI/O  
DO/I  
DI/O  
G1 G2 G3 G4 ··· G350  
H
L
350-out  
342-out  
G350 G349 G348 ··· G1  
H
L
G1 G2 G3 G4 ··· G170G179 ··· G350  
G350 G349 G348 ···G179 G170 ··· G1  
The input data (DI/O or DO/I) is latched into the internal register synchronously with the rising edge of the  
shift clock CPV. At the same time that the data is shifted to the next register at the next rise of CPV, new  
vertical shift data is latched into.  
In the output operation, the data in the last shift register (G350 or G1) is output synchronously with the  
falling edge of CPV. (The output high voltage is the V  
level; the output low voltage is the V level.)  
SS  
DD  
2006-09-20  
5
T6LD4  
Timing Chart 1  
( 350-out mode, U/D = high level, MODE = high level )  
DI/O  
(Input)  
1
2
3
4
5
350  
351  
CPV  
OE  
G1  
G2  
G3  
G4  
G350  
DO/I  
(Output)  
: This part is output which is controlled ( fixed to V ) by  
pin  
OE  
EE  
Timing Chart 2  
( 350-out mode, U/D = low level, MODE = high level )  
DO/I  
(Input)  
1
2
3
4
5
350  
351  
CPV  
OE  
G350  
G349  
G348  
G347  
G1  
DI/O  
(Output)  
: This part is output which is controlled ( fixed to V ) by OE pin  
EE  
2006-09-20  
6
T6LD4  
Timing Chart 3  
( 342-out mode, U/D = high level, MODE = low level )  
DI/O  
(Input)  
1
2
3
4
5
342  
343  
CPV  
OE  
G1  
G2  
G3  
G4  
G171 to G178  
G350  
V
EE  
DO/I  
(Output)  
: This part is output which is controlled ( fixed to V ) by  
pin  
OE  
EE  
Timing Chart 4  
( 342-out mode, U/D = low level, MODE = low level )  
DO/I  
(Input)  
1
2
3
4
5
342  
343  
CPV  
OE  
G350  
G349  
G348  
G347  
G178 to G171  
V
EE  
G1  
DI/O  
(Output)  
: This part is output which is controlled ( fixed to V ) by OE pin  
EE  
2006-09-20  
7
T6LD4  
Maximum Ratings (V = 0 V)  
SS  
Characteristics  
Symbol  
Rating  
Unit  
V
Supply voltage (1)  
Supply voltage (2)  
Supply voltage (3)  
Supply voltage (1)  
Input voltage  
V
0.3 to 4.0  
0.3 to 45.0  
20.0 to 0.3  
0.3 to 45.0  
DD  
V
GG  
V
EE  
V
V  
GG  
EE  
V
0.3 to V  
+ 0.3  
V
IN  
DD  
Storage temperature  
T
stg  
55 to 125  
°C  
Operating Range (V = 0 V)  
SS  
Characteristics  
Symbol  
Rating  
Unit  
V
Supply voltage (3)  
Supply voltage (2)  
Supply voltage (4)  
V
2.3 to 3.6  
10 to 35  
DD  
V
GG  
V
15 to 5  
15.0 to 43.5  
20 to 75  
100 (max)  
600 (max)  
EE  
Supply voltage (1)  
V
V  
GG  
EE  
Operating temperature  
Operating frequency  
Output load capacitance  
T
opr  
°C  
kHz  
f
CPV  
C
pF/PIN  
L
Electrical Characteristics  
DC Characteristics  
unless otherwise specified, VGG VEE = 30.0 to 43.5 V,  
V
= 2.3 to 3.6 V, VSS = 0 V, Ta = 20 to 75°C  
DD  
Test  
Circuit  
Relevant Pin  
Characteristics  
Symbol  
Test Condition  
Min  
Max  
Unit  
V
Low level  
V
V
0.3 × V  
DD  
IL  
SS  
Input voltage  
(Note 1)  
High level  
V
0.7 × V  
V
IH  
DD  
DD  
Low level  
Output voltage  
V
I
I
= 40 µA  
V
V
+ 0.4  
OL  
OH  
OL  
SS  
0.4  
SS  
V
V
DI/O, DO/I  
High level  
V
= −40 µA  
V
DD  
OH  
DD  
Low level  
Output  
R
V
V
= V + 0.5 V  
EE  
OL  
OH  
IN  
OUT  
OUT  
1000  
G1 to G350  
(Note 1)  
resistance  
High level  
R
I
= V  
0.5 V  
GG  
Input current  
1  
1
µA  
I
200  
50  
V
GG  
GG  
Current dissipation  
no load  
(Note 2)  
µA  
I
V
DD  
DD  
I
200  
V
EE  
EE  
Note1: DI/O , DO/I , CPV, OE  
Note2: fCPV = 50 kHz, Shift data input : 60Hz 1pulse, OE = low level, MODE = high level  
2006-09-20  
8
T6LD4  
AC Characteristics  
unless otherwise specified, VGG VEE = 30.0 to 43.5 V,  
V
= 2.3 to 3.6 V, VSS = 0 V, Ta = 20 to 75°C  
DD  
Test  
Circuit  
Characteristics  
Symbol  
Test Condition  
Min  
Max  
Unit  
kHz  
Clock pulse frequency  
Clock pulse width (H)  
Clock pulse width (L)  
Data setup time  
t
500  
500  
200  
200  
1
100  
CPV  
t
CPVH  
ns  
t
CPVL  
t
sDI  
ns  
Data hold time  
t
hDI  
OE pulse width  
t
µs  
wOE  
Output delay time (1)  
Output delay time (2)  
Output delay time (3)  
t
C
C
C
= 50 pF  
200  
1000  
1000  
pdDO  
L
L
L
ns  
t
= 600 pF  
= 600 pF  
pdG  
t
pdOE  
t
t
CPVL  
CPVH  
CPV  
50%  
50%  
50%  
50%  
50%  
t
t
hDI  
sDI  
DI/O, DO/I  
(Input)  
50%  
50%  
t
t
t
pdG  
pdG  
V
V
GG  
EE  
G1  
50%  
50%  
t
pdG  
pdG  
V
V
GG  
EE  
G2 to G350  
50%  
50%  
CPV  
50%  
50%  
V
V
GG  
EE  
G350  
t
t
pdDO  
pdDO  
DO/I, DI/O  
(Output)  
50%  
50%  
t
wOE  
OE  
50%  
50%  
t
t
pdOE  
pdOE  
V
V
GG  
EE  
G1 to G350  
50%  
50%  
2006-09-20  
9
T6LD4  
Power Supply Sequence  
Turn power on in the order V  
DD  
V  
Input signal V . Turn power off in th reverse order.  
EE  
GG  
It may input V  
input signal and V  
simultaneously.  
EE,  
GG  
T6LD4 have the Power On Reset function. (TrG10µs)  
T
rG  
V
GG  
V
DD  
V
SS  
V
EE  
Instruction for operating circumstances  
Light striking a semiconductor device can generate electromotive force due to photoelectric effects. In some cases  
this may cause the device to malfunction.  
This is more likely to be affected for the devices in which the surface (back), or side of the chip is exposed. At the  
design phase, please make sure that devices are protected against incident light from external sources. Please take  
into account of incident light from external sources during actual operation and during inspection.  
Polyimide base film is hard and thin. Be careful not to injure yourself on the film or to scratch any other parts with the  
film. Please design and manufacture products so that there is no chance of users touching the film after assembly, or  
if they do that, there is no chance of them injuring themselves. When cutting out the film, please ensure that the film  
shavings do not cause accidents. After use, please treat the leftover film and reel spacers as industrial waste.  
2006-09-20  
10  
T6LD4  
RESTRICTIONS ON PRODUCT USE  
The information contained herein is subject to change without notice. 021023_D  
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor  
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical  
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of  
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of  
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.  
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as  
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and  
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability  
Handbook” etc. 021023_A  
The TOSHIBA products listed in this document are intended for usage in general electronics applications  
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,  
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires  
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or  
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or  
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,  
medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this  
document shall be made at the customer’s own risk. 021023_B  
The products described in this document shall not be used or embedded to any downstream products of which  
manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q  
The information contained herein is presented only as a guide for the applications of our products. No  
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which  
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of  
TOSHIBA or others. 021023_C  
Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of  
controlled substances.  
Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws  
and regulations.  
The products described in this document are subject to foreign exchange and foreign trade control laws. 021023_E  
2006-09-20  
11  

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