TB62771FTG [TOSHIBA]
IC LED DISPLAY DRIVER, QCC48, QFN-48, Display Driver;
| 型号： | TB62771FTG |
| 厂家： | 
TOSHIBA |
| 描述： | IC LED DISPLAY DRIVER, QCC48, QFN-48, Display Driver 驱动 CD 接口集成电路 |
| 文件： | 总29页 (文件大小：1627K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TB62771FTG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB62771FTG
Step-up DC/DC controller built in 4-channel sink driver for white LED
1. General description
TB62771FTG is a large-current LED driver IC incorporating
DC/DC controller for high-power LED systems.
This IC can drive high-intensity and large-current LED connected
to 4 constant current sinks.
This IC is for driving backlight of white LEDs for large LCD.
2. Features
Weight : 0.03 g (TYP.)
•
•
•
Input voltage range : 4.75 V to 40 V
Built in current mode DC/DC controller
Switching frequency:
Set by the resistance connected to RT terminal (200 kHz to 2.0 MHz), Synchronization with external clock
•
4ch constant current driver:
Sink current 20 mA to 150 mA
Current accuracy +/- 2% (ILED = 100 mA, between channels)
Control voltage for minimum OUT terminal 0.5 V (ILED = 150 mA)
•
•
Dimming control: Input PWM range 100 Hz to 30 kHz
Minimum pulse width of input PWM 330 ns
Detection circuit:
VIN under voltage lockout (UVLO(VIN))
VCC under voltage lockout (UVLO(VCC))
LED open detection
LED short detection (Set by the resistance connected to RSDT terminal)
Built in thermal shutdown circuit
Overvoltage detection (set by external resistance)
•
•
•
•
Soft start function
Output delay function
Shutdown consumption current 40 µA (max)
IC package:P-WQFN20-0404-0.50-002
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3. Block Diagram
OVP
PGND1
NDRV
DRV
Thermal
Shutdown
Fault Flag
Logic
Over Voltage
Detector
FLT
Step-up
Controller
CS
Unused
Chanel
Open
Detector
Short
Detector
RSDT
Detector
RT
OSC
Error
Amplifier
COMP
OUT1
DIM
EN
Current
Regulator1
EN
Soft Start
Current
Regulator
Logic
Current
OUT2
Regulator2
VIN
Vref
Reference
Current
Regulator3
OUT3
OUT4
UVLO
Current
Regulator4
Ragulator
VCC
VCC
LED current
Controller
SETI
UVLO
AGND
ＰＧＮD2
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4. Pin Assignment (Top view)
CS
PGND1
NDRV
DRV
DIM
16
17
18
16
17
18
19
20
10
9
10
9
AGND
RSDT
SETI
OVP
8
8
TOP VIEW
19
20
7
7
6
VCC
6
5. Marking (Top view)
X1 ,X2
X3 ,X4
：Yearly code (last 2 digits of the year of manufacture)
：Weekly code
X6 toX11 ：Lot trace code
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6. Pin function
No
1
Name
I/O (Note)
P
Function
VIN
EN
Power supply input.
Input chip enable signal,
2
I
EN=High: operation mode or standby mode,
EN=Low: shutdown mode.
Terminal for controlling compensation point of AMP that controls output
voltage. Connect RC between COMP and AGND.
Internal oscillator setting terminal.
3
4
COMP
RT
O
I
Connect RT resistor to AGND.
Error signal output by fault protection control (Nch open drain) ,
This terminal is set Low in detecting LED Open, LED Short, and thermal
shutdown. Connect a pull-up resistor of 10kΩ from FLT to VCC.
5
FLT
O
Overvoltage threshold adjust input.
6
7
8
OVP
SETI
I
O
I
Connect a divided resistance from the switching convertor output to OVP
and AGND. The OVP comparator reference is set 1.23V internally.
LED current adjust input. Connect a resistor (RSETI) to AGND.
LED short detection adjusting input.
RSDT
Connect a divided resistance from VCC to AGND.
Connect RSDT directly to VCC to disable LED short detection.
9
AGND
P
Ground for logic signal. Connect to PGND1, PGND2.
Digital PWM dimming input.
DIM = High: Operation mode
DIM = Low: Standby mode.
Connect DIM to VCC if dimming control is not used (continuous constant
current operation).
10
DIM
I
*The minimum pulse width which can be inputted is 330 ns. When a pulse
of the width less than 330ns is input, it may not operate normally.
Constant current sink terminals to drive LED for channel 1.
This terminal is open drain output that sinks up to 150mA.
Constant current sink terminals to drive LED for channel 2.
This terminal is open drain output that sinks up to 150mA.
Power Ground. Connect PGND2 to AGND and PGND1.
Constant current sink terminals to drive LED for channel 3.
This terminal is open drain output that sinks up to 150mA.
Constant current sink terminals to drive LED for channel 4.
This terminal is open drain output that sinks up to 150mA.
Current sense input It monitors the current of external power MOSFET
source.
11
OUT1
O
12
13
14
OUT2
PGND2
OUT3
O
P
O
15
OUT4
O
16
17
18
CS
I
PGND1
NDRV
P
O
Power Ground. Connect PGND1 to AGND and PGND2.
Switching n-MOSFET gate driver output.
Power Supply input for the control circuits of switching MOSFET gate.
Connect Resistance between DRV and 5V regulator output VCC.
And connect DRV and PGND with minimum of 0.1μF Bypass capacitor.
5V Regulator Output.
Connect minimum of 1.0μF capacitor between VCC and AGND as close
to the device as possible.
19
20
DRV
VCC
I
O
Note. : I: Input terminal
O: Output terminal
P: Power supply terminal
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7. Equivalent circuits of terminals
Pin No.
1
Pin name
VIN
Equivalent circuit
VIN
VCC
9
AGND
PGND2
PGND1
VCC
AGND
PGND1
PGND2
13
17
20
VIN
EN
2
3
EN
AGND
VCC
AGND
COMP
COMP
AGND
VCC
RT
4
RT
AGND
VCC
FLT
5
6
FLT
AGND
VCC
OVP
OVP
AGND
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No.
Pin name
SETI
Equivalent circuit
VCC
7
SETI
AGND
VCC
RSDT
8
RSDT
AGND
DIM
10
DIM
AGND
11
12
14
15
OUT1
OUT2
OUT3
OUT4
OUTn
PGND2
VCC
CS
16
CS
AGND
18
19
NDRV
DRV
DRV
PGND1
VCC
NDRV
PGND1
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8. Absolute Maximum Ratings (Ta = 25°C Unless otherwise specified)
Characteristics
Symbol
condition
Rating
Unit
V
-
−0.3 to +45
V
V
V
V
V
V
Power supply voltage
Input voltage1
IN
V
IN1
EN
−0.3 to V +0.3
IN
Input voltage2
VI
DRV,FLT , DIM, RSDT, OVP
CS, RT, COMP, SETI
NDRV
−0.3 to +6
N2
IN3
IN4
Input voltage3
Input voltage4
V
V
−0.3 to VCC +0.3
−0.3 to V
+0.3
DRV
V
OUT1, OUT2, OUT3, OUT4
−0.3 to +45
Output voltage
out
Exposed Pad mounting
(Note1,2)
P
3.2
W
Power dissipation
D
Exposed Pad mounting
(Note1,2)
R
th (j-a)
39
°C/W
Saturated heat resistance
Operation temperature range
Storage temperature range
Maximum junction temperature
Topr
Tstg
Tj
-
-
-
−40 to +85
−65 to +150
150
°C
°C
°C
Note1: PCB condition is 74mm×74mm×1.6 mm, 4layer, FR-4
Note2: When ambient temperature is 25°C or more, reciprocal of saturated heat resistance (1/Rth(j-a)) should be
reduced every 1°C rise.
9. Electrical Characteristics
(Unless otherwise specified, V = V = 12V, R
= 15kΩ, C
= 1μF, V = VDRV
,
IN
EN
SETI
VCC
CC
NDRV = COMP = OUT = Open, V
= V
= V , V
= V =V
= V
= V
RSDT
DIM
CC OVP
CS
PGND1
PGND2
AGND
= 0V, Ta = -40 to 85°C, Typical values are at Ta = 25°C condition)
VIN input
Characteristics
Power supply voltage
Symbol
Condition
Min
Typ.
Max
Unit
V
-
RT = 7.35 x 109/fsw
VEN = 0V
4.75
-
40
5.5
40
V
IN
IIN(ON)
IIN(OFF)
-
4.5
15
mA
μA
V
Operating consumption current
Shutdown consumption current
VIN under lock out voltage
-
3.975
-
UVLO_VIN
UVLO_VINHYS
VIN rising
4.3
170
4.625
-
-
mV
VIN under lock out voltage hysteresis
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Electrical Characteristics
(Unless otherwise specified, V = V = 12V, R
= 15kΩ, C
= 1μF, V
= V
,
IN
EN
SETI
VCC
CC
DRV
NDRV = COMP = OUT = Open, V
= V
= V , V
= V =V
= V
= V
PGND2 AGND
RSDT
DIM
CC OVP
CS
PGND1
= 0V, Ta = -40 to 85°C, Typical values are at Ta = 25°C condition)
VCC REGULATOR
Characteristics
Symbol
Condition
Min
Typ. Max Unit
6.5V < VIN < 10V, 1mA < ILOAD <
50mA
VCC output voltage
V
CC
4.75
5.0
5.25
V
10V < VIN < 40V, 1mA < ILOAD <
10mA
VIN - VCC, VIN = 4.75V, ILOAD =
50mA
VCC drop voltage
VCC
ICC
-
200
500
mV
DROP
VCC current limit
VCC connects to AGND
VCC rising
-
-
100
4
-
-
mA
V
LIMIT
VCC under lock out voltage
UVLO_VCC
VCC under lock out voltage
hysteresis
UVLO_VCC
-
-
100
-
mV
HYS
RT OSCILLATOR
Characteristics
Symbol
Condition
Min
Typ. Max Unit
Switching frequency
f
-
200
90
86
-7
-
2000 kHz
SW
f
= 200kHz to 600kHz
= 600kHz to 2000kHz
= 200kHz to 2000kHz
94
90
-
98
%
94
SW
Maximum duty cycle
Dmax
f
f
SW
SW
Frequency accuracy (Note3)
-
-
7
-
%
V
Synchronized signal threshold
voltage
-
4
-
-
Minimum synchronized
frequency
-
-
1.1f
-
Hz
SW
Note3: Relative accuracy to typical characteristic.
PWM COMPARATOR
Characteristics
Symbol
-
Condition
-
Min
Typ. Max Unit
PWM comparator
Leading-edge blanking time
(Note4)
-
-
60
90
-
-
ns
ns
PWM-NDRV propagation delay
(Note4)
-
-
SLOPE COMPENSATION
Characteristics
Symbol
-
Condition
Min
45
Typ. Max
Unit
µA･fsw
Peak slope compensation
current
Peak slope for CS input
50
55
Note4: This specification is design guarantee, not production tested.
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Electrical Characteristics
(Unless otherwise specified, V = V = 12V, R
= 15kΩ, C
= 1μF, V = V
,
DRV
IN
EN
SETI
VCC
CC
NDRV = COMP = OUT = Open, V
= V
= V , V
= V =V
= V
= V
RSDT
DIM
CC OVP
CS
PGND1
PGND2 AGND
to
= 0V, Ta = -40 85°C, Typical values are at Ta = 25°C condition)
CURRENT LIMIT COMPARATOR
Characteristics
Symbol
-
Condition
-
Min
384
Typ. Max Unit
Current limit threshold
-
438
-
mV
ns
10mV over drive
Leading-edge blanking time is not
included.
CS limit comparator to NDRV
propagation delay (Note4)
-
-
10
ERROR AMPLIFIER
Characteristics
Symbol
Condition
Min
Typ. Max Unit
OUT regulation voltage
Trans conductance
-
20mA < ILED < 150mA
-
-
0.5
-
-
V
gM
650
1450
μS
Gain = ΔVCOMP /ΔVCS
No load gain (Note4)
-
-
75
-
dB
0.05V < VCS < 0.15V.
COMP sink current
-
-
VOUT=5V, VCOMP =2.5V
VOUT=5V, VCOMP=2.5V
160
160
375
375
800
800
μA
μA
COMP source current
MOSFET DRIVER
Characteristics
Symbol
RONNDRV
Condition
Min
Typ. Max Unit
ISINK = 100mA (nMOS)
ISOURCE = 100mA (pMOS)
VNDRV = 5V
-
-
-
-
-
-
0.9
1.1
2.0
2.0
6
-
-
-
-
-
-
NDRV on resistance (Note4)
Ω
Peak sink current (Note4)
Peak source current (Note4)
Rise time
-
-
-
-
A
A
VNDRV = 0V
CLOAD = 1nF
ns
ns
Fall time
CLOAD = 1nF
6
LED CURRENT
Characteristics
Symbol
Condition
Min Typ.
Max
Unit
OUT current sink range
-
-
-
-
-
VOUT = VREF (0.5V)
20
-
-
-
-
-
-
-
150
±2
mA
%
IOUT = 100mA
Channel to channel matching
IOUT = 100mA, all channels on
IOUT = 100mA, Ta =-40 to 85°C
IOUT = 50 to 150mA, Ta =-40 to 85°C
VDIM = 0V, VOUT = 40V
-
±1.5
±3
%
-
mA
mA
μA
Output current accuracy
Output leakage current
-
±3
I
-
1
OFFOUTn
Note4: This specification is design guarantee, not production tested.
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Electrical Characteristics
(Unless otherwise specified, V = V = 12V, R
= 15kΩ, C
= 1μF, V
= V
,
DRV
IN
EN
SETI
VCC
CC
NDRV = COMP = OUT = Open, V
= V
= V , V
= V =V
= V
= V
RSDT
DIM
CC OVP
CS
PGND1
PGND2 AGND
= 0V, Ta = -40 to 85°C, Typical values are at Ta = 25°C condition)
LOGIC INPUTS/OUTPUTS
Parameter
Symbol
Test Condition
-
Min
Typ. Max Unit
EN reference voltage
V
VEN rising
VEN = 40V
1.150 1.275 1.400
V
EN
EN hysteresis voltage
EN input current
V
-
50
-
mV
HYSEN
II
-
-
-
±250 nA
NEN
DIM input high voltage
DIM input low voltage
V
-
-
-
-
2.1
5.5
0.8
-
V
V
IHDIM
V
ILDIM
-
-
DIM hysteresis voltage
DIM input current
V
-
250
-
mV
μA
ns
ns
ns
V
HYSDIM
I
-
±2
-
INDIM
DIM↑ to LED turn-on delay
DIM ↓to LED turn-off delay
IOUT rise and fall times
/FLT output low voltage
/FLT output leakage current
LED short detection threshold
Short detection comparator delay
RSDT leakage current
OVP detecting threshold
OVP hysteresis voltage
OVP leakage current
-
DIM rising edge to IOUT↑(10% rise)
-
100
100
200
-
-
-
DIM falling edge to IOUT↓(10% fall)
-
-
-
-
-
V
VIN = 4.75V, ISINK = 5mA
-
-
0.4
1.0
4.0
-
OLFLT
I
VFLT = 5.5V
-
μA
V
OFFFLT
V
RSDT
VRSDT=1V
3.0
-
3.5
6.5
-
-
-
μs
I
-
Output rising
-
-
±600 nA
RSDT
V
1.19 1.228 1.266
V
OVP
V
-
-
70
-
-
mV
OVPHYS
I
VOVP = 1.25V
±600 nA
OVP
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10. Operation mode
10.1 Mode change
Modes are selectable by 2 input signals.
EN input
･High
: Stand-by Mode1, Stand-by Mode2, Operation Mode
(Depend on DIM input condition. See the next page.)
: Shutdown Mode
･Low
DIM input
･High
: Operation Mode
･Low
: Stand-by Mode1, Stand-by Mode2
(See the next page.)
State of the IC is transferred to the operation mode by inputting high to EN terminal. DC/DC controller and constant
current regulators are controlled by inputting signal from DIM terminal.
This IC has variable abnormal detecting circuits and controls the operation depending on the abnormal state.
Continuous monitoring
OFF mode
（VIN=0V,EN="L”,DIM＝”L”）
Startup at
DIM=”H”
Startup at
DIM=”H”
OVP
OCP
Apply VIN
Turn off VIN
OVP detection
OCP detection
Shutdown mode
（VIN apply,
EN="L”,DIM＝”L”）
Stop SW operation
NDRV:”L”
Open abnormal detection
Release at next
clock timing
EN=”H”
0
Number of open error
channels
OVP release
In case OCP detection is
continued at NDRV=”L” for
5clok or more
Startup Regulator
Startup UVLO(VIN)
Startup UVLO(VCC)
Startup ＴＳＤ
Stop Regulator
Stop UVLO(VIN)
Stop UVLO(VCC)
Stop ＴＳＤ
1 or more
FLT=”L”
FLT=”L”
After UVLO (VCC) is
released
Stop operation of error OUT terminal
Error OUT terminal is not under controlled
Stop SW operation
Startup Internal
OSC circuit
0
2 or less
Drive OUT
terminal
Detect
unused OUT terminal
Stop internal OSC circuit
Reset abnormal detection
3
Phase shift
circuit OFF
Phase shift
circuit ON
Startup Soft start
(FB control by OVP terminal）
Abnormal detection mode
EN=”L”
Release OVP
Release OVP
EN=”L”
Standby mode 1
(FB control by OVP terminal）
DIM=”H”
（Less than 5clk）
DIM=”H”（5clk or more）
Continuous monitoring
Startup at
EN=”H”
Startup at
EN=”H”
Short detection
VIN
UVLO
VCC
UVLO
TSD
Current Regulator
operation
Reset Internal OSC
Operation mode
（FB control by minimum
OUT terminal）
EN=”L”
UVLO
deteciton
TSD detection
DIM=”L”
Standby mode ２
(FB control by OVP terminal）
Standby mode ３
(FB control by minimum OUT terminal）
FLT=”L”
Stop SW operation
EN=”L”
EN=”L”
Stop Current
Regulator operation
Stop SW operation
DIM=”H”（Less than 6clk）
DIM=”H”（6clk or more）
DIM=”H”（5clk or more）
DIM=”H”
（Less than 5clk）
Stop Current
Regulator operation
UVLO recovers to
recovery voltage or more
Stop ＶＣＣ
Regulator operation
Release UVLO
Re-start from detecting
unused OUT terminal.
Falls TSD detection
temperature or less
Release TSD
(Release FLT）
Re-start from detecting unused OUT terminal
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10.1.1 Shutdown mode ( EN=”L”)
Power is supplied. IC operation halts.
10.1.2 Shutdown mode → Stand-by mode1 ( EN=”L” → ”H” )
Unused OUT terminals are detected when the operation moves from shutdown mode to standby mode. When unused
channel is detected, it is eliminated from object of control and its constant current operation is turned off.
When unused channels are two or more, phase shift function is stopped. (Phase shift function is described later)
Then, voltage boosting starts and the operation moves to the soft start. As for voltage boosting, object of feedback
control is OVP terminal whose voltage is 95% of the detection voltage.
Soft-start period is maximum 100ms. It doesn’t depend on internal OSC frequency for DC-DC switching.
After soft start is finished, it shifts to Stand-by mode1 completely.
The conditions in which a soft start completes are the following three cases.
1) VLED (DC/DC convertor output) reaches OVP×95% level.
2) Constant current regulators are generated by inputting high to DIM. And the voltage of minimum OUT terminal
reaches 0.5V.
3) 100ms (Typ.) passes.
Start function
･UVLO(VIN)
･UVLO(VCC)
Start
UVLO(VCC)
･OVP
･TSD
･VCC
VIN
1ms
EN
4V
VCC
Internal OSC
Unused channel
Operation
detection
DIM
invalid
OUT*
（Available channel）
Connect to GND
Unused channels are
stopped
OUT*
（Unused channel）
Soft-start
(See below for
further details)
Soft-start
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10.1.3 Stand-by mode1 ( EN=”H”, DIM=”L”)
The operation of the IC is shifted to Stand-by mode1 by inputting high to EN after power is supplied to VIN.
After soft start, VLED (DC/DC convertor output) is controlled to set the voltage of the OVP terminal to “OVP detection
voltage×95%”
10.1.4 Stand-by mode2 ( EN=”H”, DIM=”L”)
When pulse width of PWM input to DIM terminal is small (5 clocks or less), the operation of the IC is shifted to Stand-by
mode2 while voltage of DIM is low.
Although constant current block is turned off by inputting low to DIM, DC/DC convertor is operated, and VLED is
controlled to set the voltage of the OVP terminal to “OVP detection voltage×95%”.
10.1.5 Stand-by mode3 ( EN=”H”, DIM=”L”)
When pulse width of PWM input to DIM is 5 clocks or more, the operation of the IC is shifted to Stand-by mode3 while
voltage of DIM is low.
DC/DC convertor is turned off.
10.1.6 Operation mode (EN=”H”, DIM=”H”)
Both the DC/DC convertor and the constant current block are in operation mode.
The DC/DC convertor controls the boosted voltage to set the minimum OUT voltage to 0.5V (TYP.).
10.1.7 Mode transition
1) Example1 (Startup ~ PWM operation)
1ms
EN
4V
VCC
DIM
6clk
6clk
5clk
Min.
OUT
Min.
OUT
Min.
OUT
Feedback
OVP
OVP
OVP
Soft-start
finish
Unused channel
detection
Soft-start
（100ms typ.）
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2) Example2 (DIM signal is inputted before soft-start)
VIN
EN
4V
VCC
DIM
NDRV
VLED
IOUT1
IOUT2
IOUT3
IOUT4
FLT
1ms
Phase shift function
Start function
･UVLO(VIN)
･UVLO(VCC)
･OVP
･TSD
All channels reach 0.5V or more.
→Soft-start finishs, (FB object minimum OUT)
Unused channel
detection
Soft-start
（Feedback object:
OVP×0.95）
･VCC
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3) Example3 (DIM signal is inputted after soft-start)
Natural discharge
VIN
EN
4V
VCC
DIM
NDRV
VLED
IOUT1
IOUT2
IOUT3
IOUT4
FLT
Phase shift function
DIM outputs “H” for 5clks or more.
1ms
Start function
･UVLO(VIN)
→Feedback object change to minimum OUT terminal.
･UVLO(VCC)
･OVP
･TSD
Unused channel
detection
VLED reachs “OVP detection level×0.95"
→Soft-start finishs
Soft-start
（Feedback object:
OVP×0.95）
･VCC
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11. Explanation of Operation
11.1 Unused channel detection
When high signal is input to EN, unused channel detection is operated before soft start.
This function detects that the OUT terminals (OUT1 to 4) are connected to PGND at the same voltage.
Connect the OUT terminals of unused channel to PGND.
The constant current blocks of unused channel are turned off and removed from the object of LED open detection and
LED short detection.
11.2 Dimming control
When high signal is input to DIM, constant current block operates and LED current is generated.
Constant current block operates ON/OFF synchronizing with DIM input.
Feedback control of DC/DC convertor in dimming has 2 modes and they depend on DIM pulse width.
Phase shift function (Delay between constant current channels) is incorporated to prevent simultaneous ON of constant
current from rush current.
11.2.1 Minimum OUT control mode
When pulse width of DIM is 5clks or more of oscillation frequency, the object of feedback control of DC/DC convertor is
the OUT terminal to which the lowest voltage is applied among OUT1, OUT2, OUT3, and OUT4. Voltage booster controls
this minimum OUT voltage to be 0.5V (TYP.).
In OVP control mode, the operation shifts to minimum OUT terminal control mode when ON time of DIM corresponds to
6clks of the oscillation frequency or more.
11.2.2 OVP control mode
When ON time of DIM is less than 5clks of oscillation frequency, the object of feedback control for voltage booster is OVP
detection voltage×95%. When the operation starts from OVP control mode, OVP control mode continues until ON time of
DIM corresponds to 6clks of the oscillation frequency or more.
The minimum pulse width which can be inputted to DIM is 330ns. When a pulse of the width less than 330ns is input, it
may not operate normally. Refer to Page1 (2.Features) and Page4 (6.Pin function).
11.2.3 Phase shift function (Delay between constant current channels)
OUT1 to OUT4 have the delay time of 100ns (typ.) at the ON timing of constant current circuit between each operation
channel. So, sudden current increase caused by turning on OUT1 to 4 at the same time is avoided.
However, this delay time is omitted under the conditions below and constant current circuits between all operating
channels are turned on at the same time. Delay circuit is tuned on just after the initial startup.
When ON time of DIM signal is less than 5clks at the initial operation, delay circuit is turned off at the next signal.
Conditions
1) ON time of DIM signal is less than 5clks. (When delay time is added again, the time is 6clks or more.)
2) Two or more of the OUT terminal controls are turned off among unused channel, open channel and short channel.
OSC
DIM
Short
OUT1 current
Short
OUT2 current
OUT3 current
OUT4 current
Detection is another timing
（after ＭＡＸＩＭ evaluation）
FLT
Low ON time
ON time（6clks or more）
(Less than 5clks)
Delay_ON
Delay_OFF
Delay_ON
Delay_OFF
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11.3 Oscillator
11.3.1 Frequency setting by external resistance (RT)
Oscillation frequency of boost switching is set by RT resistance connected between RT terminal and AGND.
Oscillation frequency is provided by the formula below.
RT = 7.350 x 109/fsw
11.3.1 Oscillation by external signal input
Oscillation frequency synchronized with the external signal is set by inputting external signal to RT terminal.
External signal should be input by AC coupling, and the capacitance for AC coupling is provided by the formula below.
9.862
－0.144×10-3 (μF)
CSYNC ≦
RT
And input signal should fill next formula.
tPW
“
×VS ＜ 0.5
tCLK
tPW
×VS
tCLK
0.8－
＋VS ＞ 3.4
tCLK
× ( tCl－1.05 × tCLK )
tPW ＜
tCl
tPW
External input clock
VS
tCLK
Oscillation frequency
decided by RT resistance
tCl
CSYNC
RT
External input clock
RT
11.4 Constant current setting
Constant current (ILED) can be set by RISET resistance connected between ISET terminal and GND.
ILED is provided by the formula below.
ILED (mA) = 1.23(V) ÷RSETI (kΩ) ×1500
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12. Error detection function
12.1 LED open detection and OVP detection
In the case that VLED rises and overvoltage is detected while object of feedback control is the minimum of OUT
terminal, voltage boosting stops and the open state of OUT terminal is detected.
Voltage of OUT terminal that is open does not rise though VLED rises. Open state is detected by monitoring the
voltage of this OUT terminal. Detecting voltage is 0.2V (typ.) or less.
When open state is detected, operation of only object OUT terminal is turned off. They are eliminated from feedback
control target and low level is output to FLT . Low level of FLT is resumed to high by applying voltage to the EN or to
the power supply.
When voltage of OVP terminal falls 70 mV (typ.) lower than the detecting voltage after overvoltage is detected, SW
operation is resumed.
In the case that operation is resumed without abnormity of open, FLT signal does not output.
VIN
EN
4V
4V
VCC
DIM
SW
operation
SW operation
SW operation
SW operation
VLED
VOUT1
0.5V
VOUT2
VOUT3
Open
Exception of controlled
VOUT4
FLT
Reset by
EN="L”
Detecting
unused OUT
terminal
Detecting
unused OUT
terminal
Soft start
Soft start
OVP detection
Open detection
OVP detection
Open detection
Open at OUT2
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12.2 LED short detection
When high voltage is input to DIM, short detection starts in the IC after 6µs passes. In controlling mode of OVP×95%,
short detection does not operate though high voltage is input to DIM.
Voltage of OUT terminal that detects short is defined in the formula below.
Short detection level = 3.5 × VRSDT
VRSDT corresponds to voltage of RSDT terminal. Apply the voltage set by divided resistance between VCC and
AGND of external IC.
Short detection operates while DIM outputs high. When short state is detected for 2 µs or longer, operation of target
OUT terminal is turned off and they are eliminated from feedback control target. Then low level is output toFLT .
However, short state is released during operation, operation of target OUT terminal is resumed and they become
object of feedback control. Then outputting low to FLT is released. To confirm the release of short state, detected OUT
terminal operates with constant current drive for 6 to 8μs after DIM input.
(Operation of channel delay function is omitted)
Sequence of detection of short-circuit
6～8us
6～8us
6～8us
6～8us
DIM
Reset
Short
Reset
Internal OSC
SW
operation
SW
operation
SW operation
SW operation
ＩOUT1
Stop current
flow
Stop current
flow
Release short
ＩOUT2
IOUT3
IOUT4
FLT
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12.3 TSD (Thermal shut down circuit)
It monitors the temperature of internal IC. When TSD operates, operations of all circuits are turned off.
When TSD detecting temperature falls to recovery temperature or lower, regulator of 5 V operates, unused OUT terminal
is detected, and soft-start function starts up.
12.4 OCP (Over current protection)
Current flowing through external MOS is monitored by monitoring the voltage of CS terminal connected to the source
terminal of the external MOS. CS terminal is connected to the external MOS through the resistance for the slope
compensation.
Detecting mask of 10 ns (typ.) is incorporated to avoid error detection by noise. This noise is generated when “H” is
output from NDRV at the high edge of DIM.
When the voltage of CS terminal exceeds the limit during normal operation, low level is output to NDRV terminal
immediately and the external MOS is turned off. However, error signal is not output in special. The normal operation is
resumed from the next cycle.
In the case that the voltage that is over specification is detected in CS terminal for 5clks or more though external MOS
is turned off, all operations except regulator are turned off. And the abnormal operation is stopped by outputting low level
to FLT . To release this error protection, apply voltage to EN or to power supply.
1) Limit of voltage DC/DC operation by CS limit function
Original necessary ON time
Iternal OSC
NDRV
CS terminal
CS voltage rises because of lack of LED current
STOP by limit
2) Stop abnormal operation by CS limit over
Internal OSC
NDRV
CS terminal
Over limit voltage is output
continually
FLT
Continuing for 5clk
Abnormal stop mode
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12.5 UVLO1 (VIN under voltage lockout)
Voltage of VIN is monitored. It is monitored just after ”H” is input to EN. When VIN falls to specified voltage or lower, all
operations except that of the regulator are turned off.
Regulator operates by operable voltage. When VIN recovers to the recovery voltage or higher, the operation is
resumed. At this time, unused OUT terminal is detected at first.
12.6 UVLO2 (VCC under voltage lockout)
The voltage of regulator is monitored. It starts just after “H” is input to EN. When voltage of regulator output falls to
specified voltage or lower, all outputs except regulator are turned off. Regulator operates by operable voltage.
When output voltage of regulator rises to recovery voltage or higher, the operation is resumed. At this time, unused
OUT terminal is detected at first.
12.7 Detecting functions
12.7.1 Table of detections
Conditions for
starting detection
FLT
---
Detection
Function
All functions are turned off when the temperature of the IC
exceeds detection temperature. When the temperature falls
release voltage from the detecting temperature, the operation
is resumed. The starting sequence of this case is the same as
the sequence just after EN input.
After EN signal is
input ”H”.
TSD
All functions (except regulator.) are turned off when VIN falls
below detecting voltage.
After EN signal is
input ”H”.
---
---
UVLO1
(VIN)
When the voltage rises to the detecting voltage or more, the
operation is resumed. The starting sequence of this case is
the same as the sequence just after EN input.
All functions (except regulator.) are turned off when VCC falls
below detecting voltage.
After EN signal is
input ”H”.
UVLO2
(VCC)
Shutdown signal (=EN: ”L”) is output internally.
When the voltage rises to the detecting value or more, the
operation is resumed. The starting sequence of this case is the
same as the sequence of EN input.
SW operation stops when the voltage of OVP rises to the
detecting voltage or more.
SW operation restarts when the voltage falls below the
detecting voltage.
After EN signal is
input ”H”.
---
OVP
OCP
In the case that the voltage of CS terminal rises to the
detecting voltage or more, output of NDRV terminal is fixed
low until the next cycle starts.
In the case that the operation continues 5 cycles or more
(including the state of fixing low for NDRV terminal), all
functions (except regulator) are turned off by outputting low for
FLT.
After DIM signal is
input ”H”.
Less than 5 cycles:---
5 cycles or more:
L(Latch)
Operations of OUT terminals, which are detecting voltage or
less just after OVP detection, are turned off. They are
eliminated from object of controlling the minimum OUT
terminal voltage.
When all operations of OUT terminal are turned off because of
abnormal state, all functions (except regulator) are turned off.
Detection starts 6µs (typ.) after DIM is input high and
operations of OUT terminals, which are detecting voltage or
more, are turned off. They are eliminated from object of
controlling the minimum OUT terminal voltage.
When all operations of OUT terminal are turned off because of
abnormal state, all functions (except regulator) are turned off.
Just after OVP
detection
FLT =L
(Latch)
LED open
LED short
From Six to eight
µs after DIM is
input “H”.
FLT =L
When short detection
is released and other
abnormal conditions
are not detected,
operation is resumed.
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12.7.2 State of each block in detection
Detection operation
Detection
Conditions
Method of re-startup
VCC
DC/DC control
Constant current
TSD recovery voltage or
less.
TSD
T > 165℃(TYP.)
Stop
Stop
Stop
Stop
Stop
Stop
Stop
VIN < 4.13V(TYP.)
@VIN falling
VIN≥4.3V(TYP.)
@VIN rising
UVLO1(VIN)
UVLO2(VCC)
Continue
Continue
VCC < 3.9V(TYP.)
@VCC falling
VCC≥4.0V(TYP.)
@VCC rising
When the voltage is
OVP recovery voltage
or less, operation is
resumed.
VOVP >
1.228V(TYP.)
@ VOVP rising
OVP
OCP
Continue
Stop
Continue
NDRV
: L fixed
Recovering from the
next cycle.
CS> 0.433V(TYP.)
Continue
Continue
Continue
Stop
CS> 0.433V (TYP.):
for 5 cycles or
more.
Recovering by
Stop
Active
Stop
re-applying voltage of
EN or power supply.
Recovering by
re-applying voltage of
EN or power supply.
Recovering by
Some
channel
Only error terminal:
Stop
(Not controlled)
Continue
Continue
LED
Open
(not all) VOUT* <
0.2V(TYP.)
All
Stop
re-applying voltage of
EN or power supply.
channel
Some
channel
VOUT*>
(not all)
Only error terminal:
Stop
(Not controlled)
When short error is
Continue
Continue
Active
Stop
LED
Short
released, it is resumed
by inputting voltage of
DIM at the next cycle
3.5(TYP.)×VRSDT
All
channel
Stop
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13. Application Circuit
VIN
VCC
DRV
NDRV
CS
OVP
RSDT
OUT1
OUT2
OUT3
OUT4
FLT
EN
DIM
COMP
SETI
RT
AGND PGND1 PGND2
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14. Characteristics (Reference data)
14.1 Characteristics Waveform (Reference data)
・Startup waveform (DIM=L)
･Switching waveform (5kHz/50%Duty)
EN
Sw-Nch
drain
DIM
LED
VLED
NDRV
(100mA)
VLED
･Current (ILED) response
(DIM=20μs Pulse width)
(DIM=5μs Pulse width)
VIN/EN
DIM
VIN/EN
DIM
LED
LED
(100mA)
(100mA)
VLED
VLED
(DIM=1μs Pulse width)
(DIM=0.5μs Pulse width)
VIN/EN
DIM
VIN/EN
DIM
LED
(100mA)
LED
(100mA)
VLED
VLED
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14.2 Characteristics Graph
・LED current (IOUT)
・Switching frequency (fsw)
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Package Dimensions
P-WQFN20-0404-0.50-002
unit: mm
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and
circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by
explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current
and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings,
when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a
large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow
of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit
location, are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to
prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the
negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or
ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection
function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s)
may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly
even just one time.
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[5] Carefully select external components (such as inputs and negative feedback capacitors) and load components (such
as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as input or negative feedback condenser, the IC output DC voltage
will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC
failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular,
please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a
speaker directly.
Points to remember on handling of ICs
(1) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is
appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs
generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life,
deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the
effect of IC heat radiation with peripheral components.
(2) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s
motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this
problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
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in this document, and related hardware, software and systems (collectively "Product") without notice.
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responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
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all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
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parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
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PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
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OCCURRING AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
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