TMPN3120A20U [TOSHIBA]
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC; 东芝CMOS数字集成电路硅单片
| 型号： | TMPN3120A20U |
| 厂家： | 
TOSHIBA |
| 描述： | TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC |
| 文件： | 总12页 (文件大小：228K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMPN3120A20M/U
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TMPN3120A20M, TMPN3120A20U
Neuron ® Chip
®
For Distributed Intelligent Control Networks (L
W
)
ON ORKS
The Neuron Chip (TMPN3120A20M and TMPN3120A20U) provides
double the performance of previous Neuron Chips. It supports a
response time of 3 to 4 ms across a L
W
Network and has
ON ORKS
double the input / output (I / O) performance of the previous Neuron
Chip in terms of both response time and data transmission speed.
Neuron Chips have all the built-in communications and control
functions required to implement L
W
nodes. These nodes
ON ORKS
may then be easily integrated into highly-reliable distributed
intelligent control networks.
The typical functions for this chip are explained below.
FEATURES
ꢀ New features
( In comparison with TMPN3120FE3M and TMPN3120A20M /U )
• Enhanced communication port
• The package is QFP44-P-1010-0.80 (TMPN3120A20U only)
Weight
SOP32-P-525-1.27 : 1.1g (Typ.)
QFP44-P-1010-0.80 : 0.6g (Typ.)
000707EBA1
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
• The information contained herein is subject to change without notice.
2003-07-01 1/12
TMPN3120A20M/U
ꢀ Main features of the 20MHz Neuron Chip
(In comparison with the TMPN3120E1M and TMPN3120A20M / U)
• Increased communication speed
The maximum transmission speed has been increased two-fold.
1.25 Mbps→ 2.5 Mbps (*1)
*1: This value applies to Single-Ended Mode only.
• Shortened response time
The amount of time required from I / O input to I / O output has been greatly reduced.
Maximum speed 7ms →3~4 ms
• Increased IO object speed
The execution time for all objects has been halved.
Example) Serial I / O 9600bps
Parallel I / O 1.2µs / byte
• Development tool support
The current LonBuilder®and NodeBuilder® development tools can be used to develop applications for the
TMPN3120A20M and TMPN3120A20U (L.B ver. 3.0 or 3.01 is needed). Updated symbol table files for
the Neuron Chip firmware are available from Echelon. If your application requires a 20MHz input clock,
a utility program available from Echelon may be used to convert the programmer files.
*
The conversion utilities can be obtained from the Echelon Web Site at http://www.echelon.com.
ꢀ I / O Functions
• Eleven programmable I / O pins.
• Two programmable 16-bit timers and counters built in.
• 34 different types of I / O functions to handle a wide range of input and output.
• ROM firmware image containing pre-programmed I / O drivers, greatly simplifying application programs.
ꢀ Network functions
• Two CPUs for communication protocol processing built in.
The communications and application CPUs execute in parallel.
• Equipped with a built-in LonTalk protocol which supports all seven levels of the OSI reference model with
ISO.
• The ROM firmware image contains a complete network operating system, greatly simplifying application
programs.
• Built-in twisted-pair wire transceiver with improved common mode and drive current capabilities.
• Equipped with communications modes and communication speeds which support various types of external
transceivers.
Supports twisted-pair wire, power line, radio ( RF ), infrared, coaxial cables, and fiber optics.
• Communication port transceiver modes and logical addresses stored within the EEPROM.
Can be amended via the network.
2003-07-01 2/12
TMPN3120A20M/U
Other functions
• Application programs are also stored within the EEPROM.
Can be updated by downloading over the network.
• Built-in watch-dog timer.
• Each chip has a unique ID number.
Effective during the logical installation of networks.
• Low electrical consumption mode supported with a sleep mode.
• Built in Selectable Reset time
Prolongs the power-ON reset time for at least 50ms and keeps the operation stable during that time. The
reset time can be selected 50ms delay mode or 3clock delay mode by program after the device is in power-ON.
• High-impedance communication port ( CP0 to CP3 )
The Communication port pins ( CP0 to CP3 ) attain high impedance. This eliminates the need for an external
relay.
• Built-in low-voltage detection circuit.
Prevents in correct operations and writing errors in the EEPROM during drops in power voltage.
An external LVD must be used to assert reset at power supply voltage below 4.5 V if Neuron Chip is operated
at 20 MHz.
• Programmable LVD (Low Voltage Detection) circuit.
LVDin pin is prepared in order to make it reset on arbitrary voltage.
• Firmware version 9.
ꢀ Timing for the main I / O objects during 20 MHz Neuron Chip operations
I / O MODEL
10 MHz TIMING
2.4µs / byte
20 MHz TIMING
1.2µs / byte
Parallel
Bitshift
1, 10 or 15 kbps
Up to 8334 bps
Up to 7246 bps
1, 10 or 20 kbps
Up to 18 kbps
2, 20 or 30 kbps
Up to 16668 bps
Up to 14492 bps
2, 20 or 40 kbps
Up to 36 kbps
Magcard
Magtrack1
Neurowire Master
Neurowire Slave
Serial
600, 1200, 2400 or 4800 bps
Supported
1200, 2400, 4800 or 9600 bps
Not supported
Touch
Resolution0.4 to 51.2µs
Resolution0.2 to 25.6µs
Max Range 13.1 to 1678 ms
Resolution0.1 to 12.8µs
Max Range 6.55 to 839 ms
Frequency Output
Max Range 26.21 to 3355 ms
Resolution0.2 to 25.6µs
Other Timer / Counter
Max Range 13.1 to 1678 ms
The specifications for the main timers during 20 MHz
operations are as follows :
Watchdog Timer
Millisecond Timers
Second Timers
420 ms
1 to 32000 ms
1 to 65000 s
1 to 32767 counts
Delay ( ) Function
Get_Tick_Count ( )
Function
409.6µs per count
2003-07-01 3/12
TMPN3120A20M/U
BLOCK DIAGRAM
ITEM
TMPN3120A20M
TMPN3120A20U
CPU
RAM
8-bit CPU × 3
1,024 bytes
16,384 bytes
1,024 bytes
2 channels
No
8-bit CPU× 3
1,024 bytes
16,384 bytes
1,024 bytes
2 channels
No
ROM
EEPROM
16-bit Timer / Counter
External Memory Interface
Package
32-pin SOP
44-pin QFP
2003-07-01 4/12
TMPN3120A20M/U
PIN CONNECTION
* : All NC pins should be open.
2003-07-01 5/12
TMPN3120A20M/U
PIN FUNCTION
PIN No.
PIN NAME
I / O
PIN FUNCTION
TMPN3120A20M
TMPN3120A20U
15
14
15
14
CLK1
CLK2
Input
Oscillator connection, or external clock input.
Oscillator connection. Leave open when external
clock is input to CLK1.
Output
I / O
(built-in pull-up)
I / O
1
40
~RESET
Reset pin. ( Active low )
(built-in
configurable
pull-up)
8
5
~SERVICE
Service pin. Indicator output during operation.
Large current sink capacity ( 20 mA ).
General I / O port.
7~4
4~2, 43
IO ~IO
I / O
0
3
General I / O port. One of IO to IO can be
I / O
4
7
specified as No.1 timer / counter input. Output
signal can be output to IO .
(built-in
configurable
pull-up)
3, 30~28
42, 36, 35, 32
31, 30, 27
IO ~IO
4
7
0
IO can be used as the No.2 timer / counter input
4
with IO as output.
1
General I / O port. Can be used for serial
communication with other device.
27, 26, 24
IO ~IO
I / O
8
10
11, 12, 18, 25, 32
9, 10, 19, 29, 38
V
Input
Input
Power input ( 5.0 V Typ. )
Power input ( 0 V GND )
DD
9, 10, 13, 16, 23, 31
7, 8, 13, 16, 26, 37
V
SS
Input pin for programmable LVD
2
41
LVD
Input
in
( Normally connect to V
)
DD
Bidirectional port for communications. Supports
several communications protocols by specifying
mode.
19, 20, 17, 21, 22
20, 21, 18, 24, 25
CP ~CP
0
I / O
4
1, 6, 11, 12, 17, 22,
23, 28, 33, 34, 39,
44
―
NC
―
Do not connect anything. Leave pins open.
* : ● The ~SERVICE and IO to IO terminals are programmable pull-ups.
4
7
● All V
terminals must be externally connected.
DD
● All V terminals must be externally connected.
SS
2003-07-01 6/12
TMPN3120A20M/U
MAXIMUM RATINGS ( V = 0V, V typ.)
SS
SS
ITEM
SYMBOL
RATING
UNIT
Power Supply Voltage
Input Voltage
V
−0.3~7.0
V
V
DD
V
−0.3 to V
+ 0.3 V
IN
DD
−0.5 to V
+ 1.3 V
DD
Input Voltage CP -CP
0
V
V
3
IN (2)
V
< 7.3
IN (2)
Power Dissipation
P
800
−65~150
mW
°C
D
Storage Temperature
T
stg
OPERATING CONDITIONS
MIN
TYP.
MAX
5.5
UNIT
ITEM
SYMBOL
Operating Voltage
V
4.5
2.0
5.0
―
―
―
―
―
―
―
―
V
V
V
V
V
DD
V
V
IH
DD
Input Voltage ( TTL )
V
V
0.8
IL
SS
V
V
− 0.8 V
V
IH
DD
DD
Input Voltage ( CMOS )
V
V
0.8
IL
SS
V
―
V
+ 1.0 V
―
IH
DD
Input Voltage CP -CP
0
( differential mode )3
V
V
−0.1
0.625
−40
IL
Operating Frequency
f
20
MHz
°C
osc
Operating Temperature
T
opr
85
2003-07-01 7/12
TMPN3120A20M/U
ELECTRICAL CHARACTERISTICS
DC characteristic ( V = 5.0 V ± 10%, V = 0 V, Ta = −40~85°C )
DD
SS
( Above operating conditions apply unless otherwise states. )
ITEM
SYMBOL
PINS
TEST CONDITION
MIN
0
MAX
0.8
UNIT
IO ~IO
10
0
LOW Level Input Voltage (1)
LOW Level Input Voltage (2)
HIGH Level Input Voltage (1)
HIGH Level Input Voltage (2)
LOW Output Voltage (1)
V
V
(1)
(2)
(1)
(2)
(1)
CP , CP , CP ,
―
―
―
―
V
V
V
V
V
IL
IL
0
3
4
~SERVICE
~RESET
V
DD
0
× 0.3
IO ~IO
10
0
V
V
V
CP , CP , CP ,
2.0
V
V
IH
IH
0
3
4
DD
DD
~SERVICE
~RESET
V
DD
− 0.7 V
IO ~IO
I
I
I
I
= 20mA
= 10mA
= 40mA
=1.4mA
0
0
0
0
0.8
0.4
1.0
0.4
0
3
OL
OL
~SERVICE,
~RESET
OL
LOW Output Voltage (2)
LOW Output Voltage (3)
V
V
(2)
(3)
CP , CP
V
V
OL
2
3
OL
OL
Others ( Note 1 )
OL
V
DD
HIGH Output Voltage (1)
HIGH Output Voltage (2)
HIGH Output Voltage (3)
V
V
V
V
(1)
(2)
(3)
(4)
IO ~IO
I
I
I
I
= −1.4mA
= −1.4mA
= −40mA
= −1.4mA
V
V
V
V
OH
OH
OH
OH
0
3
OH
OH
OH
OH
DD
DD
DD
DD
− 0.4 V
V
DD
~SERVICE
CP , CP
V
V
V
− 0.4 V
V
DD
2
3
− 1.0 V
V
DD
HIGH Output Voltage (4)
Input Current
Others ( Note 1 )
( Note 2 )
V
− 0.4 V
−10
I
V
V
= V ~V
SS DD
10
−300
4.5
µA
IN
IN
IN
IO ~IO
4
7
I
PU
Pull-up Current
~SERVICE,
~RESET
= 0V
−30
µA
V
(Note 3)
Low-voltage Detection Level
V
V
―
3.8
LVD
DD
Note1 : Output voltage characteristics exclude the CLK2 pin.
Note2 : Excludes pull-up input pins.
Note3 : The IO to IO and ~SERVICE pins have programmable pull-ups. ~RESET has a fixed pull-up.
4
7
2003-07-01 8/12
TMPN3120A20M/U
ITEM
SYMBOL
TYP.
MAX
UNIT
mA
20 MHz Clock
10 MHz Clock
5 MHz Clock
33
15
7
55
30
15
8
Operating
Mode
I
DD (OP)
Current
2.5 MHz Clock
1.25 MHz Clock
4
Consumption
2.2
1.2
5
0.625 MHz Clock
3
Sleep Mode Current
Consumption
I
16
100
µA
DD (SLP)
Note: Test conditions for current dissipation
VDD = 5V, all output = with no load, all input = 0.2V or below or VDD − 0.2 V, programmable pull-up = off,
crystal oscillator clock input, differential receiver disabled.
The current value ( typ. ) is a typical value when Ta = 25.°C
The current value ( max ) applies to the rated temperature range at VDD = 5.5 V.
200Aµ( typ. ) to 600µA ( max ) is added to the current of the differential receiver when the receiver is
enabled.
The differential receiver is enabled by either of the following conditions :
● When the Neuron Chip is in Run mode and the communication ports are in Differential mode.
● When the Neuron Chip is in Sleep mode, the communication ports are in Differential mode, and the
Comm Port Wakeup is not masked.
2003-07-01 9/12
TMPN3120A20M/U
ꢀ Echelon, Neuron, LON, LonTalk, LonBuilder, NodeBuilder, LONWORKS, 3150, 3120 and LonManager are the
registered trade marks of America’s Echelon Inc.
ꢀ The Neuron Chip is manufactured by Toshiba under license from Echelon Corporation, USA. A licensing
agreement between the customer and Echelon Corporation must be concluded before purchasing any of the
neuron chip products.
2
2
ꢀ The Neuron chip itself does not include the I C object function. You need the “I C Library” delivered by Echelon.
2
2
The Neuron chip and the I C Library do not convey nor imply a right under any I C patent rights of Philips
Electronics N.V. ( “Philips” ) to make, use or sell any product employing such patent rights. Please refer all
questions with respect to I C patents and licenses to Philips at:
2
Mr. Gert-Jan Hessenlmann
Corporate Intellectual Property
Philips International B.V.
Prof. Holstlaan 6
Building WAH 1-100
P.O. Box 220
5600 AE, Eindhoven, The Netherlands
Phone : +31 40 274 32 61
Fax : +31 40 274 34 89
E-mail: Gert.Jan.Hesselmann@philips.com.
2003-07-01 10/12
TMPN3120A20M/U
PACKEGE DIMENSIONS
2003-07-01 11/12
TMPN3120A20M/U
PACKEGE DIMENSIONS
2003-07-01 12/12
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