TSM950N10CWRPG [TSC]
N-Channel Power MOSFET;
| 型号： | TSM950N10CWRPG |
| 厂家： | 
TAIWAN SEMICONDUCTOR COMPANY, LTD |
| 描述： | N-Channel Power MOSFET |
| 文件： | 总6页 (文件大小：376K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSM950N10
Taiwan Semiconductor
N-Channel Power MOSFET
100V, 6.5A, 95mΩ
FEATURES
KEY PERFORMANCE PARAMETERS
●
●
100% avalanche tested
PARAMETER
VALUE
UNIT
Fast switching
VDS
100
V
●
●
●
Pb-free plating
VGS = 10V
VGS = 4.5V
95
RoHS compliant
RDS(on) (max)
Qg
mΩ
Halogen-free mold compound
110
9.3
nC
APPLICATION
●
●
●
Networking
Load Switch
Lighting
SOT-223
Notes: Moisture sensitivity level: level 3. Per J-STD-020
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
100
V
V
VGS
±20
TC = 25°C
6.5
Continuous Drain Current (Note 1)
ID
A
TC = 100°C
4.1
Pulsed Drain Current (Note 2)
IDM
26
9
A
Total Power Dissipation @ TC = 25°C
PDTOT
W
°C
Operating Junction and Storage Temperature Range
TJ, TSTG
- 55 to +150
THERMAL PERFORMANCE
PARAMETER
SYMBOL
RӨJC
LIMIT
14
UNIT
°C/W
°C/W
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance
RӨJA
62
Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is determined by the user’s board
design. RӨJA shown below for single device operation on FR-4 PCB in still air
ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted)
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX UNIT
Document Number: DS_P0000183
1
Version: A15
TSM950N10
Taiwan Semiconductor
Static (Note 3)
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
VGS = 0V, ID = 250µA
VDS = VGS, ID = 250µA
VGS = ±20V, VDS = 0V
VDS = 100V, VGS = 0V
VGS = 10V, ID = 5A
BVDSS
VGS(TH)
IGSS
100
1.2
--
--
1.6
--
--
2.5
±100
1
V
V
nA
µA
Zero Gate Voltage Drain Current
IDSS
--
--
--
80
85
95
Drain-Source On-State Resistance
RDS(on)
mΩ
VGS = 4.5V, ID = 3A
110
Dynamic (Note 4)
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Qg
Qgs
Qgd
Ciss
Coss
Crss
Rg
--
--
--
--
--
--
--
9.3
2.1
--
--
--
--
--
--
--
VDS = 48V, ID = 5A,
VGS = 10V
nC
1.8
1480
480
35
VDS = 50V, VGS = 0V,
f = 1.0MHz
pF
F = 1MHz, open drain
1.3
Ω
Switching (Note 5)
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
td(on)
tr
td(off)
tf
--
--
--
--
2.9
9.5
--
--
--
--
VDD = 30V,
RGEN = 3.3Ω,
ns
18.4
5.3
ID = 1A, VGS = 10V,
Source-Drain Diode (Note 3)
Forward On Voltage
--
--
--
--
--
--
1
V
A
A
IS = 3.3A, VGS = 0V
VSD
IS
Continuous Drain-Source Diode
Pulse Drain-Source Diode
6.5
VG=VD=0V, Force Current
ISM
26
Notes:
1. Current limited by package
2. Pulse width limited by the maximum junction temperature
3. Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
4. For DESIGN AID ONLY, not subject to production testing.
5. Switching time is essentially independent of operating temperature.
Document Number: DS_P0000183
2
Version: A15
TSM950N10
Taiwan Semiconductor
ORDERING INFORMATION (EXAMPLE)
PART NO.
TSM950N10CW RPG
Note:
PACKAGE
SOT-223
PACKING
2,500pcs / 13” Reel
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number: DS_P0000183
3
Version: A15
TSM950N10
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TC = 25°C unless otherwise noted)
Continuous Drain Current vs. TC
Gate Charge
Qg, Gate Charge (nC)
TC, Case Temperature (°C)
On-Resistance vs. Junction Temperature
Threshold Voltage vs. Junction Temperature
TJ, Junction Temperature (°C)
TJ, Junction Temperature (°C)
Maximum Safe Operating Area
Normalized Thermal Transient Impedance Curve
Square Wave Pulse Duration
VDS, Drain to Source Voltage (V)
Document Number: DS_P0000183
4
Version: A15
TSM950N10
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
SOT-223
SUGGESTED PAD LAYOUT (Unit: Millimeters)
MARKING DIAGRAM
Y = Year Code
M = Month Code for Halogen Free Product
O =Jan P =Feb Q =Mar R =Apr
S =May T =Jun U =Jul
V =Aug
W =Sep X =Oct
Y =Nov Z =Dec
L
= Lot Code (1~9, A~Z)
Document Number: DS_P0000183
5
Version: A15
TSM950N10
Taiwan Semiconductor
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
Document Number: DS_P0000183
6
Version: A15
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