DMP1045U [TYSEMI]

P-CHANNEL ENHANCEMENT MODE MOSFET Low Input Capacitance; P沟道增强型MOSFET的低输入电容


型号：	DMP1045U
厂家：	TY Semiconductor Co., Ltd
描述：	P-CHANNEL ENHANCEMENT MODE MOSFET Low Input Capacitance P沟道增强型MOSFET的低输入电容
文件：	总2页 (文件大小：184K)
中文：	中文翻译
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Product specification

DMP1045U

P-CHANNEL ENHANCEMENT MODE MOSFET

Product Summary

Features and Benefits

•

Low On-Resistance

Low Input Capacitance

Fast Switching Speed

Low Input/Output Leakage

Lead Free By Design/RoHS Compliant (Note 1)

ESD Protected Up To 3kV

"Green" Device, Halogen and Antimony Free (Note 2)

Qualified to AEC-Q101 Standards for High Reliability

I_D

V_(BR)DSS

R_{DS(on) max}

T_A= 25°C

5.2A

4.3A

31mΩ@ V_GS= -4.5V

45mΩ@ V_GS=-2.5V

-12V

Mechanical Data

Description and Applications

•

Case: SOT-23

This new generation MOSFET has been designed to minimize the on-

state resistance (R_DS(on)) and yet maintain superior switching

performance, making it ideal for high efficiency power management

applications.

Case Material: Molded Plastic, “Green” Molding Compound. UL

Flammability Classification Rating 94V-0

Moisture Sensitivity: Level 1 per J-STD-020

Terminal Connections: See Diagram

Terminals: Finish – Matte Tin annealed over Copper leadframe.

Solderable per MIL-STD-202, Method 208

Weight: 0.0072 grams (approximate)

Drain

•

DC-DC Converters

Power management functions

Analog Switch

•

SOT-23

Gate

Protection

Diode

Source

ESD PROTECTED TO 3kV

Top View

Pin Configuration

Internal Schematic

Ordering Information ^{(Note 3)}

Part Number

DMP1045U-7

Case

SOT-23

Packaging

3,000/Tape & Reel

Notes:

1. No purposefully added lead. Halogen and Antimony Free.

Marking Information

15P = Marking Code

YM = Date Code Marking

Y = Year (ex: X = 2010)

15P

M = Month (ex: 9 = September)

Date Code Key

Year

2010

2011

2012

2013

2014

2015

Code

Month

Code

Jan

Feb

Mar

Apr

May

Jun

Jul

Aug

Sep

Oct

Nov

Dec

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Product specification

DMP1045U

Maximum Ratings ^@T_A= 25°C unless otherwise specified

Characteristic

Drain-Source Voltage

Symbol

V_DSS

Value

Units

-12

±8

Gate-Source Voltage

V_GSS

_A= 25°C

Steady

Continuous Drain Current (Note 4) V_GS= -4.5V

State

4.0

3.1

I_D

T_A= 70°C

T_A= 25°C

Steady

Continuous Drain Current (Note 4) V_GS= -2.5V

State

3.3

2.6

T_A= 70°C

Steady

Continuous Drain Current (Note 5) V_GS= -4.5V

State

T_A= 25°C

T_A= 70°C

5.2

4.2

Steady

Continuous Drain Current (Note 5) V_GS= -2.5V

State

_A= 25°C

_A= 70°C

4.3

3.4

Maximum Continuous Body Diode Forward Current (Note 5)

I_S

Pulsed Drain Current (10us pulse, duty cycle=1%) (Note 4)

I_DM

Thermal Characteristics ^@T_A= 25°C unless otherwise specified

Characteristic

Total Power Dissipation (Note 4)

Symbol

Value

0.8

Units

P_D

Thermal Resistance, Junction to Ambient (Note 4)

Total Power Dissipation (Note 5)

168

1.3

°C/W

R_θ

P_D

Thermal Resistance, Junction to Ambient (Note 5)

°C/W

R_θ

Thermal Resistance, Junction to Case (Note 5)

Operating and Storage Temperature Range

14.8

°C/W

°C

-55 to +150

T_J,T_STG

Electrical Characteristics ^@T_A= 25°C unless otherwise specified

Characteristic

OFF CHARACTERISTICS (Note 6)

Drain-Source Breakdown Voltage

Zero Gate Voltage Drain Current

Gate-Source Leakage

Symbol

Min

Typ

Max

Unit

Test Condition

BV_DSS

I_DSS

-12

V_GS= 0V, I_D= -250μA

_DS= -12V, V_GS= 0V

V_GS= ±8V, V_DS= 0V

T_J= 25 C

-1.0

±10

μA

I_GSS

ON CHARACTERISTICS (Note 6)

Gate Threshold Voltage

V_GS(th)

-0.3

-0.55

-1.0

V_DS= V_GS, I_D= -250μA

_GS= -4.5V, I_D= -4.0A

_GS= -2.5V, I_D= -3.5A

Static Drain-Source On-Resistance

R_{DS (ON)}

mΩ

V_GS= -1.8V, I_D= -2.7A

V_DS= -5V, I_D= -4A

V_GS= 0V, I_S= -1A

Forward Transfer Admittance

Diode Forward Voltage

|Y_fs|

V_SD

-0.6

DYNAMIC CHARACTERISTICS (Note 7)

Input Capacitance

C_iss

C_oss

C_rss

R_g

1357

504

Ω

V_DS= -10V, V_GS= 0V

f = 1.0MHz

Output Capacitance

Reverse Transfer Capacitance

Gate Resistnace

235

14.1

V_DS= 0V, V_GS= 0V, f = 1.0MHz

SWITCHING CHARACTERISTICS (Note 7)

Total Gate Charge

Q_g

Q_gs

Q_gd

t_D(on)

t_r

15.8

2.0

Gate-Source Charge

Gate-Drain Charge

V_GS= -4.5V, V_DS= -10V, I_D= -4A

3.9

Turn-On Delay Time

15.7

23.3

91.2

106.9

Turn-On Rise Time

_DS= -10V, V_GS= -4.5V,

Turn-Off Delay Time

t_D(off)

t_f

R_L= 2.5Ω, R_G= 3.0Ω

Turn-Off Fall Time

Notes:

2. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided.

3. Device mounted on FR-4 substrate PC board, 2oz copper, with thermal vias to bottom layer 1inch square copper plate

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