FDN361BN [TYSEMI]

SuperSOT-3;


型号：	FDN361BN
厂家：	TY Semiconductor Co., Ltd
描述：	SuperSOT-3 晶体晶体管开关光电二极管 PC
文件：	总2页 (文件大小：233K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SMD Type

Product specification

FDN361BN

General Description

Features

These N-Channel Logic Level MOSFETs are produced

• 1.8 A, 30 V.

R_DS(ON)= 110 mΩ @ V_GS= 10 V

R_DS(ON)= 160 mΩ @ V_GS= 4.5 V

using

Fairchild

Semiconductor’s

advanced

PowerTrench process that has been especially tailored

to minimize the on-state resistance and yet maintain

superior switching performance.

• Low gate charge

These devices are particularly suited for low voltage

applications in notebook computers, portable phones,

PCMCIA cards, and other battery powered circuits

where fast switching, and low in-line power loss are

needed in a very small outline surface mount package.

• Industry standard outline SOT-23 surface mount

package using proprietary SuperSOT^TM-3 design for

superior thermal and electrical capabilities

• High performance trench technology for extremely

low R^DS(ON)

SuperSOT^TM-3

Absolute Maximum Ratings T_A=25^oC unless otherwise noted

Symbol

V_DSS

Parameter

Drain-Source Voltage

Ratings

Units

V_GSS

Gate-Source Voltage

± 20

I_D

Drain Current – Continuous

– Pulsed

(Note 1a)

1.4

Power Dissipation for Single Operation

(Note 1a)

(Note 1b)

0.5

P_D

0.46

T_J, T_STG

Operating and Storage Junction Temperature Range

–55 to +150

°C

Thermal Characteristics

Thermal Resistance, Junction-to-Ambient

Thermal Resistance, Junction-to-Case

(Note 1a)

(Note 1)

250

R_θJA

°C/W

R_θJC

Package Marking and Ordering Information

Device Marking

Device

Reel Size

Tape width

Quantity

3000 units

361B

FDN361BN

7’’

8mm

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SMD Type

Product specification

FDN361BN

Electrical Characteristics

T_A= 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min Typ Max Units

Off Characteristics

BV_DSS

Drain–Source Breakdown Voltage

V_GS= 0 V,

I_D= 250 μA

ΔBV^DSS

ΔT_J

Breakdown Voltage Temperature

Coefficient

I_D= 250 μA,Referenced to 25°C

mV/°C

I_DSS

Zero Gate Voltage Drain Current

V_DS= 24 V,

V_GS= 0 V

μA

V_DS= 24 V, V_GS= 0 V, T_J= 55°C

I_GSS

Gate–Body Leakage

V_GS= ±20 V,

V_DS= 0 V

±100

On Characteristics

(Note 2)

V_GS(th)

Gate Threshold Voltage

2.1

_DS= V_GS

I_D= 250 μA

R_DS(on)

Static Drain–Source

On–Resistance

V_GS= 10 V,

V_GS= 4.5 V,

V_GS= 10 V, I_D= 1.4 A, T_J= 125°C

I_D= 1.4 A

I_D= 1.2 A

120

114

110

160

150

mΩ

I_D(on)

g_FS

On–State Drain Current

V_GS= 4.5 V,

V_DS= 5 V

3.5

Forward Transconductance

V_DS= 5 V,

I_D= 1.4 A

Dynamic Characteristics

C_iss

C_oss

C_rss

R_G

Input Capacitance

145

193

V_DS= 15 V,

f = 1.0 MHz

V _GS= 0 V,

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance

V_GS= 15 mV,

f = 1.0 MHz

1.6

Switching Characteristics ^{(Note 2)}

t_d(on)

t_r

t_d(off)

t_f

Turn–On Delay Time

Turn–On Rise Time

Turn–Off Delay Time

Turn–Off Fall Time

Total Gate Charge

Gate–Source Charge

Gate–Drain Charge

V_DD= 15 V,

V_GS= 10 V,

I_D= 1 A,

R_GEN= 6 Ω

Q_g

Q_gs

Q_gd

1.3

0.5

1.8

V_DS= 15 V,

I_D= 1.4 A,

_GS= 4.5 V

Drain–Source Diode Characteristics

V_SD

Drain–Source Diode Forward

Voltage

V_GS= 0 V, I_S= 0.42 A (Note 2)

I_F= 1.4 A, d_iF/d_t= 100 A/µs

0.8

1.2

t_rr

Diode Reverse Recovery Time

Diode Reverse Recovery Charge

Q_rr

Notes:

1. R_θJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

the drain pins. R_θJCis guaranteed by design while R_θCAis determined by the user's board design.

b) 270°C/W when mounted on a

minimum pad.

a) 250°C/W when mounted on a

0.02 in pad of 2 oz. copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 μs, Duty Cycle ≤ 2.0%

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4008-318-123