uP7558SMA5 [UPI]
Current-Limited, Power Distribution Switches;型号: | uP7558SMA5 |
厂家: | uPI Semiconductor Corp. |
描述: | Current-Limited, Power Distribution Switches |
文件: | 总16页 (文件大小:619K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Conceptual
Current-Limited, Power Distribution Switches
uP7558
Features
General Description
The uP7558 is a current limited high-side switch designed Compliant to USB Specficns
for applications where heavy capacitive loads and short-
circuits are likely to be met. This device operates with
inputs from 2.7V to 5.5V for both 3V and 5V systems. Its
low quiescent current and shutdown current(<1uA) conserve
battery power in portable.
Operating Range: 2.7 V to
75mΩ (5V Input) High Side SFET Switch
100uA Typical QuiesceCurrent
<1uA Typical Sdown Current
Over Current/ Short it Protection
Output Reveoltage/Current Protection
Fast Short-Crcuit Rponse Time: 2us (typ.)
Thermal Shuown Protection
Deglitched Open Drain Fault Flag
Slow On nd Fast Turn Off
EnabltiveHigh or Active-Low
Pree (RoHS Compliant)
The power switch is controlled by a logic enable input and
driven by an internal charge pump circuit. When the output
load exceeds the current-limit threshold or a short is
present, the uP7558 asserts over current protection and
limits the output current to a safe level by driving the power
switch into saturation mode.
The uP7558 features glitch-blank fault flag that is asserted
by over current and over temperature. The 8ms glitch-
blanking time allows momentary faults to be ignored, thus
preventing false alarms to the host system.
ved E316940
254704 Certification
Other features include soft-start to limit inrush current
during plug-in, thermal shutdown to prevent catastrophic
switch failure from high-current loads, under-voltage lockut
(UVLO) to ensure that the device remains off unless the
is a valid input voltage present, and output reverse voltage
to turn off the power switch when the output voltage is
higher than input voltage. The uP7558 is availabin
TSOT23-5L, TSOT23-5L(Flip-Chip), SOT23 - 5Land
MSOP-8L packages.
CB 60950-1 Certification
Applications
Notebook and Desktop PCs
USB Power Management
ACPI Power Distribution
Hot-Plug Power Supplies
Battery-Powered Equipments
Battery-Charger Circuits
Pin Configuration
OC#
GND
1
2
3
5
VOUT
VOUT
GND
OC#
1
2
5
4
VOUT
GND
OC#
1
2
3
5
VIN
EN/EN#
4
VIN
/EN#
4
EN/EN#
SOT23-5L
(uP7558RMA5/uP7558SMA5)
TSOT23-5L
(uP7558PMT5/uP7558QMT5)
5L
(uP7558QMA5)
VOUT
GND
OC#
1
2
3
5
VIN
GND
VIN
2
8
7
VOUT
VOUT
VOUT
OC#
VIN
3
4
6
5
EN/EN#
4
EN/EN#
MSOP-8L
(uP7558PRA8/uP7558QRA8)
TSOT23-5L Flip-Chip
(uP7558PMD5/uP7558QMD5)
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1
Conceptual
uP7558
Ordering Information
Order Number
uP7558PRA8-XX
uP7558QRA8-XX
uP7558PMA5-XX
uP7558QMA5-XX
uP7558RMA5-XX
uP7558SMA5-XX
uP7558PMT5-XX
uP7558QMT5-XX
uP7558PMD5-XX
uP7558QMD5-XX
Package
MSOP-8L
Remark
Enable Ae High
Enctive Low
Eblve High
Enable Active Low
EnabActive High
nle Active Low
Enable Active High
Enable Active Low
Enable Active High
Enable Active Low
MSOP-8L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
TSOT23-5L
TSOT23-5L
TSOT23-5L (Flip-Chip)
TSOT23-5L (Flip-Chip)
Code XX
Typical Current Lim
Typical Short Circuit Current (A)
10
15
20
25
30
1.5
2.1
2
3.3
3
0.9
1.0
1.5
2.0
2.6
Note:
(1) Please check the sample/production availability with urepresentatives.
(2) uPI products are compatible with the currenEDEC J-STD-020 requirement. They are halogen-free, RoHS
compliant and 100% matte tin (Sn) plating thble for use in SnPb or Pb-free soldering processes.
Typical Application Circuit
OFF
VOUT
VOUT
VOUT
GND
EN/EN#
VIN
VOUT
ON
0.1uF
150uF
VIN
100k
VIN
0.1uF
OC#
2
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Conceptual
uP7558
Functional Pin Description
Pin Name Pin Function
Fault Flag. This is an active-low, open-drain fault flag output for the power switch. ms deglitch on
both the rising and falling edges avoids false triggering at startup and during transients.
OC#
Output Voltage. This pins is output from N-Channel MOSFET Source. Byass n with a
minimum 22uF capacitor to ground.
VOUT
Ground.
GND
Enable Input. This is the enable input to turn on/off the power swit
EN/EN#
Supply Input. This is the input pin to N-Channel MOSFET Drain and supply to control circuit. Bypass
this pin with a 10uF capacitor to ground.
VIN
Functional Block Diagram
Output Reverse Voltage/nt
Protection
VIN
VIN
VOUT
VOUT
Charge
Pump
Enable
Logic
EN
EN#
Driver
rrent Limit
OC#
GND
Thermal
Sense
Deglitch
UVLO
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Conceptual
uP7558
Functional Description
Power Switch
Over Current Limit
The power switch is anN-channel MOSFET with a low on- The uP7558 continuous monitors toutput current for over
state resistance. Configured as a high-side switch, the current protection to protect the systeower, the power
power switch prevents current flow from VOUT to VINand switch, and the load from damaring output short circuit
VIN to VOUT when disabled. The power switch is controlled or soft start interval. When aovor short circuit is
by a logic enable input and driven by an internal charge encountered, the current-sense try sends a control
pump circuit. When the output load exceeds the current- signal to the driver. The iver in turn reduces the gate
limit threshold or a short is present, the uP7558 asserts voltage and drives the power Finto its saturation region,
over current protection and limits the output current to a which switches the ut into a constant-current mode
safe level by driving the power switch into saturation mode. and holds the current consthile varying the voltage on
the load.
Charge Pump
Fault Flag
An internal charge pump supplies power to the driver circuit
and provides the necessary voltage to pull the gate of the The uP7558 asserts lt condition and pulls low OC# when
MOSFET above the source. The charge pump operates over currentr temperature condition is encountered.
from input voltage.
The outpuins sserted until the over current and over
temperaturndion is removed.A8ms deglitch on both
the risiand falling edges avoids false triggering at startup
and sients. If an over temperature shutdown or
oveccurs,the OC# is asserted instantaneously.
Driver
The driver controls the gate voltage of the power switch. To
limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver
incorporates circuitry that controls the rise times and fall
times of the output voltage.
Over Temperature Protection
The u558 continuously monitor the operating temperature
of the power switch for over temperature protection. The
uP58 asserts over temperature and turns off the power
switch to prevent the device from damage if the junction
tmperature rises to approximately 135OC due over current
or short-circuit conditions. Hysteresis is built into the
thermal sense, the switch will not turns back on until the
device has cooled approximately 20 degrees. The open-
drain false reporting output (OC#) is asserted (active low)
when an over temperature shutdown or over current occurs.
Chip Enable
Refer to Ordering Information,the uP7558 has active hih
(EN) or active low (EN#).The ENpin receives aTTLor COS
compatible input to enable/disable the uP7558 Lolow
disables the power switch, charge pump, gate driver a
other circuitry and reduces the supply current doless
than 1uA.Logic high restores bias to the drive ol
circuits and turns the switch on.
The EN# pin receives a TTL or CMOompatible input to
enable/disable the uP7558. Logic hh disables e power
switch, charge pump, gate drivand othcircuitry
and reduces the supply current dowo leshan 1uA.
Logic low restores bias to the drive and control circuits and
turns the switch on.
Output Voltage Discharge When Disabled
The output voltage is discharged through an internal resistor
when the output voltage is disabled.
Soft Start
The uP7558 features st function to eliminate the
inrush current into dam and voltage droop of
upstream when hot-plth capacitive loads. The soft
start interval is 0.9ms typic. The uP7558 current limit
function may be activuring the plug-in of extreme large
capacitive load. The fault flis masked during the softstart
interval.
Under Voltage Lockout
A voltage sense circuit monitors the input voltage. When
the input voltage is below approximately 2.2V, a control
signal turns off the power switch.
4
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Conceptual
uP7558
Functional Description
Reverse-Current Limit and Reverse-Voltage Protection
The uP7558 has a reverse current limit feature that protects the input source against significanack current flow from
output to input when the output side voltage is higher than the input side. This feature is activatend clamped to a
reverse-current level (200mAtypical) at a deglitch time of 4ms when the output side voltage iher than the input side.
After 4ms deglitch time, the N-channel MOSFET is turned off, no current flows from thouthe input. The N-
channel MOSFET will be turned on if the output side voltage is lower than the input side (5mcal).
In addition to reverse current limit, reverse voltage protection is also implemented.Arevevoltage comparator controls
theN-channel MOSFET to be turned ONor OFF. TheN-channel MOSFET is turnd f after 4s (typical) deglitch time
as soon as VOUT-VIN exceeds 60mV. It turns on within 40us (typical) deglitch tntil the voltage VOUT-VIN falls
below -40mV. The following Figures show typical protection behavior implementation usinthe uP7558.
Revere Current
Limit Release Point
IRCL X RDS(ON)
0mV
VOUT-VIN
IOUT
0A
M
T
Reverse Current
Limit Trip Point
MOS
Turn on
TD
OC#
Reversurrent Limit Protection
Rge
Reverse Voltage
Release Point
0mV
VOUT-VIN
IOUT
MOS
Turn off
Reverse Current
Limit Trip Point
MOS
Turn on
O
Reverse Voltage Protection
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Conceptual
uP7558
Absolute Maximum Rating
(Note 1)
Supply Input Voltage, VIN---------------------------------------------------------------------------------------------------------- -0.3V to +6V
Other Pins --------------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V
StorageTemperature Range ----------------------------------------------------------------------------------------------------------- 65OC to +150OC
JunctionTemperature ---------------------------------------------------------------------------------------------------------------------------- 150OC
LeadTemperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------- 260OC
ESD Rating (Note 2)
HBM (Human Body Mode) ----------------------------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------- 200V
CDM (ChargedDevice Mode) --------------------------------------------------------------------------------------------------------- 1000V
Thermal Information
Package Thermal Resistance (Note 3)
TSOT23-5L θJA ------------------------------------------------------------------------------------------------------------------------- 250°C/W
TSOT23-5L θJC ---------------------------------------------------------------------------------------------------------------- 100°C/W
TSOT23-5L (Flip-Chip)θJA ------------------------------------------------------------------------------------------------- 126.5°C/W
SOT23-5L θJA ------------------------------------------------------------------------------------------------------------------------- 250°C/W
SOT23-5L θJC ---------------------------------------------------------------------------------------------------------------- 140°C/W
MSOP-8L θJA -------------------------------------------------------------------------------------------------------------- 160°C/W
MSOP-8L θJC ----------------------------------------------------------------------------------------------------------------- 40°C/W
PowerDissipation, PD @ TA = 25°C
TSOT23-5L --------------------------------------------------------------------------------------------------------------------------------- 0.40W
TSOT23-5L (Flip-Chip) ----------------------------------------------------------------------------------------------------------------------- 0.79W
SOP23-5L ------------------------------------------------------------------------------------------------------------------------------------------- 0.40W
MSOP-8L -------------------------------------------------------------------------------------------------------------------------------------- 0.63W
Recommended Operation Conditions
(Note 4)
Operating Junction Temperature Range -------------------------------------------------------------------- -40°C to +125°C
OperatingAmbient Temperature Range ------------------------------------------------------------------------- -40°C to +85°C
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ +2.7V to +5.5V
Electrical Characteristics
(VIN= 5V, TA = 25OC, unless otherwise scified)
Parameter
Symbol Test Conditions
Min Typ Max Units
Supply Input
Suppy Input Voltage
Under Voltage Lock
UVLO Hysteresis
Shutdown Current
Quiescent Curre
2.7
--
5.5
V
V
VUVLO
∆VUVLO
ISD
VIN rising
2.0 2.2 2.4
--
--
--
75
0.1
--
--
1
mV
uA
uA
No load on VOUT, disabled.
No load on VOUT, enabled.
IQ
100
6
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Conceptual
uP7558
Electrical Characteristics
Parameter
Chip Enable
Symbol
Test Conditions
Min
Typ Max Units
2.7V < VIN < 5.5V
2.7V < VIN < 5.5V
Logic High Threshold
Logic Low Threshold
Enable Input Current
Turn On Time (Note 5)
Turn Off Time (Note 5)
Output Rise Time
1
--
--
-
--
0.4
0.5
--
V
V
0V < VEN, VEN# < 5.5V
-0.5
-
--
uA
ms
ms
ms
ms
CL = 1uF, RL = 10Ω
TON
TOFF
TR
1
CL = 1uF, RL = 10Ω
0.1
0.9
0.1
40
--
--
CL = 1uF, RL = 10Ω
0.6
--
1.2
0.3
--
CL = 1uF, RL = 10Ω
Output Fall Time
TF
VIN = 5V, VOUT = 5V,disabled. uP7558XXXX
VIN = 5V, VOUT = 5V,disabled. uPMD5-XX
VIN = 5V, VOUT = 5V,disaed. uP8QD5-XX
--
Output Discharge
Resistance when Disabled
200
200
300
300
Ω
--
Power Switch
N-MOSFET ON Resistance
(Note 6)
Test current = 0.5A
Test current = 0.
58XXXX-XX
RDS(ON)
--
--
75
mΩ
mΩ
N-MOSFET ON Resistance
for TSOT23-5L Flip-Chip
Package Only
uP7558PMD5-XX
uP7558QMD5-XX
--
--
40
40
--
--
RDS(ON)
(Note 6)
Current Limit
uP7558XXXX-10
uP7558XXXX-15
uP7558XXXX-20
uP7558XXXX-25
uP7558XXXX-30
uP7558XXXX-10
uP7558XXXX-15
uP7558XXXX-20
uP7558XXXX-25
uP7558XXXX-30
--
--
0.9
1.0
1.5
2.0
2.6
1.5
2.1
2.5
3.3
4.3
--
--
VIN = connected to
GNDabled into
short-
Short Circuit Output Current
ISC
--
--
A
--
--
--
--
1.1
1.6
2.1
3.1
3.6
2.0
2.7
3.1
5.0
5.0
VIN = 5.0V, current ramp <
100A/s on VOUT
A
Over Current Trip Threshol
ISC_TRI
Output Reverse Vorotection
Output Reverse Voltage
Trigger Point
VOUT - VIN
VIN -VOUT
--
60
--
mV
Output Reverse Voltage
Release Trigger Po
--
--
40
--
--
5
mV
uA
VOUT Shutdown Current
ISD_OUT VOUT = 5.5V, VIN Short to GND
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Conceptual
uP7558
Electrical Characteristics
Parameter
Symbol
Test Conditions
Min
Typ Max Units
Output Reverse Current Protection
Output Reverse Current
Threshold
-
--
.2
4
--
--
A
Output Reverse Current
Deglitch Time
ms
Over Temperature Protection
Shutdown-Level Threshold
Thermal Shutdown Hysteresis
Fault Flag (OC#)
Guarantee by design
Guarantee by design
-
--
135
20
--
--
OC
OC
Output Low Voltage
Off State Current
OC# Deglitch
VOL
IOC# = 5mA
--
--
5
--
--
8
0.4
1
V
V
OC# = 5.5V
uA
ms
OC# assertion and desertion delay
15
Note 1. Stresses beyond those listed as the above Absolute Maatings may cause permanent damage to
the device. These are for stress ratings only. Funtional on of the device at these or any other
conditions beyond those indicated in the Recommend Operation Condition section of the specifications is
not implied. Exposure to absolute maximum rincondits for extended periods may remain possibility
to affect device reliability.
Note 2. Devices are ESDsensitive. Handling precaution recomnded.
Note 3. θJA is measured in the natural convection at A = 2C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard
Note 4. The device is not guaranteed to function outsidts operating conditions.
Note 5. These items are not tested in producticified by design.
<
<
Note 6. Catalog by pulsed current, duration quency 100Hz.
8
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Conceptual
uP7558
Electrical Characteristics
EN#
VOUT
TR
TF
TON
T
OC#
OC Trip Threshold
ISC_TRIP
IOUT
IOUT
SC Output Current
ISC
OCP Eve
OTP Event
OTP Release
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Conceptual
uP7558
Typical Operation Characteristics
Turn On
Turn Off
EN (2V/Div)
VOUT (2V/Div)
OC# (5V/Div)
EN (2V/Div)
VOUT (2V/Div)
OC# (5V/Div)
IOUT (500mA/Div)
IOUT (500mA/Div)
Time : 200us/Div
Time : 200us/Div
VIN = 5V, VOUT = 5V, CL = 1uF, RL = 10Ω
N = , VOUT = 5V, CL = 1uF, RL = 10Ω
OC# Response
Turn On at Short-Circuit
EN (5V/Div)
VOUT (2V/Div)
OC# (5V/Div)
OC# (5V/Div)
VOUT (2V/Div)
IOUT (2A/Div)
IOU
Time : 10msiv
VIN = 5V, VOUT = , CL = 1uF
Time : 10ms/Div
VIN = 5V, VOUT = 5V, CL = 1uF
Quiescent Currens. VIN
RDS(ON)
100
90
80
70
60
50
40
80.0
70.0
uP7558, T = 25oC
60.0
50.0
uP7558 (Flip-Chip), T =25oC
40.0
30.0
20.0
2
3
4
5
6
2
2.5
3
3.5
4
4.5
VIN (V)
VIN = 2.7V ~ 6V, VOUT = 0.5V, No Load
5
5.5
6
6.5
VIN (V)
VIN= 2.7V ~ 5.5V, IOUT = 0.5A
10
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Conceptual
uP7558
Application Information
Supply Input Filtering
The junction temperature is calculated as TA + 24OC, where
TA is the expected maximum ament temperature. A few
iterations are required until get final stions.
VIN pins supply power to the power switch and internal
circuit. Both of them should be connect to upstrem power
supply with short and wide trace on the PCB.
Layout Consideration
The power circuitry of USB pnteuit boards requires
a customized layout tmaximize mal dissipation and
to minimized voltage drop d EMI
Place the device pysicalls close to the USB port
as possible. Kel traces wide, short and direct to
minimized the parasitic ctance. This optimizes the
switch respone to output short circuit conditions.
Place both inut and tput bypass capacitors near to
the device.
Events such as hot-plug/unplug, output short circuit and
over temperature result in step change of input current with
sharp edges, which in turn causes voltage transient at supply
input due to di/dit effect of parasitic inductance on the current
path.A0.1uF ceramic capacitor fromVINtoGND, physically
located near the device is strongly recommended to control
the supply input transient. Minimizing the parasitic
inductance along the current path also alleviate the voltage
transient at the supply input.
All VOUT pins suld be connected together on the
PCB. Apins should be connected together on
the PC
Output Voltage Filtering
Bypassing the output voltage with a 0.1uF ceramic capacitor
improves the immunity of the device against output short
circuit and hot plug/unplug of load. Alower ESR capacitor
results in lower voltage drop against a step load change. A
large electrolytic capacitor from VOUT to GND is also
recommended. This capacitor reduces power supply
transient that may cause ringing on the input.
GND
GND
VIN
VOUT
VOUT
VOUT
OC#
USB supports dynamic attachment (hot plug-in) o
peripherals. A current surge is caused by the input
capacitance of downstream device. Ferrite beads
recommended in series with all power and ground connctor
pins. Ferrite beads reduce EMI and limit the inrush cnt
during hot-attachment by filtering high-frequency signals
The DC resistance of the ferrite bead should blly
taken care to reduce the voltage drop.
VIN
VIN
EN/EN#
VOUT
Voltage Drop and Power Dissipation
Temperature effect should be well coidered when dealing
with voltage drop and power dissation. The aximum
RDS(ON) of the power switch is 75mΩ der 25Ojunction
temperature. If the device is expected to oate at 125OC
junction temperature, the R(ON) will become
75mΩ ×
[
1+
(
125°C − 25°C
)
×0.3/°C = 101.25mΩ
]
where 0.35%/OC is the aated temperature coefficient
of the RDS(ON).
If the maximum load cuis expected to be 1.2A, the
maximum voltage will becom
1.2A ×101.25mΩ = 121.5
This in turn will capowedissipation as
1.2A ×121.5mV = 145.8mW
The temperature raise is calculated as
145.8mΩ ×160°C/ W = 24°C
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11
Conceptual
uP7558
Package Information
SOT23-5LPackage
2.80 - 3.00
0.95 BSC
0.30 - 0.50
0.00 - 0.1
1.90 BSC
Note
1.Package Outline UnitDescription:
BSC: Basic. Represents theoretical exact dimensior dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for use only. This value is not a device specification.
TYP. Typical. Provided as a general value. Tis not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash protrusions. Mold flash or protrusions shall not exceed 0.15mm.
12
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Conceptual
uP7558
Package Information
TSOT23 - 5L Package
2.80 - 3.02
0.95 BSC
0.30 - 0.51
1.10 MAX
0.00 - 0.1
1.90 BSC
Note
1.Package Outline UnitDescription:
BSC: Basic. Represents theoretical exact dimensior dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for use only. This value is not a device specification.
TYP. Typical. Provided as a general value. Tis not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash protrusions. Mold flash or protrusions shall not exceed 0.15mm.
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13
Conceptual
uP7558
Package Information
TSOT23 - 5L (Flip-Chip) Package
2.80 - 3.02
0.95 BSC
0.30 - 0.51
1.10 MAX
0.00 - 0.1
1.90 BSC
Note
1.Package Outline UnitDescription:
BSC: Basic. Represents theoretical exact dimensior dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for use only. This value is not a device specification.
TYP. Typical. Provided as a general value. Tis not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash protrusions. Mold flash or protrusions shall not exceed 0.15mm.
14
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Conceptual
uP7558
Package Information
MSOP - 8L Package
2.90 - 3.10
0.65 BSC
0.22-0.38
1.10 MAX
0.00 - 0.
Note
1.Package Outline UnitDescription:
BSC: Basic. Represents theoretical exact dimensior dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for use only. This value is not a device specification.
TYP. Typical. Provided as a general value. Tis not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash protrusions. Mold flash or protrusions shall not exceed 0.15mm.
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15
Conceptual
uP7558
Important Notice
uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improments, and other
changes to its products and services at any time and to discontinue any product or service hout notice. Customers
should obtain the latest relevant information before placing orders and should verify that suh ination is current and
complete.
uPI products are sold subject to the terms and conditions of sale supplied at the me of er acknowledgment.
However, no responsibility is assumed by uPI or its subsidiaries for its use or application any product or circuit; nor
for any infringements of patents or other rights of third parties which may result frs use or pplication, including but
not limited to any consequential or incidental damages. No uPI components are desed, intended or authorized for
use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No license
is granted by implication or otherwise under any patent or patent rights of uPor itubsidiaries.
COPYRIGHT (C) 2018, UPI SEMICONDUCTOR CORP.
uPI Semiconductor Corp.
Sales Branch Office
uPI Semiconductor Cor
Headquarter
12F-5, No. 408, Ruiguang Rd. NeihuDistrict,
Taipei Taiwan, R.O.C.
TEL : 886.2.8751.2062 FAX : 886.2.8751.5064
9F.,No.5, Taiyuan 1st St. Zbei City,
Hsinchu Taiwan, R..
TEL : 886.3.560.1666 FAX : 886.3.560.1888
16
uP7558-DS-C3001, May 2018
www.upi-semi.com
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