19N10L-TM3-T [UTC]

100V N-Channel MOSFET; 100V N沟道MOSFET


型号：	19N10L-TM3-T
厂家：	Unisonic Technologies
描述：	100V N-Channel MOSFET 100V N沟道MOSFET
文件：	总6页 (文件大小：196K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UNISONIC TECHNOLOGIES CO., LTD

19N10

Preliminary

Power MOSFET

100V N-Channel MOSFET

DESCRIPTION

The UTC 100V N-Channel enhancement mode power field

effect transistors (MOSFET) are produced by UTC’s planar stripe,

DMOS technology which has been tailored especially in the

avalanche and commutation mode to minimize on-state

resistance, provide superior switching performance, and

withstand high energy pulse. They are suited for low voltage

applications such as audio amplifier, high efficiency switching

DC/DC converters, and DC motor control.

FEATURES

* R_DS(ON)= 0.1Ω @V_GS= 10 V

* Ultra low gate charge ( typical 19nC )

* Low reverse transfer Capacitance ( C_RSS= typical 32pF )

* Fast switching capability

Lead-free:

Halogen-free: 19N10G

19N10L

* Avalanche energy Specified

* Improved dv/dt capability, high ruggedness

SYMBOL

2.Drain

1.Gate

3.Source

ORDERING INFORMATION

Ordering Number

Pin Assignment

Package

TO-251

Packing

Tube

Normal

Lead Free

Halogen Free

19N10-TM3-T

19N10L-TM3-T

19N10G-TM3-T

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Preliminary

Power MOSFET

ABSOLUTE MAXIMUM RATINGS (T_C=25℃, unless otherwise specified)

PARAMETER

SYMBOL

V_DSS

V_GSS

I_D

RATINGS

UNIT

Drain-Source Voltage

Gate-Source Voltage

100

± 25

15.6

62.4

15.6

220

Continuous Drain Current

Pulsed Drain Current (Note 2)

Avalanche Current (Note 2)

Single Pulsed Avalanche Energy (Note 3)

Repetitive Avalanche Energy (Note 2)

Peak Diode Recovery dv/dt (Note 4)

Power Dissipation

I_DM

I_AR

E_AS

V/ns

E_AR

5.0

dv/dt

6.0

P_D

Derate above 25°C

0.4

W/°C

℃

Junction Temperature

T_J

+150

-55 ~ +150

Storage Temperature

T_STG

℃

Note:1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.

Absolute maximum ratings are stress ratings only and functional device operation is not implied.

2. Pulse width limited by T_J(MAX)

3. L=1.35mH, I_AS=15.6A, V_DD=25V, R_G=25 ꢀ, Starting T_J=25°C

4. I_SD≤19A, di/dt ≤ 300A/µs, V_DD≤BV_DSS, Starting T_J=25°C

THERMAL DATA

PARAMETER

SYMBOL

θ_JA

RATINGS

110

UNIT

℃/W

Junction-to-Ambient

Junction-to-Case

θ_JC

2.5

ELECTRICAL CHARACTERISTICS (T_J=25°C, unless otherwise specified)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNIT

OFF CHARACTERISTICS

V_GS=0V, I_D=250µA

I_D=250µA,

Referenced to 25°C

Drain-Source Breakdown Voltage

Breakdown Voltage Temperature

Coefficient

BV_DSS

∆BV_DSS

/ ∆T_J

100

V/°C

0.1

V_DS=100V, V_GS=0V

V_GS=25V, V_DS=0V

V_GS=-25V, V_DS=0V

Drain-Source Leakage Current

I_DSS

µA

Forward

Reverse

100

-100

Gate-Source Leakage Current

I_GSS

ON CHARACTERISTICS

_DS=V_GS, I_D=250µA

Gate Threshold Voltage

V_GS(TH)

R_DS(ON)

g_FS

2.0

4.0

0.1

ꢀ

_GS=10V, I_D=7.8A

0.078

Static Drain-Source On-Resistance

Forward Transconductance

DYNAMIC PARAMETERS

Input Capacitance

_DS=40V, I_D=7.8A (Note 1)

C_ISS

C_OSS

C_RSS

600

165

780

215

V_DS=25V, V_GS=0V, f=1.0 MHz

Output Capacitance

Reverse Transfer Capacitance

SWITCHING PARAMETERS

Total Gate Charge

Q_G

Q_GS

Q_GD

t_D(ON)

t_R

3.9

9.0

7.5

150

V_DS=80V, I_D=19A, V_GS=10V

Gate Source Charge

(Note 1, 2)

Gate Drain Charge

Turn-ON Delay Time

310

Turn-ON Rise Time

V_DD=50V, I_D=19A, R_G=25ꢀ

(Note 1, 2)

Turn-OFF Delay Time

Turn-OFF Fall-Time

t_D(OFF)

t_F

140

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Preliminary

Power MOSFET

ELECTRICAL CHARACTERISTICS (Cont.)

PARAMETER SYMBOL

SOURCE- DRAIN DIODE RATINGS AND CHARACTERISTICS

TEST CONDITIONS

MIN TYP MAX UNIT

Diode Forward Voltage

V_SD

I_S

V_GS=0V, I_S=15.6A

1.5

Maximum Body-Diode Continuous Current

Maximum Pulsed Drain-Source Diode

Forward Current

15.6

I_SM

62.4

Body Diode Reverse Recovery Time

t_RR

V_GS= 0V, I_S=19A,

dI_F/dt=100A/μs (Note 1)

Body Diode Reverse Recovery Charge

Q_RR

200

Note: 1. Pulse Test : Pulse width ≤300µs, Duty cycle ≤ 2%

Note: 2. Essentially independent of operating temperature

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Preliminary

Power MOSFET

TEST CIRCUITS AND WAVEFORMS

D.U.T.

V_DS

R_G

Driver

V_DD

* dv/dt controlled by R_G

* I_SDcontrolled by pulse period

* D.U.T.-Device Under Test

Same Type

as D.U.T.

V_GS

Fig. 1A Peak Diode Recovery dv/dt Test Circuit

P. W.

V_GS

(Driver)

Period

P.W.

Period

10V

V_GS

I_FM, Body Diode Forward Current

I_SD

(D.U.T.)

di/dt

I_RM

Body Diode Reverse Current

Body Diode Recovery dv/dt

V_DS

V_DD

(D.U.T.)

Body Diode

Forward Voltage Drop

Fig. 1B Peak Diode Recovery dv/dt Waveforms

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19N10

Preliminary

Power MOSFET

TEST CIRCUITS AND WAVEFORMS (Cont.)

Fig. 2A Switching Test Circuit

Fig. 2B Switching Waveforms

Fig. 3A Gate Charge Test Circuit

Fig. 3B Gate Charge Waveform

Fig. 4A Unclamped Inductive Switching Test Circuit

Fig. 4B Unclamped Inductive Switching Waveforms

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Preliminary

Power MOSFET

UTC assumes no responsibility for equipment failures that result from using products at values that

exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or

other parameters) listed in products specifications of any and all UTC products described or contained

herein. UTC products are not designed for use in life support appliances, devices or systems where

malfunction of these products can be reasonably expected to result in personal injury. Reproduction in

whole or in part is prohibited without the prior written consent of the copyright owner. The information

presented in this document does not form part of any quotation or contract, is believed to be accurate

and reliable and may be changed without notice.

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