75323(20SOP) [UTC]

Line Driver/Receiver, 5 Driver, BIPolar, PDSO20;
75323(20SOP)
型号: 75323(20SOP)
厂家: Unisonic Technologies    Unisonic Technologies
描述:

Line Driver/Receiver, 5 Driver, BIPolar, PDSO20

驱动 光电二极管 驱动器
文件: 总10页 (文件大小:172K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
MULTIPLE RS-232 DRIVERS AND  
RECEIVERS  
DESCRIPTION  
The UTC 75323 combines five drivers and three  
receivers. The flow-through design of the UTC 75323  
decreases the part count, reduces the board space  
required, and allows easy interconnection of the UART  
and serial-port connector. The all-bipolar circuits and  
processing of the UTC 75323 provide a rugged,  
low-cost solution for this function.  
The UTC 75323 complies with the requirements of  
the ANSI TIA/EIA-232-Fand ITU (formerly CCITT)  
V.28 standards. These standards are for data  
SOP-20  
DIP-20  
interchange between  
a
host computer and  
a
peripheral at signal rates up to 20 Kbit/s. The  
switching speeds of the UTC 75323 are fast enough to  
support rates up to 120 kbit/s with lower capacitive  
loads (shorter cables). Interoperability at the higher  
signaling rates cannot be assured unless the designer  
has design control of the cable and the interface  
circuits at both ends. For interoperability at signaling  
rates up to 120 kbit/s, use of ANSI Standard  
TIA/EIA-423-B  
and  
TIA/EIA-422-B  
and  
ITU  
Recommendations V.10 and V.11 are recommended.  
The UTC 75323 is characterized for operation over a  
temperature range of 0to 70.  
FEATURES  
*Single Chip With Easy Interface Between UART and  
Serial-Port Connector of an External Modem or Other  
Computer Peripheral  
*Five Drivers and Three Receivers Meet or Exceed the  
Requirements of ANSI Standard TIA/EIA-232-F and  
ITU Recommendation V.28 Standards.  
*Supports Data Rates up to 120 kbit/s.  
*Complement to the UTC 75232.  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
1
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
PIN CONFIGURATION  
1
2
3
Vcc  
1DA  
2DA  
3DA  
1RY  
2RY  
4DA  
3RY  
5DA  
GND  
VDD  
1DY  
2DY  
20  
19  
18  
4
5
6
7
8
17 3DY  
1RA  
16  
15 2RA  
14 4DY  
13 3RA  
12 5DY  
11 Vss  
9
10  
LOGIC SYMBOL *  
LOGIC DIAGRAM ( POSITIVE LOGIC )  
2
3
19  
2
3
4
5
6
7
8
9
19  
18  
17  
16  
15  
14  
13  
12  
1DA  
1DY  
2DY  
1DA  
1DY  
2DY  
3DY  
1RA  
2RA  
4DY  
18  
17  
16  
15  
14  
13  
12  
2DA  
3DA  
1RY  
2DA  
3DA  
1RY  
4
5
6
3DY  
1RA  
2RY  
4DA  
3RY  
5DA  
2RY  
4DA  
3RY  
5DA  
2RA  
4DY  
3RA  
7
8
9
3RA  
5DY  
5DY  
* This symbol is in accordance with ANSI/IEEE Std  
91-1984 and IEC Publication 617-12.  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
2
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
SCHEMATIC (EACH DRIVER)  
To Other Drivers  
VDD  
9.4kΩ  
11.6kΩ  
Input DAx  
75.8Ω  
320Ω  
DYx Output  
4.2kΩ  
GND  
Vss  
To Other  
Drivers  
10.4kΩ  
3.3kΩ  
68.5Ω  
To Other Drivers  
Resistor values shown are nominal.  
SCHEMATIC (EACH RECEIVER)  
To Other Receivers  
Vcc  
1.66kΩ  
9kΩ  
2kΩ  
5kΩ  
RYx Output  
3.8kΩ  
Input RAx  
10kΩ  
GND  
To Other Receivers  
Resistor values shown are nominal.  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
3
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
ABSOLUTE MAXIMUM RATINGS (Ta=25)  
PARAMETER  
Supply voltage (see Note 1)  
Supply voltage (see Note 1)  
Supply voltage (see Note 1)  
Input voltage range: Driver  
Receiver  
Output voltage range, (Driver)  
Low-level output current (Receiver)  
Package thermal impedance  
SYMBOL  
RATINGS  
10  
UNIT  
Vcc  
VDD  
Vss  
V
V
V
15  
-15  
-15 ~ 7  
-30 ~ 30  
-15 ~ 15  
VI  
V
Vo  
IOL  
V
mA  
20  
θJA  
SOP-20  
97  
67  
°C/W  
DIP-20  
Lead temperature 1.6mm(1/6 inch) from case  
for 10 seconds  
Tlead  
Tstg  
260  
°C  
°C  
Storage temperature range  
-65 ~ 150  
note: 1. All voltages are with respect to the network ground terminal.  
RECOMMENDED OPERATING CONDITIONS  
PARAMETER  
SYMBOL  
VDD  
MIN  
7.5  
TYP  
MAX  
13.5  
-13.5  
5.5  
UNIT  
V
9
-9  
5
Supply voltage  
Vss  
-7.5  
4.5  
Vcc  
High-level input voltage  
Low-level input voltage  
High-level output current  
Driver  
VIH  
1.9  
V
V
Driver  
VIL  
0.8  
-6  
Driver  
IOH  
mA  
Receiver  
Driver  
-0.5  
6
High-level output current,  
IOL  
Ta  
mA  
Receiver  
16  
70  
Operating free-air temperature  
0
SUPPLY CURRENTS OVER OPERATING FREE-AIR TEMPERATURE RANGE  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
All inputs at 1.9V, No load VDD=9V, Vss=-9V  
VDD=12V, Vss=-12V  
MIN  
MAX UNIT  
Supply current from VDD  
25  
mA  
32  
IDD  
All inputs at 0.8V, No load VDD=9V, Vss=-9V  
VDD=12V, Vss=-12V  
7.5  
mA  
9.5  
-25  
mA  
-32  
Supply current from Vss  
Suppy current from Vcc  
All inputs at 1.9V, No load VDD=9V, Vss=-9V  
VDD=12V, Vss=-12V  
Iss  
Icc  
All inputs at 0.8V, No load VDD=9V, Vss=-9V  
VDD=12V, Vss=-12V  
-5.3  
-5.3  
mA  
Vcc=5V,All inputs at 5V, No load  
20  
mA  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
4
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
ELECTRICAL CHARACTERISTICS OVER OPERATING FREE-AIR TEMPERATURE  
RANGE,VDD=9V,Vss=-9V,Vcc=5V (UNLESS OTHERWISE NOTED)  
PARAMETER  
High-level output voltage  
SYMBOL  
TEST CONDITIONS  
MIN TYP MAX UNIT  
VOH  
VOL  
IIH  
VIL=0.8V,RL=3kΩ (See Figure 1)  
VIH=1.9V,RL=3kΩ (See Figure 1)  
VI=5V  
VI=0  
6
7.5  
V
V
Low-level output voltage(see Note 2)  
High-level Input current  
-7.5  
-6  
10  
(See Figure 2)  
(See Figure 2)  
μA  
Low-level input current  
IIL  
-1.6  
mA  
High-level short-circuit output current  
(see Note 3)  
VIL=0.8V,Vo=0  
VIH=2V,Vo=0  
(See Figure 1)  
(See Figure 1)  
IOS(H)  
-4.5  
-9  
9
-19.5 mA  
Low-level short-circuit output current  
IOS(L)  
ro  
4.5  
300  
19  
mA  
Ω
Output resistance (see Note 4)  
Vcc=VDD=Vss=0,Vo=-2V to 2V  
Notes: 2.The algebraic convention, where the more positive(less negative) limit is designated as maximum, is used  
in this data sheet for logic levels only,e.g.,if-10V is maximum, the typical value is a more negative voltage.  
3.Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.  
4.Test conditions are those specified by TIA/EIA-232-F and as listed above.  
SWITCHING CHARACTERISTICS (Ta=25,VDD=12V,Vss=-12V,Vcc=5V±10%)  
PARAMETER  
Propagation delay time, low- to  
high-level output  
SYMBOL  
tPLH  
TEST CONDITIONS  
RL=3kΩ to 7kΩ, CL=15pF  
(See Figure 3)  
MIN TYP MAX UNIT  
315  
500  
175  
100  
ns  
Propagation delay time, high-to  
low-level output  
tPHL  
75  
RL=3kΩ to 7kΩ, CL=15pF  
(See Figure 3)  
60  
ns  
μs  
ns  
TTLH Transition time, low-to high-level  
output  
tTLH  
RL=3kΩ to 7kΩ, CL=2500pF  
(See Figure 3 and Note 5)  
RL=3kΩ to 7kΩ, CL=15pF  
(See Figure 3)  
1.7  
40  
2.5  
75  
Transition time, high-to low-level output  
tTHL  
RL=3kΩ to 7kΩ, CL=2500pF  
(See Figure 3 and Note 6)  
1.5  
2.5  
μs  
Note: 5. Measured between-3-V and 3-V points of the output waveform (TIA/EIA-232-F conditions),all unused inputs  
are tied either high or low.  
6. Measured between 3-V and –3-V points of the output waveform (TIA/EIA-232-F conditions),all unused inputs  
are tied either high or low  
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING  
CONDITIONS (UNLESS OTHERWISE NOTED)  
PARAMETER  
SYMBOL  
VIT+  
TEST CONDITIONS  
MIN TYP* MAX UNIT  
Ta=25℃  
Positive-going input threshold voltage  
See Figure5  
1.75  
1.55  
1.9  
2.3  
2.3  
Ta=0to 70℃  
V
Negative-going input threshold voltage  
Input hysteresis voltage(VIT+ - VIT-)  
High-level output voltage  
VIT-  
Vhys  
See Figure5  
0.75 0.97 1.25  
0.5  
VIH=0.75V  
Inputs open  
2.6  
2.6  
4
5
VOH  
IOH=-0.5mA  
V
Low-level output voltage  
High-level input current  
VOL  
IIH  
IOL=10mA,VI=3V  
VI=25V.  
VI=3V  
VI=-25V  
VI=-3V  
0.2  
0.45  
8.3  
V
dB  
mA  
mA  
mA  
mA  
3.6  
0.43  
-3.6  
-8.3  
-12  
Low-level input current  
IIL  
-0.43  
Short-circuit output current  
* All typical values are at Ta=25,Vcc=5V,VDD=9V,Vss=-9V  
Ios  
See Figure 4  
-3.4  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
5
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
SWITCHING CHARACTERISTICS (Ta=25,VCC=5V,VDD=12V,VSS= -12V)  
PARAMETER  
SYMBOL  
tPLH  
TEST CONDITIONS  
CL=50pF,RL=5kΩ  
See Figure 6  
MIN TYP MAX UNIT  
Propagation delay time, low-to high-level output  
Propagation delay time, high- to low-level output  
Transition time, low-to high-level output  
Transition time, high- to low-level output  
107  
42  
500  
150  
525  
60  
ns  
ns  
ns  
ns  
tPHL  
tTLH  
tTHL  
175  
16  
PARAMETER MEASUREMENT INFORMATION  
IOS(L)  
VDD  
Vcc  
VDD or GND  
Vss or GND  
VDD  
Vcc  
-IOS(H)  
IIH  
VI  
VI  
VI  
-IIL  
Vo  
RL=3kΩ  
Vss  
Vss  
Figure 1. Driver Test Circuit  
for VOH,VOL,IOS(H),and IOS(L)  
Figure 2. Driver Test Circuit for IIH and IIL  
3V  
VDD  
Vcc  
Input  
1.5V  
1.5V  
Input  
0V  
pulse  
tPHL  
tPLH  
Vo  
Generator  
RL  
VOH  
VOL  
CL  
90%  
tTHL  
90%  
See Note B  
( see Note A )  
50%  
10%  
50%  
10%  
Output  
Vss  
TEST CIRCUIT  
tTLH  
VOLTAGE WAVEFORMS  
NOTES:A. CL includes probe and jig capacitance.  
B. The pulse generator has the following characteristics(t  
W
=25μs,PRR=20kHz,Zo=50Ω,tr=tf<50ns)  
Figure 3. Driver Test Circuit and Voltage Waveforms  
VDD  
Vcc  
VDD  
Vcc  
-IOS  
-IOH  
VIT,VI  
VI  
VOH  
IOL  
VOL  
Vss  
Vss  
Figure 4. Receiver Test Circuit for Ios  
Figure 5. Receiver Test Circuit for VIT,VOH,and VOL  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
6
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
5V  
VDD  
Vcc  
Input  
50%  
50%  
Input  
-5V  
tPHL  
tPLH  
pulse  
Vo  
Generator  
VOH  
VOL  
90%  
tTHL  
90%  
RL  
50%  
10%  
CL  
See Note B  
Vss  
50%  
10%  
Output  
(see Note A)  
tTLH  
VOLTAGE WAVEFORMS  
TEST CIRCUIT  
NOTES: A. CL includes probe and jig capacitance.  
B. The pulse generator has the following characteristics(t =25μs,PRR=20kHz,Zo=50Ω,tr=tf<50ns)  
W
Figure 6. Receive Propagation and Transition Times  
TYPICAL CHARACTERISTICS DRIVER SECTION  
VOLTAGE-TRANSFER CHARACTERISTICS  
OUTPUT CURRENT VS OUTPUT VOLTAGE  
12  
9
20  
16  
12  
8
VDD=12V,Vss=-12V  
VDD=9V,Vss=-9V  
VDD=9V  
Vss=-9V  
TA=25°C  
6
VDD=6V,Vss=-6V  
3
4
0
0
-4  
-8  
-3  
-6  
-9  
-12  
3-kΩLoad  
Line  
-12  
-16  
-20  
VOH(VI=0.8V)  
RL=3kΩ  
TA=25°C  
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0  
Input Voltage, VI (V)  
-16 -12 -8 -4  
0
4
8
12 16  
Output Voltage, Vo (V)  
SHORT-CIRCUIT OUTPUT CURRENT  
VS FREE-AIR TEMPERATURE  
SLEW RATE VS LOAD CAPACITANCE  
12  
1000  
100  
VDD=9V  
Vss=-9V  
RL=3kΩ  
TA=25°C  
9
6
Ios(L) (VI=1.9V)  
3
VDD=9V  
Vss=-9V  
Vo=0  
0
-3  
-6  
-9  
-12  
10  
Ios(H) (VI=0.8V)  
1
0
10  
20 30 40 50 60 70  
10  
100  
1000  
10000  
Free-Air Temperature, TA (°C)  
Load Capacitance, CL (pF)  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
7
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
SHORT-CIRCUIT OUTPUT CURRENT  
VS FREE-AIR TEMPERATURE  
INPUT THRESHOLD VOLTAGE VS SUPPLY VOLTAGE  
2
2.4  
2.2  
2
1.8  
1.6  
1.4  
VIT+  
VIT+  
VIT-  
1.8  
1.6  
1.4  
1.2  
1.2  
1
0.8  
0.6  
VIT-  
1.0  
0.8  
0.6  
0.4  
0.4  
0.2  
0
0
10  
20 30 40 50 60 70  
Free-Air Temperature, Ta (°C)  
2
3
4
5
7
8
9
10  
6
Supply Voltage, Vcc (V)  
MAXIMUM SUPPLY VOLTAGE VS FREE-AIR  
TEMPERATURE  
NOISE REJECTION  
16  
6
VCC=5V  
TA=25°C  
See Note A  
14  
12  
10  
5
4
Cc=300pF  
Cc=500pF  
8
6
4
2
0
3
Cc=12pF  
2
1
0
Cc=100pF  
RL3kΩ(from each output to GND)  
400  
40  
0
10  
20  
30  
40  
50  
60 70  
10  
100  
1000  
4000 10000  
Free-Air Temperature, Ta(°C)  
Pulse Duration, tw (ns)  
NOTE A: This figure shows the maximum amplitude of a positive-going  
pulse that, starting from 0V, does not cause a change of the output  
level.  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
8
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
APPLICATION INFORMATION  
Diodes placed in series with the VDD and Vss leads protect the UTC GD75323 in the fault condition in which the  
device output are shorted to VDD or Vss, and the Power supplies are at low and provide low-impedance paths to  
ground(see Figure 15)  
VDD  
VDD  
Output  
±15V  
75323  
75323  
Vss  
Vss  
Figure 7. Power-Supply Protection to Meet Power-Off Fault Condition of TIA/EIA-232-F  
TIA/EIA-232-F  
DB9S  
CONNECTOR  
-12V  
TL16C450  
ACE  
10  
9
8
11  
12  
5
GND  
5DA  
3RY  
4DA  
2RY  
1RY  
3DA  
2DA  
1DA  
Vcc  
Vss  
5DY  
3RA  
4DY  
2RA  
1RA  
3DY  
2DY  
1DY  
VDD  
43  
37  
40  
13  
36  
11  
41  
42  
RI  
9
6
RI  
13  
14  
15  
16  
17  
18  
19  
20  
DTR  
CTS  
TX  
RTS  
RX  
C5*  
C4*  
DTR  
CTS  
SO  
RTS  
SI  
7
6
5
4
3
2
1
UTC  
75323  
DSR  
DCD  
C3*  
C1*  
DSR  
C2*  
DCD  
1
12V  
5V  
*See Figure10 to select the correct values for the loading capacitors(C1,C2,C3,C4 and C5),which may be required  
to meet the RS-232 maximum slew-rate requirement of 30V/us.The value of the loading capacitors res required  
depends upon the line length and desired slew rate,but is typically 330pF.  
NOTE C:To use the receivers only,VDD and Vss both must be powered or tied to ground.  
Figure 8. Typical Connection  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
9
QW-R113-007,A  
UTC 75323  
LINEAR INTEGRATED CIRCUIT  
UTC assumes no responsibility for equipment failures that result from using products at values that  
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or  
other parameters) listed in products specifications of any and all UTC products described or contained  
herein. UTC products are not designed for use in life support appliances, devices or systems where  
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in  
whole or in part is prohibited without the prior written consent of the copyright owner. The information  
presented in this document does not form part of any quotation or contract, is believed to be accurate  
and reliable and may be changed without notice.  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
10  
QW-R113-007,A  

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