L8115 [UTC]
FET BIAS CONTROLLER WITH POLARISATION SWITCH AND TONE DETECTION; 与偏振开关与音调检测FET偏置控制器
| 型号： | L8115 |
| 厂家： | 
Unisonic Technologies |
| 描述： | FET BIAS CONTROLLER WITH POLARISATION SWITCH AND TONE DETECTION |
| 文件： | 总13页 (文件大小：175K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UTCL8115
LINEAR INTEGRATED CIRCUIT
FET BIAS CONTROLLER WITH
POLARISATION SWITCH AND
TONE DETECTION
DESCRIPTION
The UTC L8115 is designed to meet the bias
requirements of GaAs and HEMT FETs commonly used in
satellite receiver LNBs, PMR, cellular telephones etc. with
a minimum of external components.
SSOP-16(150mil)
With the addition of two capacitors and a resistor the
devices provide drain voltage and current control for three
external grounded source FETs, generating the regulated
negative rail required for FET gate biasing whilst operating
from a single supply. This negative bias, at -2.8 volts, can
also be used to supply other external circuits.
The UTC L8115 includes bias circuits to drive up to three
external FETs. A control input to the device selects either
one of two FETs as operational, the third FET is
permanently active. This feature is normally used as an
LNB polarization switch. Also specific to Universal LNB
applications is the 22kHz tone detection and logic output
feature which is used to enable high and low band
frequency switching.
SSOP-20(150mil)
Drain current setting of the UTC L8115 is user selectable
over the range 0 to 15mA, this is achieved with addition of
a single resistor. The UTC L8115 gives 2.2 volts drain
whilst.
FEATURES
*Provides bias for GaAs and HEMT FETs.
*Drives up to three FETs.
*Dynamic FET protection.
*Drain current set by external resistor.
*Regulated negative rail generator requires only 2 external
capacitors.
*Choice in drain voltage
*Wide supply voltage range
*Polarisation switch for LNBs
*22KHz tone detection for band switching.
*Tone detector ignores unwanted signals
*Support fr MIMIC, FET and Bipolar local oscillator devices
APPLICATIONS
*Satellite receiver LNBs
*Private mobile radio(PMR)
*Cellular telephones
1
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
PIN CONFIGURATION
LINEAR INTEGRATED CIRCUIT
SSOP-16(150mil)
1
2
3
4
5
6
7
8
16
G1
VCC
15
D12
G2
G3
D3
GND
CN B 1
RCAL
14
VP OL
13
FIN
12
LOV
11
HB
LB
CS UB
10
CN B 2
9
SSOP-20(150mil)
1
2
3
4
5
6
7
8
20
G 1
D 1
G 2
D 2
G 3
D 3
GND
CNB 1
CNB 2
VC C
19
RC AL
18
VP O L
17
FI N
16
CR E C
FO UT
LO V
HB
LB
CS UB
15
14
13
12
9
10
11
N/C
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
-0.6 ~ 12
100
25 Continuous
0 ~ 15
UNIT
V
mA
V
mA
mW
mW
℃
Supply Voltage
Vcc
Icc
VIN
ID
Supply Current
Input Voltage
Drain Current (per FET)(set by RCAL)
Power Dissipation(Ta=25℃)
SSOP-16(150mil)
SSOP-20(150mil)
500
500
-40 ~ 80
-50 ~ 85
PD
Operating Temperature
Storage Temperature
Topr
Tstg
℃
2
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, Ta=25℃, Vcc=5V, ID=10mA, RCAL=33kΩ)
PARAMETER
SYMBOL
TEST CONDITONS
MIN.
5
TYP. MAX. UNIT
Supply Voltage
Vcc
10
15
V
Supply Current
Icc
ID1= ID2 (or ID12)=ID3=0
8.5
28
mA
mA
mA
mA
mA
V
ID1=0,ID2 (or ID12)= ID3=10mA, VPOL=14V
ID2=0,ID1 (or ID12)= ID3=10mA, VPOL=15.5V
ID1 and ID3=0, ILB=10mA
35
28
35
18
18
-2.8
25
ID1 and ID3=0, IHB=10mA
(Internally generated)
25
Substrate Voltage
VSUB
ICSUB=0
-3.05
180
-2.55
-2.4
ICSUB=-200μA
V
Output Noise
Drain Voltage
END
ENG
fo
CG=4.7nF,CD=10nF
CG=4.7nF,CD=10nF
0.02
Vpkpk
Gate Voltage
0.005 Vpkpk
Oscillator Frequency
330
800
kHz
GATE CHARACTERISTICS
PARAMETER
Output Current Range
Output Voltage
Gate 1 Off
Low
SYMBOL
TEST CONDITONS
MIN.
-30
TYP. MAX. UNIT
IGO
2000
A
ID1=0mA, VPOL=14V, IGO1=-10μA
ID1=12mA, VPOL=15.5V, IGO1=-10μA
ID1=8mA, VPOL=15.5V, IGO1=0μA
VG1O
VG1L
VG1H
-2.5
-2.5
0.4
-2.25
-2.25
0.75
-2.0
-2.0
1.0
V
V
V
High
Output Voltage
Gate 2 Off
Low
ID2=0mA, VPOL=15.5V, IGO2=-10μA
ID2=12mA, VPOL=14V, IGO2=-10μA
ID2=8mA, VPOL=14V, IGO2=0μA
VG2O
VG2L
VG2H
-2.5
-2.5
0.4
-2.25
-2.25
0.75
-2.0
-2.0
1.0
V
V
V
High
Output Voltage
Gate 3 Low
High
ID3=12mA, IGO3=-10μA
ID3=8mA, IGO3=0μA
VG3L
VG3H
-3.0
0.4
-2.75
0.75
-2.0
1.0
V
V
DRAIN CHARACTERISTICS
PARAMETER
Current
SYMBOL
ID
TEST CONDITONS
Set by RCAL
MIN.
8
0
TYP. MAX. UNIT
10
12
15
mA
mA
Current range
Current Change
With Vcc
IDrng
ΔIDV
ΔIDT
Vcc=5 ~ 10V
Tj=-40 ~ +80℃
ID1=10mA,VPOL=15.5V
ID2=10mA,VPOL=14V
ID3=10mA,VPOL=15.5V
0.5
0.05
2.2
2.2
2.2
%/V
%/℃
With Tj
Drain 1 Change: High
Drain 2 Change: High
Drain 3 Change: High
Voltage Change
With Vcc
VD1
VD2
VD3
2.0
2.0
2.0
2.4
2.4
2.4
V
V
V
ΔVDV
ΔVDT
Vcc=5 ~ 10V
Tj=-40 ~ +80℃
0.5
50
%/V
ppm
With Tj
Leakage Current
μA
μA
Drain 1
IL1 *
IL2 *
VD1=0.5V,VPOL=14V
VD2=0.5V,VPOL=15.5V
10
10
Drain 2
* FOR SSOP-20(150mil) package only.
3
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
TONE DETECTION CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITONS
MIN.
1.75
TYP. MAX. UNIT
Filter Amplifier
Bias Voltage 5
Input Impedance
Amplifier Gain
V Threshold 5
VOUT
Finz
AG
IFIN=0
1.95
150
30
2.15
V
Ω
VFIN=100mV p/p
VFIN=100mV p/p
V/mA
FVT
100
170
350
mVp/p
Output Stage
Lov Volt.Range 6
Lov Bias Current
VLov
ILOV
IL=50mA(LB or HB)
VLOV=0
-0.5
0.02
Vcc-1.8
1.0
V
μA
0.15
LB Output Low
VLOV=0, IL=0
Enabled 6
Enabled 6
RIb-Csub=1MΩ
-3.05
-0.01
-2.80
0
-2.55
0.1
V
V
VLBL
VLBH
VHBL
VHBH
VLOV=3V, IL=0mA
RIb-Gnd=1MΩ
LB Output High
HB Output Low
VLOV=0, IL=10mA
VLOV=3V ,IL=50mA
Disabled 6 -0.025
0
3.0
-2.80
0.025
3.1
-2.55
V
V
Disabled 6
Disabled 6
2.9
-3.05
VLOV=0 ,IL=0
Rhb-Csub=1MΩ
VLOV=3V, IL=0mA
Disabled 6
-0.01
0
0.1
V
V
Rhb-Gnd=1MΩ
HB Output High
Enabled 6
Enabled 6
-0.025
2.9
0
3.0
0.025
3.1
VLOV=0, IL=10mA
VLOV=3V, IL=50mA
POLARITY SWITCH CHARACTERISTICS
PARAMETER
Input Current
SYMBOL
IPOL
TEST CONDITONS
MIN.
10
TYP. MAX. UNIT
VPOL=25V (Applied via RPOL=2kΩ)
μA
25
40
Threshold
VTPOL
14
14.75
15.5
V
VPOL=25V (Applied via RPOL=2kΩ)
VPOL=25V (Applied via RPOL=2kΩ)
Voltage
Switching Speed
NOTES:
TSPOL
100
ms
1.
The negative bias voltages specified are generated on-chip using an internal oscillator. Two external capacitors,
CNB and CSUB, of 47nF are required for this purpose.
The characteristics are measured using an external reference resistor RCAL of value 33k wired from pins RCAL
to ground.
Noise voltage is not measured in production.
Noise voltage measurement is made with FETs and gate and drain capacitors in place on all
outputs.CG,4.7nF,are connected between gate output and ground,CD,10nF,are connected between drain
outputs and ground.
These parameters are linearly related to Vcc.
These parameters are measured using Test Circuit 1
2.
3.
4.
5.
6.
4
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
TEST CIRCUIT 1
LINEAR INTEGRATED CIRCUIT
UTC L8115
SSOP20(150mil)
1
R2
Vcc
G1
D1
G2
D2
R1
2k
Rcal
Vpol
Fin
V1
33k
5V DC
CF1
+
-
NC
NC
Lov
G3
4.7nF
V2
See Note 1
D3
+
-
Gnd
Cnb1
HB
Cnb2
N/C
LB
Csub
Note 1: V2 Characteristics
Type: AC source
CNB
47nF
CSUB
Frequency: 22kHz
47nF
Voltage: 350mVp/p Enabled
100mVp/p Disabled
Note:Same circuit used for SSOP16(150mil) but with adjusted pinout.
TYPCIAL CHARACTERISTICS
JFET Drain Curretn vs Rcal
16
Vsub vs External Load
Note: Operation with loads>200μA is not
Vcc=5V
14
12
10
8
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
guaranteed.
Vcc=5V
6V
8V
6
10V
4
2
0
100
20
40
60
Rcal (k)
80
0
0
0.2
0.4
0.6
0.8
1.0
External Vsub Load (mA)
5
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
LB/HB Offset Voltage vs Load Current
JFET Drain Voltage vs Drain Current
2.4
VCC=5V, VLOV=0V
4
Ta=70 ℃
Ta=25 ℃
2
2.3
2.2
2.1
Ta=-40 ℃
0
-2
-4
-6
-8
Vcc=5V
6V
8V
10V
6
0
10
20
30
40
50
4
8
2
10
12
14
16
Drain Current (mA)
Load Current (mA)
LB/HB Dropout Voltage vs Load Current
Vcc=5V
2.0
1.9
Ta=-40℃
1.8
1.7
1.6
1.5
1.4
1.3
Ta=25℃
Ta=70℃
1.2
0
10
20
Load Current (mA)
40
50
30
FUNCTIONAL DIAGRAM
-
+
Vcc
+
-
VD set
ID Sense
DN
+
-
RCAL
QN
ID Set
GN
+
-
RCAL
(Sets ID)
20μA
Negative
supply
Gen.
CSUB
GND
CSUB
CNB1
CNB2
CNB
6
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION
The UTC L8115 provides all the bias requirements for external FETs, including the generation of the negative
supply required for gate biasing, from the single supply voltage.The diagram above shows a single stage from
the UTC series. It contains 3 such stages. The negative rail generator is common to both devices.
The drain voltage of the external FET QN is set by the UTC L8115 to its normal operating voltage. This is
determined by the on board VD Set reference, the UTC L8115 this is nominally 2.2 volts whilst.
The drain current taken by the FET is monitored by the low value resistor ID Sense. The amplifier driving the
gateof the FET adjusts the gate voltage of QN so that the drain current taken matches the current called for by an
external resistor RCAL.
Since the FET is a depletion mode transistor, it is often necessary to drive its gate negative with respect to
groundto obtain the required drain current. To provide this capability powered from a single positive supply, the
deviceincludes a low current negative supply generator. This generator uses an internal oscillator and two external
capacitors, CNB and CSUB.
The following schematic shows the function of the VPOL input. Only one of the two external FETs numberd Q1
and Q2 are powered at any one time,their selection is controlled by the input VPOL.This input is designed to be wired
to the power input of the LNB via a high value(10k) resistor.With the input voltage of the LNB set at or below
14V,.FET Q2 will be enabled.With the input voltage at or above 15.5V,FET Q1 will be enabled.The disabled FET has
its gate driven low and its drain terminal is switched open circuit. It is permissible to commect the drain pins D1 and
D2 together if required by the application circuit;this is done internally in the SSOP-16(150mil) version.FET number
Q3 is always active regardless of the voltage applied to VPOL.
D1
Q1
Drain
Voltage &
Current
VPOL Input
Enable
Enable
-
Controller
+
G1
20μA
14.75V
Reference
VSUB
D2
Q2
Drain
Voltage &
Current
Controller
G2
20μA
VSUB
D3
Drain
Q3
G3
Voltage &
Current
Enable
Controller
20μA
VSUB
For SSOP-20(150mil) Package
7
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
Control Input Switch Function
Input sense
Polarisation
Select
≤14 volts
≥15.5 volts
Vertical
FET Q2
FET Q1
Horizontal
For many LNB applications, tone detection for band switching is required. The UTC L8115 includes all the
circuitry necessary to detect the presence of a 22kHz tone modulated on the supply input to the LNB. The main
elements of the detector are an op-amp, a rectifier/smoother and a comparitor. The op-amp has a pre-set internal
feedback resistor so that just a simple RC network wired to the input gives user defined gain and low frequency
cut filter characteristics. The RC network components also serve two other purposes. The resistor provides
overvoltage protection for the Vpol pin and the capacitor minimises tone interference of the Vpol threshold. The
upper frequency roll-off of the op-amp has been set internally at above 100kHz to allow the amplifier to be used
with other common tone switch frequencies.
The rectifier/smoother/comparitor function is provided by a complex propriety circuit that allows the
UTC L8115 to reliably detect wanted tones whilst ignoring low frequency square wave switch box signals,
DiSEqC™ bursts and supply switching transients common when using DiSEqC-2™ ready set-top boxes. This is
all achieved without the need for any further external components. The threshold of the comparitor is supply
dependent, hence the gain of the preceding op-amp must be adjusted in line with supply voltage. See the table
below for recommended values for 22kHz detection, given for a range of supplies.
Lov Input
UTC L8115
-
LB Output
+
Enable
VPOL
Fin
R2
2k
HB
-
+
LNB Input
Output
Enable
CF1
4.7n
-
+
-
+
Ref
Ref
FILTER
RECTIFIER COMPARATOR
OUTPUT DRIVERS
Table_1
Filter
Components
Cf
Supply Voltage (Vcc)
5V
4.7nF
2k
6V
4.7nF
1.8k
7V
8V
10nF
1.3k
9V
10nF
1.1k
10V
10nF
1.0k
4.7nF
1.5k
Rvpol(R2)
Note:Optimised for F(tone)=22kHz
8
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
APPLICATIONS CIRCUIT
The diagrams below show partial application circuits for the UTC series showing all external components
required for appropriate biasing. The bias circuits are unconditionally stable over the full temperature range with
the associated FETs and gate and drain capacitors in circuit.
Capacitors C2 and C4 ensure that residual power supply and substrate generator noise is not allowed to affect
other external circuits which may be sensitive to RF interference. They also serve to suppress any potential RF
feedthrough between stages via the UTC device. These capacitors are required for all stages used. Values of
10nF and 4.7nF respectively are recommended however this is design dependent and any value between 1nF
and 100nF could be used.
The capacitors CNB and CSUB are an integral part of the UTCs negative supply generator. The negative
bias voltage is generated on-chip using an internal oscillator. The required value of capacitors CNB and CSUB
is 47nF. This generator produces a low current supply of approximately -3 volts. Although this generator is
intended purely to bias the external FETs, it can be used to power other external circuits via the CSUB pin.
Resistor RCAL sets the drain current at which all external FETs are operated. If any bias control circuit is
not required, its related drain and gate connections may be left open circuit without affecting the operation of
the remaining bias circuits.
The UTC L8115 has been designed to protect the external FETs from adverse operating conditions.
With a JFET connected to any bias circuit, the gate output voltage of the bias circuit can not exceed the
range -3V to 1V under any conditions, including powerup and powerdown transients. All the bias stages
include drain currents limits which work independently in each stage. Should the negative bias generator be
shorted or overloaded so that the drain current of the external FETs can no longer be controlled, the drain
supply to FETs is shut down to avoid damage to the FETs by excessive drain current.
*L1
Vcc
C2
* C1
* L2
10nF
Q2
Q1
* L3
LNB Downfeed
C6
C4
* C5
* C3
R2
2k
UTC L8115
SSOP16 (150mil)
1
10nF
10nF
Vcc
Rcal
Vpol
Fin
G1
R1
D12
33k
G2
C1
G3
Lov
HB
D3
4.7nF
* Stripline Elements
Gnd
Cnb1
LB
Csub
Cnb2
CNB
47nF
CSUB
47nF
SSOP16(150mil) Applications circuit
9
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
*L1
LNB Downfeed
Vcc
C2
10nF
Q1
* C1
* L2
R2
2k
UTC L8115
SSOP20(150mil)
1
Vcc
Rcal
Vpol
Fin
G1
D1
R1
33k
C4
* C3
10nF
CF1
G2
D2
G3
NC
NC
Lov
HB
4.7nF
D3
* Stripline Elements
Gnd
Cnb1
Cnb2
LB
Csub
N/C
CNB
47nF
CSUB
47nF
SSOP20(150mil) Applications circuit
The following block diagram shows the main section of an LNB designed for use with the Astra series of
satellites. The UTC L8115 is the core bias and control element of this circuit. The UTC provides the negative rail,
FET bias control, polarisation switch control, tone detection and band switching with the minimum of external
components. Compared to other discrete component solutions the UTC circuit reduces component count and
overall size required.
Single Universal LNB Block Diagram
Vertical
Antenna
Gain Stage
GaAs/HEMTFET
Regulator
2
Polarity Switch &Tone Detect Input
Gain Stage
GaAs/HEMTFET
Mixer
+
Gain Stage
ASTRA
Universal Band
10.70GHz-12.75 GHz
UTC L8115
3
IF down feed
Band
Switch
Output
950-2050 MHz - Low Band
Horizontal
Antenna
1100 - 2150 MHz - High Band
1
Local Osc 1
Local Osc 2
9.75 GHz - Low Band 10.6GHz - High Band
Gain Stage
GaAs/HEMTFET
Tone detection and band switching is provided on the UTC L8115 devices. The following diagrams describes
how this feature operates in an LNB and the external components required. The presence or absence of a 22kHz
tone applied to pin FIN enables one of two outputs, LB and HB. A tone present enables HB and tone absent enables
10
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
LB. The LB and HB outputs are designed to be compatible with both MMIC and discrete (bipolar or FET) local
oscillator applications, selected by pin LOV. Referring to Figure 1 wiring pin LOV to ground will force LB and HB to
switch between -2.6V (disabled) and 0V (enabled). Referring to Figures 2 and 3 wiring pin LOV to a positive voltage
source (e.g. a potential divider across VCC and ground set to the required oscillator supply voltage, VOSC) will
force the LB and HB outputs to provide the required oscillator supply, VOSC, when enabled and 0V when disabled.
Tone Detection Function
LOV
FIN
LB
HB
LB
HB
GND
22kHz
Disabled
Enabled
Disabled
Enabled
Enabled
Disabled
Enabled
Disabled
-3 volts
GND
Note 1
Vosc
GND
-3 volts
Vosc
-
22kHz
-
VOSC
Note 1
Note 1: 0 volts in typical LNB applications but ependent on extenal circuits.
APPLICATIONS LOCAL OSCILLATOR CIRCUITS
Vcc
LNB Downfeed
R2
2.0k
UTC L8115
1
Vcc
CF1
20
G1
D1
G2
D2
G3
4.7nF
R1
RCAL
VPOL
FIN
33K
Vcc
NC
R3
G2
NC
D3
GND
Lov
HB
LB
10
R4
CHB
Local
Osc.
CNB1
CNB2
100nF
G1
MMIC
Csub
10
R6
N/C
R5
CNB
CLB
100n
300k
47nF
300k
CSUB
47nF
Figure 1
11
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
Vcc
LNB Downfeed
R2
2.0K
R5
2k
UTC L8115
1
Vcc
G1
D1
G2
D2
G3
20
CF1
R1
33K
RCAL
VPOL
FIN
4.7nF
10.6GHz Local Osc.
R3
NC
D3
NC
GND
Lov
CNB1
CNB2
HB
LB
Csub
10
9.75GHz Local Osc.
R4
N/C
CNB
10
R6
CHB
CSUB
47nF
3k
47nF
100n
R8
CLB
100n
R7
Figure 2
Vcc
LNB Downfeed
R2
2.0K
R5
2 k
UTC L8115
1
Vcc
G1
D1
G2
D2
G3
20
CF1
4.7nF
R1
RCAL
VPOL
FIN
33K
NC
10.6GHz Local Osc.
D3
NC
R3
10
GND
Lov
CNB1
CNB2
HB
LB
Csub
9.75GHz Local Osc.
R4
N/C
CNB
R8
10
R6
3k
CHB
100n
CSUB
47nF
47nF
Q2
R7
CLB
100n
Q1
Figure 3
12
UTC UNISONIC TECHNOLOGIES CO., LTD.
QW-R123-005,B
UTCL8115
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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UTC UNISONIC TECHNOLOGIES CO., LTD.
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