MC14511_15_技术文档

UTC MC14511

CMOS IC

BCD-TO-SEVEN SEGMENT

LATCH/DECODER/DRIVER

DESCRIPTION

The UTC MC14511 BCD–to–seven segment

latch/decoder/driver is constructed with complementary

MOS (CMOS) enhancement mode devices and NPN

bipolar output drivers in a single monolithic structure. The

circuit provides the functions of a 4-bit storage latch, an

8421 BCD-to-seven segment decoder, and an output

drive capability. Lamp test (LT), blanking (BI), and latch

enable (LE) inputs are used to test the display, to turn-off

or pulse modulate the brightness of the display, and to

store a BCD code, respectively. It can be used with

seven-segment light-emitting diodes (LED),

SOP-16

DIP-16

incandescent, fluorescent, gas discharge, or liquid crystal

readouts either directly or indirectly.

Applications include instrument (e.g., counter, DVM,

etc.) display driver, computer/calculator display driver,

cockpit display driver, and various clock, watch, and

timer uses.

FEATURES

* Low Logic Circuit Power Dissipation

* High–Current Sourcing Outputs (Up to 25 mA)

* Latch Storage of Code

* Blanking Input

* Lamp Test Provision

* Readout Blanking on all Illegal Input Combinations

* Lamp Intensity Modulation Capability

* Time Share (Multiplexing) Facility

* Supply Voltage Range = 3.0 V ~ 18 V

* Capable of Driving Two Low-power TTL Loads, One

Low-power Schottky TTL Load or Two HTL Loads Over

the Rated Temperature Range

* Chip Complexity: 216 FETs or 54 Equivalent Gates

* Triple Diode Protection on all Inputs

UTC UNISONIC TECHNOLOGIES CO., LTD.

1

QW-R502-021,B

UTC MC14511

CMOS IC

PIN CONFIGURATION

B

1

2

3

4

5

6

16

15

14

13

12

11

VDD

f

C

LT

BI

a

g

f

b

a

e

c

LE

D

b

c

d

7

8

d

e

10

9

A

Vss

DISPLAY

0

1

2

3

4

5

6

7

8

9

TRUTH TABLE

Inputs

LT

Outputs

LE

X

0

1

BI

X

0

1

D

C

X

0

1

0

1

X

B

A

X

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

X

a

1

0

1

0

1

0

1

0

1

0

b

c

1

0

1

0

1

0

d

e

1

0

1

0

1

0

1

0

1

0

f

g

1

0

1

0

1

0

Display

0

1

X

0

1

X

0

1

0

1

0

1

0

1

X

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

*

1

0

1

0

1

0

1

0

8

Blank

0

1

2

3

4

5

6

7

8

9

Blank

*

X=Don’t Care

*Depends upon the BCD code previously applied when LE=0

UTC UNISONIC TECHNOLOGIES CO., LTD.

2

QW-R502-021,B

UTC MC14511

CMOS IC

This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric

fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than

maximum rated voltages to this high-impedance circuit. A destructive high current mode may occur if Vⁱⁿand Vout are

not constrained to the range:

VSS ≤ (Vin or Vout) ≤ VDD.

Due to the sourcing capability of this circuit, damage can occur to the device if VDD is applied, and the outputs are

shorted to VSS and are at a logical 1 (See Maximum Ratings).

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V^SSor VDD).

BLOCK DIAGRAM

BI

4

13

a

A

B

7

1

12

11

10

9 e

15

b

c

d

f

C

2

14

g

LT

3

D

6

5

VDD=PIN 16

Vss=PIN 8

LE

UTC UNISONIC TECHNOLOGIES CO., LTD.

3

QW-R502-021,B

UTC MC14511

PARAMETER

DC Supply Voltage Range

Input Voltage Range, All Inputs

DC Current Drain per Input Pin

Power Dissipation, per Package

(Note 2)

Maximum Output Drive Current

(Source) per Output

Maximum Continuous Output

Power (Source) per Output (Note 3)

Operating Temperature Range

Storage Temperature Range

CMOS IC

ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to Vss) (Note 1)

SYMBOL

RATINGS

-0.5 ~ +18.0

-0.5 ~ VDD+0.5

10

UNIT

V

VDD

Vin

I

mA

P^D

500

mW

mA

IOHmax

P^OHmax

25

50

℃

Ta

Tstg

-55 ~ +125

-65 ~ +150

Note 1: Maximum Ratings are those values beyond which damage to the device may occur.

Note 2: Temperature Derating:

Plastic “P and D/DW” Packages: - 7.0 mW/℃ From 65℃ ~ 125℃

Note 3: POHmax = IOH (VDD – VOH)

ELECTRICAL CHARACTERISTICS ^{(Voltages Referenced to Vss)}

VDD

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V

Vdc

Output Voltage

5.0 “0” Level

10 Vin=V^DDor 0

15

0

0.05

VOL

5.0 “1” Level

10 Vin=0 or V^DD

15

4.1

9.1

14.1

4.57

9.58

14.59

VOH

VIL

V

Input Voltage #

“0” Level

5.0 Vo=3.8 or 0.5 V

10 Vo=8.8 or 1.0 V

15 Vo=13.8 or 1.5V

“1” Level

2.25

4.50

6.75

1.5

3.0

4.0

5.0 Vo=0.5 or 3.8 V

10 Vo=1.0 or 8.8 V

15 Vo=1.5 or 13.8 V

5.0 IOH=0mA

I^OH=5.0mA

3.5

7.0

11

2.75

5.50

8.25

4.57

4.24

4.12

3.94

3.70

3.54

9.58

9.26

9.17

9.04

8.90

8.70

V^IH

V

Output Drive Voltage

Source

4.1

IOH=10mA

3.9

3.4

9.1

9.0

8.6

I^OH=15mA

I^OH=20mA

I^OH=25mA

V^OH

10 I^OH=0mA

IOH=5.0mA

IOH=10mA

V

IOH=15mA

IOH=20mA

IOH=25mA

UTC UNISONIC TECHNOLOGIES CO., LTD.

4

QW-R502-021,B

UTC MC14511

CMOS IC

VDD

Vdc

15 IOH=0mA

IOH=5.0mA

I^OH=10mA

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

14.1

TYP

MAX

UNIT

Output Drive Voltage

Source

14.59

14.27

14.18

14.07

13.95

13.70

0.88

14

VOH

V

IOH=15mA

IOH=20mA

13.6

I^OH=25mA

Output Drive Current

5.0 V^OL=0.4V

10 VOL=0.5V

15 VOL=1.5V

15

Sink

0.51

1.3

3.4

IOL

2.25

8.8

mA

μA

±0.00001

±0.1

Input Current

Iin

Input Capacitance

Quiescent Current

Cin

5.0

7.5

5.0

10

pF

5.0 (Per Package) Vin=0 or

10 V^DD,

0.005

0.010

0.015

μA

IDD

IT

Iout=0μA

15

20

Total Supply Current

(Notes 5 & 6)

5.0 (Dynamic plus Quiescent,

10 Per Package)

15 (C^L=50pF on all outputs, all

buffers switching)

IT=(1.9μA/kHz) f+IDD

IT=(3.8μA/kHz) f+IDD

IT=(5.7μA/kHz) f+IDD

Note 4: Noise immunity specified for worst–case input combination.

Noise Margin for both “1” and “0” level =

1.0 V min @ VDD = 5.0 V

2.0 V min @ V^DD= 10 V

2.5 V min @ VDD = 15 V

Note 5: The formulas given are for the typical characteristics only at 25℃.

Note 6: To calculate total supply current at loads other than 50 pF:

IT (CL) = IT(50 pF) + 3.5 x 10^–3(CL – 50) VDDf

Where: IT is inμA (per package), CL in pF, VDD in Vdc, and f in kHz is input frequency.

UTC UNISONIC TECHNOLOGIES CO., LTD.

5

QW-R502-021,B

UTC MC14511

CMOS IC

SWITCHING CHARACTERISTICS (Note 7) (CL=50pF, Ta=25℃)

VDD

PARAMETER

Output Rise Time

SYMBOL

TEST CONDITIONS

Min

TYP

MAX

UNIT

Vdc

5.0 t^TLH=(0.40 ns/pF) CL+20 ns

10 tTLH=(0.25 ns/pF) CL+17.5 ns

15 t^TLH=(0.20 ns/pF) CL+15 ns

5.0 tTHL=(1.5 ns/pF) CL+50 ns

10 t^THL=(0.75 ns/pF) CL+37.5 ns

15 tTHL=(0.55 ns/pF) CL+37.5 ns

5.0 t^PLH=(0.40 ns/pF) CL+620 ns

10 tPLH=(0.25 ns/pF) CL+237.5 ns

15 t^PLH=(0.20 ns/pF) CL+165 ns

40

30

25

80

60

50

tTLH

ns

Output Fall Time

125

250

150

130

1280

500

350

t^THL

tPLH

75

ns

65

Data Propagation Delay

Time

640

250

175

5.0 tPHL=(1.3 ns/pF) CL+655 ns

720

290

200

600

200

150

485

200

160

313

125

90

1440

580

400

750

300

220

970

400

320

625

250

180

625

250

180

t^PHL

tPLH

t^PHL

tPLH

t^PHL

t^su

10 t^PHL=(0.60 ns/pF) CL+260 ns

15 tPHL=(0.35 ns/pF) CL+182.5 ns

Blank Propagation Delay

Time

5.0 t^PLH=(0.30 ns/pF) CL+585 ns

10 tPLH=(0.25 ns/pF) CL+187.5 ns

15 t^PLH=(0.15 ns/pF) CL+142.5 ns

ns

5.0 tPHL=(0.85 ns/pF) CL+442.5 ns

10 t^PHL=(0.45 ns/pF) CL+177.5 ns

15 tPHL=(0.35 ns/pF) CL+142.5 ns

Lamp Test Propagation

Delay Time

5.0 tPLH=(0.45 ns/pF) CL+290.5 ns

10 t^PLH=(0.25 ns/pF) CL+112.5 ns

15 tPLH=(0.20 ns/pF) CL+80 ns

5.0 t^PHL=(1.3 ns/pF) CL+248 ns

313

125

90

10 tPHL=(0.45 ns/pF) CL+102.5 ns

15 tPHL=(0.35 ns/pF) CL+72.5 ns

Setup Time

5.0

10

15

5.0

10

15

5.0

10

15

100

40

30

ns

Hold Time

60

th

40

30

Latch Enable Pulse Width

520

220

130

260

110

65

tWL

Note 7: The formulas given are for the typical characteristics only.

UTC UNISONIC TECHNOLOGIES CO., LTD.

6

QW-R502-021,B

UTC MC14511

CMOS IC

SWITCHING TIME WAVEFORMS

20 ns

VDD

90%

50%

A, B, AND C

1

10%

Vss

VOH

2f

50% DUTY CYCLE

ANY OUTPUT

50%

VOL

Input LE low, and Inputs D, BI and LT high.

f in respect to a system clock.

All outputs connected to respective CL loads.

Figure 1. Dynamic Power Dissipation Signal Waveforms

20 ns

VDD

90%

50%

LE

10%

Vss

VDD

th

20 ns

INPUT C

20 ns

tsu

VDD

90%

50%

INPUT C

50%

10%

Vss

VOH

Vss

tPLH

tPHL

VOH

90%

10%

OUTPUT g

50%

VOL

OUTPUT g

tTLH

tTHL

VOL

(a) Inputs D and LE low, and Inputs A, B, BI

and LT high

(b) Input D low, Inputs A, B, BI and LT high

20 ns

VDD

20 ns

90%

50%

LE

10%

Vss

tWL

(c) Data DCBA strobed into Iatches.

Figure 2. Dynamic Signal Waveforms

UTC UNISONIC TECHNOLOGIES CO., LTD.

7

QW-R502-021,B

UTC MC14511

CMOS IC

CONNECTIONS TO VARIOUS DISPLAY READOUTS

LIGHT EMITTING DIODE (LED) READOUT

VDD

COMMON

ANODE LED

COMMON

CATHODE LED

〜1.7V

〜

〜 1.7V

～

Vss

INCANDESCENT READOUT

FLUORESCENT READOUT

VDD

**

DIRECT

(LOW BRIGHTNESS)

FILAMENT

SUPPLY

Vss

Vss OR APPROPRIATE

VOLTAGE BELOW Vss.

(CAUTION: Maximum working voltage=18.0V)

GAS DISCHARGE READOUT

LIQUID CRYSTAL(LCD) READOUT

APPROPRIATE

EXCITATION

(SQUARE WAVE, Vss TO VDD)

VOLTAGE

VDD

1/4 OF MC14070B

Vss

,

** A filament pre-warm resistor is recommended to reduce filament

thermal shock and increase the effective cold resistance of the

filament.

Direct dc drive of LCD s not recommended for life of

LCD readouts.

UTC UNISONIC TECHNOLOGIES CO., LTD.

8

QW-R502-021,B

UTC MC14511

CMOS IC

UTC assumes no responsibility for equipment failures that result from using products at values that

exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or

other parameters) listed in products specifications of any and all UTC products described or contained

herein. UTC products are not designed for use in life support appliances, devices or systems where

malfunction of these products can be reasonably expected to result in personal injury. Reproduction in

whole or in part is prohibited without the prior written consent of the copyright owner. The information

presented in this document does not form part of any quotation or contract, is believed to be accurate

and reliable and may be changed without notice.

UTC UNISONIC TECHNOLOGIES CO., LTD.

9

QW-R502-021,B


型号：	MC14511_15
厂家：	Unisonic Technologies
描述：	BCD-TO-SEVEN SEGMENT LATCH/DECODER/DRIVER 驱动 CD
文件：	总9页 (文件大小：145K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MC14511_15 [UTC]

相关型号：

MC14511_18

MC14512

MC14512

MC14512B

MC14512BAL

MC14512BALDS

MC14512BALS

MC14512BCL

MC14512BCLD

MC14512BCLDS

MC14512BCLS

MC14512BCP