MJE13003-E-TN3-F-R [UTC]
Transistor;型号: | MJE13003-E-TN3-F-R |
厂家: | Unisonic Technologies |
描述: | Transistor |
文件: | 总7页 (文件大小:142K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
NPN SILICON POWER
TRANSISTORS
ꢀ
DESCRIPTION
These devices are designed for high–voltage, high–speed
power switching inductive circuits where fall time is critical. They
are particularly suited for 115 and 220V SWITCHMODE .
1
TO-252
ꢀ
FEATURES
* Reverse Biased SOA with Inductive Load @ Tc=100℃
* Inductive Switching Matrix 0.5 ~ 1.5 Amp, 25 and 100℃
Typical tc = 290ns @ 1A, 100℃.
* 700V Blocking Capability
*Pb-free plating product number: MJE13003L
ꢀ
APPLICATIONS
* Switching Regulator’s, Inverters
* Motor Controls
* Solenoid/Relay drivers
* Deflection circuits
ꢀ
ORDERING INFORMATION
Order Number
Pin Assignment
Packing
Package
Normal
Lead Free Plating
1
B
B
2
C
C
3
E
E
MJE13003-x-TN3-F-R
MJE13003L-x-TN3-F-R
TO-252
TO-252
Tape Reel
Tube
MJE13003-x-TN3-F-T
MJE13003L-x-TN3-F-T
Note: x: Rank, refer to Classification of hFE1
MJE13003L-x-TN3-F-R
.
(1)Packing Type
(2)Pin Assignment
(3)Package Type
(4)Rank
(1) R: Tape Reel, T: Tube
(2) refer to Pin Assignment
(3) TN3: TO-252
(4) x: refer to Classification of hFE1
(5) L: Lead Free Plating, Blank: Pb/Sn
(5)Lead Plating
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NPN EPITAXIAL SILICON TRANSISTOR
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ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
VCEO(SUS)
VCEO
VEBO
IC
RATINGS
UNIT
Collector-Emitter Voltage
Collector-Emitter Voltage
Emitter Base Voltage
400
700
9
V
V
V
Continuous
Peak (1)
1.5
Collector Current
Base Current
A
A
A
ICM
3
Continuous
Peak (1)
IB
0.75
1.5
IBM
Continuous
Peak (1)
IE
2.25
4.5
Emitter Current
IEM
Total Power Dissipation (TC=25℃)
Junction Temperature
PD
25
W
℃
℃
TJ
150
-40 ~ +150
Storage Temperature
TSTG
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ꢀ
ELECTRICAL CHARACTERISTICS (TC=25°C, unless otherwise specified.)
PARAMETER SYMBOL TEST CONDITIONS
MIN TYP MAX UNIT
OFF CHARACTERISTICS (Note)
Collector-Emitter Sustaining Voltage
VCEO(SUS) IC=10 mA , IB=0
400
V
V
V
CEO=Rated Value,
BE(OFF)=1.5 V
TC=25°C
TC=100℃
1
5
1
mA
Collector Cutoff Current
ICEO
IEBO
Emitter Cutoff Current
VEB=9 V, IC=0
mA
SECOND BREAKDOWN
Second Breakdown Collector Current
with bass forward biased
Is/b
See Figure 5
See Figure 6
Clamped Inductive SOA with base
reverse biased
RBSOA
ON CHARACTERISTICS (Note)
hFE1
hFE2
IC=0.5A, VCE=2V
IC=1A, VCE=2V
IC=0.5A, IB=0.1A
IC=1A, IB=0.25A
IC=1.5A, IB=0.5A
8
5
40
25
0.5
1
DC Current Gain
Collector-Emitter Saturation Voltage
VCE(SAT
)
V
V
3
IC=1A, IB=0.25A, TC=100℃
1
IC=0.5A, IB=0.1A
1
Base-Emitter Saturation Voltage
VBE(SAT)
IC=1A, IB=0.25A
IC=1A, IB=0.25A, TC=100℃
1.2
1.1
DYNAMIC CHARACTERISTICS
Current-Gain-Bandwidth Product
Output Capacitance
SWITCHING CHARACTERISTICS
Resistive Load (Table 1)
Delay Time
fT
IC=100mA, VCE=10V, f=1MHz
VCB=10V, IE=0, f=0.1MHz
4
10
21
MHz
pF
Cob
μs
μs
μs
μs
tD
tR
0.05
0.5
2
0.1
1
VCC=125V, IC=1A, IB1=IB2=0.2A,
tP=25μs, Duty Cycle≤1%
Rise Time
Storage Time
tS
4
Fall Time
tFALL
0.4
0.7
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
ꢀ
ELECTRICAL CHARACTERISTICS(Cont.)
Inductive Load, Clamped (Table 1)
Storage Time
μs
μs
μs
tSV
tC
1.7
4
IC=1A, Vclamp=300V, IB1=0.2A,
BE(OFF)=5Vdc, TC=100℃
Crossover Time
0.29 0.75
0.15
V
Fall Time
tFALL
Note: Pulse Test : PW=300μs, Duty Cycle≤2%
ꢀ CLASSIFICATION OF hFE1
RANK
A
B
C
D
E
F
RANGE
8 ~ 16
15 ~ 21
20 ~ 26
25 ~ 31
30 ~ 36
35 ~ 40
Table 1.Test Conditions for Dynamic Performance
Resistive
Switching
Reverse Bias Safe Operating Area and Inductive Switching
+5V
Vcc
33
1N4933
MJE210
L
MR826*
0.001μF
+125V
33 1N4933
5V
Vclamp
Ic
Pw
2N2222
1k
+5V
Rc
RB
1k
DUTY CYCLE≦10%
tR, tF≦10ns
TUT
68
*SELECTED FOR≣1kV
SCOPE
RB
D1
IB
5.1k
51
VCE
1k
T.U.T.
1N4933
270
2N2905
47
-4.0V
MJE200
0.02μF
NOTE
100
PW and Vcc Adjusted for Desired Ic
RB Adjusted for Desired IB1
1/2W
-VBE(OFF)
VCC=125V
RC=125Ω
D1=1N5820 or
Equiv.
Coil Data :
VCC=20V
Ferroxcube core #6656
Vclamp=300V
GAP for 30 mH/2 A
Lcoil=50mH
Full Bobbin ( ~ 200 Turns) #20
RC=47Ω
Output Waveforms
+10.3 V
0
25μS
tf CLAMPED
t
Ic
Ic(pk)
t1 Adjusted to
Obtain Ic
t1
tf
Test Equipment
Scope-Tektronics
475 or Equivalent
-8.5V
tr, tf<10ns
Duty Cycly=1.0%
RB and Rc adjusted
for desired IB and Ic
Lcoil(Icpk)
t1≒
Vcc
VCE
VCE or
Vclamp
Lcoil(Icpk)
Vclamp
t2≒
t
TIME
t2
Table 2. Typical Inductive Switching Performance
Figure 1. Inductive Switching Measurements
ICPK
Tc
℃
tsv
μs
Vclamp
t
RV
t
FI
t
TI
Ic
AMP
tc
μs
μs
μs
μs
90% Ic
90% Vclamp
t
RV
t
FI
tsv
t
TI
IC
0.35
0.40
0.5
1
0.30
0.30
0.30
0.36
1.3
1.6
0.23
0.26
25
100
tc
10% Vclamp
VCE
IB
25
100
1.5
1.7
0.10 0.14 0.05 0.16
0.13 0.26 0.06 0.29
10%
Icpk
2% Ic
90% IB1
0.10 0.05 0.16
0.22 0.08 0.28
1.5
1.8
3
0.07
0.08
25
100
NOTE: All Data Recorded in the Inductive Switching
Circuit in Table 1
Time
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NPN EPITAXIAL SILICON TRANSISTOR
ꢀ
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive loads, which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements
must be made on each waveform to determine the total switching time. For this reason, the following new terms
have been defined.
t
t
SV = Voltage Storage Time, 90% IB1 to 10% Vclamp
RV = Voltage Rise Time, 10 ~ 90% Vclamp
tFI= Current Fall Time, 90 ~ 10% IC
TI = Current Tail, 10 ~ 2% IC
t
tC = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these
Terms. For the designer, there is minimal switching loss during storage time and the predominant switching power
losses occur during the crossover interval and can be obtained using the standard equation from AN–222:
PSWT = 1/2 VCCIC(tC)f
In general, tRV + tFI ≈ tC. However, at lower test currents this relationship may not be valid.
As is common with most switching transistors, resistive switching is specified at 25℃ and has become a
benchmark for designers. However, for designers of high frequency converter circuits, the user oriented
specifications which make this a “SWITCHMODE” transistor are the inductive switching speeds (tC and tSV) which
are guaranteed at 100℃.
RESISTIVE SWITCHING PERFORMANCE
Figure 2. Turn-On Time
Figure 3. Turn-Off Time
ts
10
7
2
Vcc=125V
Ic/IB=5
Vcc=125V
Ic/IB=5
1
5
TJ=25℃
0.7
0.5
3
2
TJ=25℃
t
R
0.3
0.2
1
0.7
tD @ VBE(OFF)=5V
0.1
0.07
0.05
0.5
tF
0.3
0.2
0.03
0.02
0.1
0.07
0.1
0.2 0.3
0.5
0.7 10
20
0.2
0.3
0.5 0.7
1
2
0.02
0.03 0.05
0.03
0.05
0.07 0.1
0.02
Collector Current, IC (A)
Collector Current, IC (A)
Figure 4. Thermal Response
1
0.7
D=0.5
0.5
0.3
0.2
0.2
0.1
P (PK)
ZθJC(t)=r(t) RθJC
0.05
0.1
RθJC=3.12℃/W Max
D Curves Apply for Power
Pulse Train Shown
Read Time at t1
0.07
0.05
0.02
t1
0.03
0.02
t2
0.01
Single Pulse
TJ(pk)-TC=P(pk) PθJC(t)
Duty Cycle, D=t1/t2
0.01
0.05
0.1
0.2
1
2
3
5
10
0.01
0.02
0.03
0.3
0.5
20
50
100
200
500
1000
Time or Pulse Width, t (ms)
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
ꢀ
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC-VCE limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 5 is based on TC = 25℃; TJ(pk) is variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated when TC≥25℃. Second breakdown limitations do not
derate the same as thermal limitations. Allowable current at the voltages shown on Figure 5 may be found at any
case temperature by using the appropriate curve on Figure 7.
TJ(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be sustained simultaneously during turn-off, in most cases,
with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe
level at or below a specific value of collector current. This can be accomplished by several means such as active
clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe
Operating Area and represents the voltage-current conditions during reverse biased turn-off. This rating is verified
under clamped conditions so that the device is never subjected to an avalanche mode. Figure 6 gives PBSOA
characteristics.
The Safe Operating Area of figures 5 and 6 are specified ratings (for these devices under the test conditions shown.)
Figure 5. Active Region Safe Operating Area
Figure 6. Reverse Bias Safe Operating Area
10
5
1.6
1.2
10 ms
2
1
100μs
5.0 ms
VBE(OFF)=9V
TJ≦100℃
IB1=1A
dc
1.0 ms
0.5
Tc=25℃
0.8
0.4
0
0.2
0.1
Thermal Limit(Single Pule)
Bonding Wire Limit
Second Breakdown Limit
Curves Apply Below Rated
0.05
VCEO
5V
0.02
0.01
3V
1.5V
10
20
50
100
500
400
600
700
800
5
200 300
0
100
200
300
500
Collector-Emitter Clamp Voltage,VCE (V)
Collector-Emitter Voltage, VCE (V)
Figure 7. Forward Bias Power Derating
1
Second Breakdown
Derating
0.8
0.6
0.4
0.2
0
Thermal
Derating
100
140
160
20
40
60
80
120
Case Temperature, TC (℃)
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
ꢀ
TYPICAL PERFORMANCE CHARACTERISTICS
DC Current Gain
Collector Saturation Region
80
60
2
TJ=25℃
TJ=150℃
1.6
40
30
25℃
Ic=0.1A
1.2
0.3A
0.5A
1A 1.5A
20
0.8
0.4
0
-40℃
1
0
8
VCE=2V
- - - - - -VCE=5V
6
4
0.03 0.05 0.07 0.1
0.2 0.3
0.5 0.7
0.002
0.005 0.01 0.02
0.05 0.1 0.2
0.5
0.02
1
2
1
2
Collector Current,IC (A)
Base Current, IB (A)
Base-Emitter Voltage
Collector-Emitter Saturation Region
1.4
1.2
0.35
0.3
VBE(SAT) @ IC/IB=3
- - - - - -VBE(ON) @ VCE=2V
0.25
0.2
Ic/IB=3
1
0.8
0.6
TJ=-40℃
25℃
TJ=-40℃
0.15
0.1
25℃
25℃
150℃
150℃
0.05
0.4
0
0.02
0.03
0.05 0.07 0.1
0.2 0.3
0.5 0.7
1
0.03 0.05 0.07 0.1
0.2 0.3
0.5 0.7
1
2
0.02
2
Collector Current,IC (A)
Collector Current, IC (A)
Capacitance
Cib
Collector cut-off Region
4
10
500
VCE=250V
300
200
TJ=25℃
3
10
TJ=150℃
100
70
2
10
125℃
100℃
50
1
10
30
20
75℃
50℃
0
10
Cob
10
25℃
7
5
FORWARD
+0.2 +0.4
REVERSE
-1
10
-0.4
2
200 500 1000
100
-0.2
0
+0.6
0.2 0.5
0.1
1
5
10 20 50
Base-Emitter Voltage, VBE (V)
Reverse Voltage, VR (V)
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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