TEA1062N-S16-T [UTC]

Telephone Circuit, Bipolar, PDSO16;


型号：	TEA1062N-S16-T
厂家：	Unisonic Technologies
描述：	Telephone Circuit, Bipolar, PDSO16 光电二极管
文件：	总13页 (文件大小：185K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UNISONIC TECHNOLOGIES CO., LTD

TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

LOW VOLTAGE TELEPHONE

TRANSMISSION CIRCUIT WITH

DIALLER INTERFACE

SOP-16

ꢀ

DESCRIPTION

The UTC TEA1062N / TEA1062AN is a bipolar integrated circuit

performing all speech and line interface function, required in the fully

electronic telephone sets. It performs electronic switching between

dialing speech. The circuit is able to operate down to D.C. line

voltage of 1.6V (with reduced performance) to facilitate the use of

more telephone sets in parallel.

DIP-16

ꢀ

FEATURES

* Low d.c. line voltage; operates down to 1.6V

(excluding polarity guard).

* Voltage regulator with adjustment static resistance.

* Provides supply with limited current for external

circuitry.

*Pb-free plating product number:

TEA1062NL/TEA1062ANL

* Symmetrical high-impedance inputs (64kΩ) for

dynamic, magnetic or piezoelectric microphones.

* Asymmetrical high-impedance inputs (32kΩ) for

electret microphones.

* DTMF signal input with confidence tone.

* Mute input for pulse or DTMF dialing.

* Receivering amplifier for several types of earphones.

* Large amplification setting range on microphone

and earpiece amplifiers.

* Line loss compensation facility, line current depedant (microphone

and earpiece amplifiers).

* Gain control adaptable to exchange supply.

* Possibility to adjust the d.c. line voltage.

ꢀ ORDERING INFORMATION

Order Number

Package

Packing

Normal

Lead Free Plating

TEA1062NL-D16-T

TEA1062NL-S16-R

TEA1062NL-S16-T

TEA1062ANL-D16-T

TEA1062ANL-S16-R

TEA1062ANL-S16-T

TEA1062N-D16-T

TEA1062N-S16-R

TEA1062N-S16-T

TEA1062AN-D16-T

TEA1062AN-S16-R

TEA1062AN-S16-T

DIP-16

SOP-16

DIP-16

Tube

Tape Reel

Tube

SOP-16

Tape Reel

Tube

TEA1062NL-D16-T

(1)Packing Type

(2)Package Type

(3)Lead Plating

(1) R: Tape Reel, T: Tube

(2) D16: DIP-16, S16: SOP-16

(3) L: Lead Free Plating, Blank: Pb/Sn

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QW-R108-011.B

TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

PIN CONFIGURATION

16 SLPE

AGC

REG

GAS1

GAS2

GAR

MIC-

MIC+

STAB

MUTE/MUTE

DTMF

Fig. 1 Pin Configurations

ꢀ

PIN DESCRIPTION

PIN NO

PIN NAME

I/O

DESCRIPTION

Positive line terminal

GAS1

GAS2

Gain adjustment; transmitting amplifier

Non-inverting output, receiving amplifier

Gain adjustment; receiving amplifier

Inverting microphone input

GAR

MIC-

MIC+

STAB

V_EE

On-inverting microphone input

Current stabilizer

Negative line terminal

Receiving amplifier input

DTMF

MUTE/MUTE

Dual-tone multi-frequency input

Mute input; TEA1062N high actived

TEA1062AN low actived

Vcc

REG

AGC

SLPE

Positive supply decoupling

Voltage regulator decoupling

Automatic gain control input

Slope (DC resistance) adjustment

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QW-R108-011.B

TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

BLOCK DIAGRAM

GAR

IR 10

GAS1

MIC+

MIC-

GAS2

DTMF

MUTE/MUTE

SUPPLY AND

REFERENCE

CONTROL

CURRENT

LOW

VOLTAGE

CIRCUIT

CURRENT

REFERENCE

VEE

REG

AGC

STAB

SLPE

Fig. 2 Block Diagram

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

ABSOLUTE MAXIMUM RATINGS

PARAMETER

SYMBOL

V_LN

RATINGS

UNIT

Positive Continuous Line Voltage

Repetitive Line Voltage During

Switch-On Or Line Interruption

13.2

V_LN(RL)

Repetitive Peak Line Voltage for a 1 ms Pulse/5s(R10=13Ω,

R9=20Ω(see Fig.15))

V_LN(RPL)

Line Current (Note1) (R9=20Ω)

I_LINE

V_I(+)

V_I(-)

P_D

140

V_CC+0.7

-0.7

Voltage on All Other Pins

Total Power Dissipation (Note2) (R9=20Ω)

Junction Temperature

640

°C

T_J

+125

Operating Ambient Temperature Range

Storage Temperature Range

T_OPR

T_STG

-25 ~ +75

-40 ~ +125

Note: 1. Mostly dependent on the maximum required Ta and the voltage between LN and SLPE (see Figs 6 ).

2. Calculated for the maximum ambient temperature specified Ta=75°C and a maximum junction temperature

of 125°C.

3. Absolute maximum ratings are those values beyond which the device could be permanently damaged.

Absolute maximum ratings are stress ratings only and functional device operation is not implied.

ꢀ

THERMAL DATA

PARAMETER

Thermal Resistance From Junction to Ambient in Free Air

SYMBOL

RATING

UNIT

°C/W

θ_JA

ꢀ

ELECTRICAL CHARACTERISTICS (I_LINE=11~140mA; V_EE=0V; f=800Hz; Ta=25°C; unless otherwise

specified)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP MAX

UNIT

SUPPLY; LN AND VCC(PINS 1 AND 13)

I_LINE=1mA

I_LINE=4mA

1.6

1.9

Voltage Drop Over Circuit,

Between LN and V_EE

V_LN

MIC inputs open

I_LINE=15mA

3.55

4.9

4.0

5.7

4.25

6.5

I_LINE=100mA

_LINE=140mA

7.5

Variation with Temperature

Voltage Drop Over Circuit,

Between LN and V_EEwith

External Resistor R_VA

Supply Current

∆V_LN/∆T I_LINE=15mA

-0.3

3.5

mV/K

I_LINE=15mA, R_VA(LN to REG) =68kΩ

I_LINE=15mA,

4.5

R_VA(REG to SLPE) =39kΩ

I_CC

V_CC=2.8V

0.9

2.7

3.4

2.7

3.4

1.35

Ip=1.2mA; MUTE=HIGH

lp=0mA; MUTE=HIGH

Ip=1.2mA; MUTE=LOW

lp=0mA; MUTE=LOW

2.2

TEA1062N

TEA1062AN

I_LINE=15mA

Supply Voltage

Available for

Peripheral Circuitry

V_CC

_LINE=15mA

MICROPHONE INPUTS MIC+ AND MIC- (PINS 6 AND 7)

Input impedance (differential)

Between MIC- and MIC+

kΩ

∣ Zi∣

Input impedance (sigle-ended)

MIC- or MIC+ to V_EE

Common Mode Rejection Ratio

Voltage Gain MIC+ or MIC- to LN

Gain Variation with Frequency

at f=300Hz and f=3400Hz

CMRR

I_LINE=15mA, R7=68kΩ

50.5

52.0

53.5

±0.2

∆Gvf w.r.t.800Hz

∆GvT w.r.t.25°C, without R6; I_LINE=50mA

Gain Variation with Temperature

at -25°C and +75°C

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

ELECTRICAL CHARACTERISTICS(Cont.)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP MAX

20.7

UNIT

DUAL-TONE MULTI-FREQUENCY INPUT DTMF (PIN 11)

∣ Zi∣

Input Impedance

kΩ

Voltage Gain From DTMF to LN

I_LINE=15mA, R7=68kΩ

25.5

Gain Variation With Frequency

at f=300Hz and f=3400Hz

±0.2

∆Gvf

w.r.t.800Hz

Gain Variation With Temperature

at -25°C and +75°C

±0.2

∆GvT

w.r.t.25°C, I_LINE=50mA

GAIN ADJUSTMENT GAS1 AND GAS2 (PINS 2 AND 3)

Gain Variation Of The Ransmitting

Amplifier By Varying R7 Between

∆Gv

-8

GAS1 And GAS2

Sending Amplifier Output LN (pin 1)

Output Voltage

I_LINE=15mA, THD=10%

1.7

2.3

0.8

V_LN(rms)

I_LINE=4mA, THD=10%

I_LINE=15mA; R7=68kΩ; 200Ω

Noise Output Voltage

V_NO(rms) between MIC- and MIC+;

psophometrically weighted

-69

dBmp

RECEIVING AMPLIFIER INPUT IR (PIN 10)

∣ Zi∣

RECEIVING AMPLIFIER OUTPUT QR (PIN 4)

Input Impedance

kΩ

∣ Z_O∣

Output Impedance

_LINE=15mA; RL(from pin 9 to pin

Ω

Voltage Gain From IR To QR

Gain Variation With Frequency

at f=300Hz and f=3400Hz

Gain Variation With Temperature

at-25°C and +75°C

4 )=300Ω

29.5

32.5

∆Gvf

w.r.t.800Hz

±0.2

∆GvT

w.r.t.25°C without R6 I_LINE=50mA

sinwave drive,

Ip=0mA, R4=100kΩ;

RL=150Ω

RL=450Ω

0.22

0.3

0.33

0.48

THD=2%

Output Voltage

V_O(rms)

_LINE=15mA

R4=100kΩ

_LINE=4mA

THD=10%

RL=150Ω

µV

I_LINE=15mA, R4=100kΩ, IR open –

V_NO(rms) circuit psophometrically weighted

Noise Output Voltage

RL=300Ω

GAIN ADJUSTMENT GAR (PIN 5)

Gain Variation Of Receiving

Amplifier Achievable By

Varying R4 Between GAR And QR

MUTE INPUT (PIN 12)

Input Voltage(HIGH)

∆Gv

-11

1.5

V_IH

V_IL

V_CC

0.3

Input Voltage(LOW)

Input Current

I_MUTE

µA

REDUCTION OF GAIN

TEA1062N

MIC+ Or MIC- To LN

TEA1062AN

MUTE=HIGH

∆Gv

MUTE=LOW

Voltage Gain From DTMF To QR

R4=100kΩ, RL=300Ω

-19

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

ELECTRICAL CHARACTERISTICS(Cont.)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP MAX

UNIT

AUTOMATIC GAIN CONTROL INPUT AGC ( PIN 15)

Controlling The Gain From lR To

QR And The Gain From MIC+/MIC-

to LN; R6 Between AGC And V_EE

Gain Control Range

∆Gv

R6=110kΩ, I_LINE=70mA

-5.8

Highest Line Current For Maximum

Gain

I_LINE

Lowest Line Current For Minimum

Gain

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QW-R108-011.B

TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

FUNCTIONAL DESCRIPTION

Supply: V_CC, LN, SLPE, REG and STAB

Power for the UTC TEA1062N/TEA1062AN and its peripheral circuits is usually obtained from the telephone line.

The IC supply voltage is derived from the line via a dropping resistor and regulated by the UTC

TEA1062N/TEA1062AN. The supply voltage Vcc may also be used to supply external circuits e.g. dialling and

control circuits. Decoupling of the supply voltage is performed by a capacitor between Vcc and V_EEwhile the internal

voltage regulator is decoupled by a capacitor between REG and V_EE. The DC current drawn by the device will vary in

accordance with varying values of the exchange voltage (Vexch), the feeding bridge resistance (Rexch) and the DC

resistance of the telephone line (R_LINE). The UTC TEA1062N/TEA1062AN has an internal current stabilizer operating

at a level determined by a 3.6kΩ resistor connected between STAB and V_EE(see Fig.8). When the line current(I_LINE

)

is more than 0.5mA greater than the sum of the IC supply current (Icc) and the current drawn by the peripheral

circuitry connected to V_CC(lp) the excess current is shunted to V_EEvia LN. The regulated voltage on the line

terminal(V_LN) can be calculated as:

V_LN=Vref+I_SLPE*R9 or;

V_LN=Vref+[( I_LINE– I_CC- 0.5*10 A)－I_P]*R9

where: Vref is an internally generated temperature compensated reference voltage of 3.7V and R9 is an external

resistor connected between SLPE and V_EE. In normal use the value of R9 would be 20Ω. Changing the value of R9

will also affect microphone gain, DTMF gain, gain control characteristics, side tone level, maximum output swing on

LN and the DC characteristics (especially at the lower voltages). Under normal conditions, when I_SLPE≧I_CC+0.5mA +

I_P, the static behavior of the circuit is that of a 3.7V regulator diode with an internal resistance equal to that of R9. In

the audio frequency range the dynamic impedance is largely determined by R1. Fig.3 shows the equivalent

impedance of the circuit.

At line currents below 9mA the internal reference voltage is automatically adjusted to a lower value(typically 1.6V

at 1mA) This means that more sets can be operated in parallel with DC line voltages (excluding the polarity guard)

down to an absolute minimum voltage of 1.6V. With line currents below 9mA the circuit has limited sending and

receiving levels. The internal reference voltage can be adjusted by means of an external resistor(R_VA). This resistor

when connected between LN and REG will decrease the internal reference voltage and when connected between

REG and SLPE will increase the internal reference voltage. Current(I_P) available from V_CCfor peripheral circuits

depends on the external components used. Fig.9 shows this current for V_CC> 2.2V. If MUTE of TEA1062N is LOW

(TEA1062AN is HIGH) when the receiving amplifier is driven the available current is further reduced. Current

availability can be increased by connecting the supply IC(1081) in parallel with R1, as shown in Fig.16, or, by

increasing the DC line voltage by means of an external resistor(R_VA) connected between REG and SLPE.

MICROPHONE INPUTS(MIC+ AND MIC-) AND GAIN PINS (GAS1 AND GAS2)

The UTC TEA1062N/TEA1062AN has symmetrical inputs. Its input impedance is 64kΩ (2*32kΩ) and its voltage

gain is typically 52 dB (when R7=68kΩ. see Fig.13). Dynamic, magnetic, piezoelectric or electret (with built-in FET

source followers) can be used. Microphone arrangements are illustrated in Fig.10. The gain of the microphone

amplifier can be adjusted between 44dB and 52dB to suit the sensitivity of the transducer in use. The gain is

proportional to the value of R7 which is connected between GAS1 and GAS2. Stability is ensured by the external

capacitors, C6 connected between GAS1 and SLPE and C8 connected between GAS1 and V_EE. The value of C6 is

100pF but this may be increased to obtain a first-order low-pass filter. The value of C8 is 10 times the value of C6.

The cut-off frequency corresponds to the time constant R7*C6.

MUTE INPUT (MUTE/MUTE)

A LOW (UTC TEA1062N is HIGH) level at UTC TEA1062AN MUTE enables DTMF input and inhibited the

microphone inputs and the receiving amplifier inputs; a HIGH (UTC TEA1062N is LOW) level or an open circuit does

the reverse. Switching the mute input will cause negligible clicks at the telephone outputs and on the line. In case the

line current drops below 6mA (parallal opration of more sets) the circuit is always in speech condition independant of

the DC level applied to the MUTE/MUTE input.

DUAL-TONE MULTI-FREQUENCY INPUT (DTMF)

When the DTMF input is enabled dialling tones may be sent onto the line. The voltage gain from DTMF to LN is

typically 25.5dB(when R7=68kΩ) and varies with R7 in the same way as the microphone gain. The signalling tones

can be heard in the earpiece at a low level (confidence tone).

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

ꢀ

FUNCTIONAL DESCRIPTION(Cont.)

RECEIVING AMPLIFIER (IR,QR AND GAR)

The receiving amplifier has one input (IR) and a non-inverting output (QR). Earpiece arrangements are illustrated

in Fig.11. The IR to QR gain is typically 31dB (when R4=100kΩ). It can be adjusted between 20 and 31dB to match

the sensitivity of the transducer in use. The gain is set with the value of R4 which is connected between GAR and

QR. The overall receive gain, between LN and QR, is calculated by subtracting the anti-sidetone network attenuation

(32dB) from the amplifier gain. Two external capacitors, C4 and C7, ensure stability. C4 is normally 100pF and C7

is 10 times the value of C4. The value of C4 may be increased to obtain a first-order low-pass filter. The cut-off

frequency will depend on the time constant R4*C4. The output voltage of the receiving amplifier is specified for

continuous-wave drive. The maximum output voltage will be higher under speech conditions where the peak to RMS

ratio is higher.

AUTOMATIC GAIN CONTROL INPUT (AGC)

Automatic line loss compensation is achieved by connecting a resistor(R6) between AGC and V_EE. The automatic

gain control varies the gain of the microphone amplifier and the receiving amplifier in accordance with the DC line

current. The control range is 5.8dB which corresponds to a line length of 5km for a 0.5mm diameter twisted pair

copper cable with a DC resistance of 176Ω/km and average attenuation of 1.2dB/km. Resistor R6 should be chosen

in accordance with the exchange supply voltage and its feeding bridge resistance(see Fig.12 and Table 1). The ratio

of start and stop currents of the AGC curve is independent of the value of R6. If no automatic line loss compensation

is required the AGC may be left open-circuit. The amplifier, in this condition, will give their maximum specified gain.

SIDE-TONE SUPPRESSION

The anti-sidetone network, R1//Z_LINE, R2, R3, R8, R9 and Z_BAL, (see Fig.4) suppresses the transmitted signal in the

earpiece. Compensation is maximum when the following conditions are fulfilled:

R8×Z_BAL

(a)R9×R2= R1×( R3+

)

R8+Z_BAL

(b)[Z_BAL/(Z_BAL+R8)]=[ZI_LINE/(Z_LINE+R1)]

If fixed values are chosen for R1, R2, R3 and R9 then condition(a) will always be fulfilled when R8//Z_BAL<<R3.

To obtain optimum side-tone suppression condition(b) has to be fulfilled which results in:

Z_BAL=(R8/R1) Z_LINE=k*Z_LINEwhere k is a scale factor;

K=(R8/R1).

The scale factor (k), dependent on the value of R8, is chosen to meet following criteria:

(a) Compatibility with a standard capacitor from the

E6 or E12 range for Z_BAL

(b) Z_BAL//R8 <<R3 fulfilling condition (a) and thus ensuring correct anti-sidetone bridge operation,

In practice Z_LINEvaries considerably with the type and length. The value chosen for Z_BALshould therefore be for an

average line length thus giving optimum setting for short or long lines.

EXAMPLE:

The balance impedance Z_BALat which the optimum suppression is present can be calculated by: Suppose ZI_LINE

210Ω+(1265Ω//140nF) representing a 5km line of 0.5 mm diameter, copper, twisted pair cable matched to

600Ω(176Ω/km;38nF/km). When k=0.64 then R8=390Ω, Z_BAL=130Ω+(820Ω//220nF).

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QW-R108-011.B

TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

Leq

REG

VCC

Vref

4.7

µF

100 µF

Rp=16.2k

Ω

20Ω

Leq=C3*R9*Rp

VEE

Fig.3 Equivalent impedance circuit

The anti-sidetone network for the UTCTEA1062N/TEA1062AN family shown in Fig.4 attenuates the signl received

from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole

audio frequency range. Fig.5 shows a convertional Wheatstone bridge anti-sidetone circuit that can be used as an

alternative. Both bridge types can be used with either resistive or complex set impedances.

Z_LINE

I_R

V_EE

Z_BAL

SLPE

Fig. 4 Equivalent circuit of UTC TEA1062N/TEA1062AN anti-sidetone bridge

Z_LINE

I_R

V_EE

SLPE

Fig. 5 Equivalent circuit of an anti-sidetone network in a wheatstone bridge configuration

line ¹⁵⁰

(mA)

130

110

(1)

(2)

(3)

(4)

Tamb

Ptot

(1) 45°C 1068mW

(2) 55°C 934mW

(3) 65°C 800mW

(4) 75°C 666mW

VLN-VSLPE(V)

Fig.6 UTC TEA1062N/TEA1062AN safe operating area

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

R_LINE

I_LINE

I_SLPE+ 0.5mA

V_CC

Rexch

0.5mA

PERIPHERAL

CIRCUITS

SLPE

REG

STAB

V_EE

Vexch

ISLPE

Fig.8 Supply arrangement

2.4

(mA)

1.6

0.8

(a) Ip=2.1mA

(b) Ip=1.7mA

_LINE=15mA at VLN=4V

R1=620Ω and R9=20Ω

cc(V)

Fig.9 Typical current Ip available from Vcc peripheral circuitry with Vcc≧2.2V.

curve (a) is valid when the receiving amplifier is not driven or when MUTE =LOW (UTC TEA1062N is HIGH) .curve(b)

is valid when MUTE=HIGH(UTC TEA1062N is LOW) and the receiving amplifier is driven;

Vo(rms)=150mV,RL=150Ω.The supply possibilities can be increased simply by setting the voltage drop over the

circuit VLN to a high value by means of resistor RVA connected between REG and SLPE.

MIC+

MIC-

MIC+

VCC

(1)

MIC+

MIC-

(a)

(b)

Fig. 10 Alternative microphone arrangement

(c)

(a) Magnetic or dynamic microphone. The resistor marked(1) may be connected to decrease the terminating

impedance.

(b) Electret microphone.

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

(1)

(2)

VEE

(a)

(b)

(c)

Fig.11 Alternative receiver arrangement

(a) Dynamic earpiece.

(b) Magnetic earpiece. The resistor marked(1) may be connected to prevent distortion(inductive load)

R6=∞

→Gv

(dB)

-2

-4

-6

R9=20Ω

(1) R6= 78.7kΩ

(2) R6= 110kΩ

(3) R6= 140kΩ

(1) (2) (3)

100 120 140

Iline (mA)

Fig. 12 Variation of gain with line curren,t with R6 as a parameter.

Rexch(Ω)

400

600

R6(kΩ)

78.7

110

800

1000

100

140

Vexch(V)

93.1

120

102

Table 1 Values of resistor R6 for optimum line loss compensation for various usual values of exchange

supply voltage (Vexch) and exchange feeding bridge resistance(Rexch);R9=20Ω.

R1 620

Ω

100 µF

IR VCC

MIC+

600

100pF

100kΩ

Ω

MIC-

GAR

GAS1

GAS2

100

10 TO 140 mA

C7 1nF

DTMF

68kΩ

MUTE

C8 1nF

µF

VEE REG AGC STAB SLPE

100pF

14 15

4.7

3.6k

Ω

Fig.13 Test circuit defining voltage gain of MIC+, MIC- and DTMF inputs.

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TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

Voltage gain is defined as: G_V=20*log(|V_O/V_I|). For measuring the gain from MIC+ and MIC- the MUTE input

should be HIGH(UTC TEA1062N is LOW) or open-circuit, for measuring the DTMF input MUTE should be

LOW(UTC TEA1062N is HIGH) .Inputs not under test should be open-circuit.

R1=620

Ω

100 µF

VCC

600Ω

100k

100pF

MIC+

Ω

GAR

10 TO 140 mA

C7 1nF

MIC-

100

GAS1

DTMF

68k

C8 1nF

Ω

GAS2

MUTE

µF

100pF

VEE REG AGC STAB

SLPE

14 15

4.7

3.6k

20Ω

Ω

Fig.14 Test circuit for defining voltage gain of the receiving amplifier.

Voltage gain is defined as: G_V=20*log(|V_O/V_I|).

620Ω

R10

130

132k

100nF

Ω

100

BZX79

C12

BAS11

(x2)

VCC

Telephone

Line

BZW14

(x2)

DTMF

MUTE

100pF

UTC TEAI062N

UTC TEA1062AN

From dial and

control circuits

GAR

3.92k

Ω

1nF

MIC+

MIC-

SLPE GAS1

GAS2

REG

AGC STAB

390

100pF

Ω

VA(R16.R14)

4.7 µF

3.6k

1nF

Ω

Zbal

Ω

Fig.15 Typical application of the UTC TEA1062AN, shown here with a piezoelectric earpiece and DTMF dialling. The

bridge to the left, the Zener diode and R10 limit the current into the circuit and the voltage across the circuit during

line transients. Pulse dialling or register recall required a different protection arrangement.

The DC line voltage can be set to a higher value by resistor R_VA(REG to SLPE).

620Ω

LN V_CC

DTMF

UTC

TEA1062AN

MUTE

V_DD

DTMF

dialling

circuit

CRADLE

CONTACT

V_SSDP/FL

V_EE

TELEPHONE

LINE

BSN254A

Fig.16 Typical applications of the UTC TEA1062N/TEA1062AN (simplified)

The dashed lines show an optional flash (register recall by timed loop break).

UNISONIC TECHNOLOGIES CO., LTD

12 of 13

QW-R108-011.B

www.unisonic.com.tw

TEA1062N/TEA1062AN

LINEAR INTEGRATED CIRCUIT

UTC assumes no responsibility for equipment failures that result from using products at values that

exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or

other parameters) listed in products specifications of any and all UTC products described or contained

herein. UTC products are not designed for use in life support appliances, devices or systems where

malfunction of these products can be reasonably expected to result in personal injury. Reproduction in

whole or in part is prohibited without the prior written consent of the copyright owner. The information

presented in this document does not form part of any quotation or contract, is believed to be accurate

and reliable and may be changed without notice.

UNISONIC TECHNOLOGIES CO., LTD

13 of 13

QW-R108-011.B

www.unisonic.com.tw

TEA1062N-S16-T [UTC]

相关型号：

TEA1062NG-D16-T

TEA1062NG-S16-R

TEA1062NL-D16-T

TEA1062NL-S16-R

TEA1062NL-S16-T

TEA1062N_09

TEA1062T

TEA1062T-T

TEA1062T/C4

TEA1062TD

TEA1062TD-T

TEA1064A