UPS4602_15 [UTC]
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLERS;
| 型号： | UPS4602_15 |
| 厂家： | 
Unisonic Technologies |
| 描述： | HIGH PERFORMANCE CURRENT MODE PWM CONTROLLERS |
| 文件： | 总10页 (文件大小：403K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UPS4602
LINEAR INTEGRATED CIRCUIT
HIGH PERFORMANCE CURRENT
MODE POWER SWITCH WITH
ZERO CURRENT DETECTION
DESCRIPTION
The UTC UPS4602 is an integrated PWM controller and
PowerMOSFET specifically designed for switching operation with
minimal external components. The UTC UPS4602 is designed to
provide several special enhancements to satisfy the needs, for
example, Power-Saving mode for low standby power (<0.3W),
DIP-8
Frequency Hopping
, Constant Output Power Limiting , Slope
Compensation ,Over Current Protection (OCP), Over Voltage Protection
(OVP), Over Load Protection (OLP), Under Voltage Lock Out (UVLO),
Short Circuit Protection (SCP) , Over Temperature Protection (OTP),
etc. IC will be shutdown or can auto-restart in situations.
FEATURE
* Internal PowerMOSFET (650V)
* Programming Gate Driver Capability
* Frequency hopping for Improved EMI Performance.
* Lower than 0.3W Standby Power Design
* Linearly decreasing frequency to 26KHz during light load
* Internal Soft start
* Internal Slope Compensation
* Constant Power Limiting for universal AC input Range
* Gate Output Maximum Voltage Clamp(15V)
* Over temperature protection
* Overload protection
* Over voltage protection
* Leading edge blanking
* Cycle-by-Cycle current limiting
* Under Voltage Lock Out
* Short Circuit Protection
ORDERING INFORMATION
Ordering Number
Lead Free
Package
DIP-8
Packing
Tube
Halogen Free
UPS4602G-D08-T
UPS4602L-D08-T
UPS4602L-D08-T
(1) T: Tube
(1)Packing Type
(2)Package Type
(3)Lead Free
(2) D08: DIP-8
(3) G: Halogen Free, L: Lead Free
www.unisonic.com.tw
Copyright © 2011 Unisonic Technologies Co., Ltd
1 of 10
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UPS4602
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
1
8
VCC-G
VCC
GND
7
GND
2
3
4
6
5
FB
CS
DRAIN
DRAIN
PIN DESCRIPTION
PIN NO.
PIN NAME
VCC-G
VCC
DESCRIPTION
1
2
3
4
5
6
7
8
Supply voltage
Supply voltage
Feedback
FB
CS
Current sense input
Power MOSFET drain
Power MOSFET drain
Ground
DRAIN
DRAIN
GND
GND
Ground
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UPS4602
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
Notes: OLP (Over Load Protection)
OVP (Over Voltage Protection)
OTP (Over Temperature Protection)
OCP (Over Current Protection)
UVLO (Under Voltage Latch-Out)
LEB (Led Edge Blanking)
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UPS4602
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING (Ta=25°C, unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
30
UNIT
V
Supply Voltage
Input Voltage to FB Pin
Input Voltage to CS Pin
Junction Temperature
Operating Temperature
Storage Temperature
VFB
-0.3 ~ 6.5
-0.3 ~ 6.5
+150
V
VCS
V
TJ
°C
°C
°C
TOPR
TSTG
-40 ~ +125
-50 ~ +150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RANGE
PARAMETER
SYMBOL
VCC
RATINGS
8.6 ~ 22
UNIT
V
Supply Voltage
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UPS4602
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Ta＝25°C, VCC=15V, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SUPPLY SECTION
Start Up Current
IST
VCC = VTHD(ON)-1V
VFB= 4V
22
8
45
10
μA
Supply Current with switch
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
Hysteresis
IOP
mA
VTHD(ON)
VCC(MIN)
VCC(HY)
13.5 14.2
15
9
V
V
V
7.5
8.2
6
INTERNAL VOLTAGE REFERENCE
Reference Voltage
VREF
Guarantee by design
VFB=0
6.3
6.5
1.1
6.7
3.5
V
CONTROL SECTION
Feedback Source Current
VFB Operating Level
IFB
mA
V
VFBMAX
Burst-Mode Out FB Voltage
Reduce-Frequency end FB Voltage
Burst-Mode Enter FB Voltage
VFB(OUT) VCS =0
VFB(END) VCS =0
1.1
1.2
0.9
50
V
V
VFB(IN)
VCS =0
V
Normal initial
Switching frequency
VFB = 4V
45
20
55
30
80
kHz
kHz
%
F(SW)
Power-Saving
Before enter burst mode
VFB=4V, VCS=0
Duty Cycle
DMAX
FJ(SW)
FDV
64
72
±4
Frequency Hopping
±2.5
±5.5 kHz
Frequency Variation VS VCC Deviation
Frequency Variation VS Temperature Deviation
Soft-Start Time
VCC=10 to 20V
T=-25 to 105°C
5
5
6
%
%
FDT
TSOFTS
2
4
ms
PROTECTION SECTION
OVP threshold
VOVP
VFB=4V
23
V
V
OLP threshold
VFB(OLP) VCS=0
CFB=47nF(From VFB=3.7V
3.7
Delay Time Of OLP
TD-OLP
35
65
95
ms
to Drain OFF)
OTP Threshold
T(THR)
120
135
155
°C
CURRENT LIMITING SECTION
Leading Edge Blanking Time
tLEB
VCS
270
350
450
nS
V
Peak Current Limitation
VFB=4V
0.88 0.95 1.03
0.75
Threshold Voltage For Valley
VSENSE-L VFB=4V
V
POWER MOS-TRANSISTOR SECTION
Drain-Source Breakdown Voltage
Turn-on voltage between gate and source
Drain-Source Diode Continuous Source Current
Static Drain-Source On-State Resistance
VDSS
VTH
IS
VGS=0V, ID=250μA
VDS=VGS, ID=250μA
650
V
V
A
Ω
2
4
2
5
RDS(ON) VGS=10V,ID=2.25A
V
DD =300V, ID =4.0A
Rise Time
Fall Time
tR
tF
45
35
100
80
ns
ns
RG=25ꢀ (Note 1,2)
Notes: 1. Pulse Test: Pulse width≤300μs, Duty cycle≤2%
2. Essentially independent of operating temperature
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UPS4602
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION
The internal reference voltages and bias circuit work at VCC> VTHD(ON), and shutdown at VCC<VCC(MIN)
.
(1) Soft-Start
When every IC power on, driver output duty cycle will be decided by inter-slope voltage VSOFTS and VCS on
current sense resistor at beginning. After the whole soft-start phase end, and driver duty cycle depend on VFB and
VCS. The relation among VSOFTS, VFB and VOUT as followed FIG.3. Furthermore, soft-start phase should end before
VCC reach VCC(MIN) during VCC power on. Otherwise, if soft-start phase remain not end before VCC reach VCC(MIN)
during VCC power on, IC will enter auto-restart phase and not set up VOUT
.
FIG.3 Soft-start phase
(2) Switching Frequency Set
The maximum switching frequency is set to 50kHz. Switching frequency is modulated by output power POUT
during IC operating. At no load or light load condition, most of the power dissipation in a switching mode power
supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber
circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time.
So lower Switching frequency at lower load, which more and more improve IC’s efficiency at light load. At from no
load to light load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve
between fSW and POUT/POUT(MAX) as followed FIG.4.
FIG.4 The relation curve between fSW and relative output power POUT/ POUT(MAX)
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UPS4602
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
(3) Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM
generation, this greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus
reduces the output ripple voltage.
(4) Frequency Hopping For EMI Improvement
The Frequency Hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator
is to set the normal switching frequency; the switching frequency is modulated with a period signal generated by the
2nd oscillator. The relation between the first oscillator and the 2nd oscillator as followed FIG.5. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
FIG.5 Frequency Hopping
(5) Constant Output Power Limit
When the primary current, across the primary wind of transfer, reaches the limit current, around 1.2A, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate for this output power limit variation across a wide AC input
range, the threshold voltage is adjusted by adding a positive ramp. This ramp signal rises from 0.75V to 0.95V, and
then flattens out at 0.95V. A smaller threshold voltage forces the output GATE drive to terminate earlier. This
reduces the total PWM turn-on time and makes the output power equal to that of low line input. This proprietary
internal compensation ensures a constant output power limit for a wide AC input voltage range (90VAC to 264VAC).
(6) Protection section
The IC takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. At the same time, IC enters auto-restart, VCC power on and driver is
reset after VCC power on again.
OLP
After power on, IC will shutdown driver if over load state occurs for continual TD-OLP. OLP case as followed FIG.6.
The test circuit as followed FIG.8. TD-OLP≈2CFB/1.4.
OVP
OVP will shutdown the switching of the power MOSFET whenever VCC>VOVP. The OVP case as followed FIG.7.
the test circuit as followed FIG.9.
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UPS4602
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
FIG.6 OLP case
FIG.7 OVP case
500ꢀ/1W
VDRAIN
VCC
15V
IC3
8
7
1
2
t
VFB
33n
470u
UPS4602
TD-OLP
5.6V
3
4
6
5
47nF
3V
0
t
t
VCC
VTHD(ON)
0
FIG.8 OLP test circuit
FIG.9 OVP test circuit
OTP
OTP will shut down driver when junction temperature TJ>T(THR) for continual a blanking time.
(7) Driver Output Section
The driver-stage drives the gate of the MOSFET and is optimized to minimize EMI and to provide high circuit
efficiency. This is done by reducing the switch on slope when reaching the MOSFET threshold. This is achieved by a
slope control of the rising edge at the driver’s output. The output driver is clamped by an internal 15V Zener diode in
order to protect power MOSFET transistors against undesirable gate over voltage.
(8) Inside power switch MOS transistor
Specific power MOS transistor parameter is as “POWER MOS TRANSISTOR SECTION” in electrical
characteristics table.
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UPS4602
LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUIT
YC1
T1
C8
R6
F1
L2
L1
BD1
3
1
2
10
12V/1.33A
LINE
D2
R1
R2
R3
D1
C2
9
1
2
1
3
4
XC1
C10
ZNR1
C4
16W
GND
C1
4
R5
3
4
2
NEUT
8
D3
R7
C3
7
IC1
DRAIN
2
RG
6
5
VCC
6
DRAIN
R14
R17
R10
R9
1
VCC-G
IC2
3
4
1
2
FB
C9
R8
GND GND CS
3
4
8
7
IC3
C7
RCS
FIG.10 UTC UPS4602 Typical Application Circuit
Table1. Components reference description for UTC UPS4602 application circuit
DESIGNATOR PART TYPE
DESIGNATOR PART TYPE
DESIGNATOR PART TYPE
C1
C2
C3
C4
C7
C8
C9
C10
33μF
0.001μF
22μF
R1
R2
2.2Mꢀ
2.2Mꢀ
100Kꢀ
2Mꢀ
D1
D2
RS1M
SR39
R3
D3
RS1D
470μF
0.01μF
0.001μF
0.1μF
R5
IC1
IC2
IC3
YC1
T1
UPS4602
PC-817
TL431
R6
30ꢀ
R7
15ꢀ
R8
4.7Kꢀ
3.92Kꢀ
15Kꢀ
1.8Kꢀ
510ꢀ
0ꢀ
102P/400V
EE22
470μF
R9
R10
R14
R17
RG
L1
UU9.8
L2
2μH
F1
1A/250V
7D471K
0.1μF/250V
KBP205
ZNR1
XC1
BD1
RCS
1ꢀ
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UPS4602
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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