UPS602-D08-T [UTC]
HIGH PERFORMANCE CURRENT MODE POWER SWITCH; 高性能电流模式电源开关
| 型号： | UPS602-D08-T |
| 厂家： | 
Unisonic Technologies |
| 描述： | HIGH PERFORMANCE CURRENT MODE POWER SWITCH |
| 文件： | 总12页 (文件大小：258K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UPS602
LINEAR INTEGRATED CIRCUIT
HIGH PERFORMANCE
CURRENT MODE POWER
SWITCH
ꢀ
DESCRIPTION
The UTC UPS602 is designed to provide several special
enhancements to satisfy the needs: Power-Saving mode for low
standby power, Over Current Protection (OCP), Over Voltage
Protection (OVP), Over Load Protection (OLP), UVLO, Over
Temperature Protection (OTP) etc protection features. IC will be
shutdown when either protection arise and can auto-restart.
DIP-8
ꢀ
FEATURES
*Pb-free plating product number: UPS602L
* Low startup current 20uA typ
* Fixed switching frequency(Norm is 70kHz)
* Max duty cycle 70%
* Power-saving mode for low power
* Over temperature protection
* Overload protection
* Over voltage protection
* Leading edge blanking
* Soft start
ꢀ
ORDERING INFORMATION
Order Number
Package
DIP-8
Packing
Tube
Normal
Lead Free Plating
UPS602-D08-T
UPS602L-D08-T
UPS602L-D08-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) T: Tube
(2) D08: DIP-8
(3) L: Lead Free Plating, Blank: Pb/Sn
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Copyright © 2006 Unisonic Technologies Co., Ltd
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
PIN CONFIGURATION
DRAIN
1
2
3
8 DRAIN
7
6
CS
FB
NC
VCC
4
5
GND
SS
ꢀ
PIN DESCRIPTION
PIN
1
SYMBOL
DRAIN
NC
FUNCTION
Power MOSFET drain
2
3
VCC
Supply voltage
Ground
4
GND
SS
5
Soft-start
6
FB
Feedback
7
CS
Controller current sense input
Power MOSFET drain
8
DRAIN
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
BLOCK DIAGRAM
NC
2
VCC
3
1
DRAIN
DRAIN
8
UVLO
Reference voltage
Oscillator
OVP
OLP
OTP
SS
5
Soft Start
Latch
Driver
S
Q
Power-Saving
Unit
R
Q
Current
Limiting
FB
6
7
CS
LEB
PWM
COMP
4
GND
Explain:OLP(Over Load Protection)
OVP(Over Voltage Protection)
OTP(Over Temperature Protection)
UVLO(Under Voltage Latch-Out
LEB(Led Edge Blanking)
SS(Soft Start)
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
ABSOLUTE MAXIMUM RATINGS (Ta＝25°C, VCC=15V, RT=75kΩ, unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
26
UNIT
V
Supply Voltage
Input Voltage to FB Pin
Input Voltage to CS Pin
Input Voltage to RT Pin
Junction Temperature
Operating Temperature
Storage Temperature
VFB
-0.3 ~ 6.2
-0.3 ~ 2.8
-0.3 ~ 6.2
+150
V
VCS
V
VRT
V
TJ
°C
°C
°C
TOPR
TSTG
-40 ~ +125
-50 ~ +150
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ꢀ
OPERATING RANGE
PARAMETER
SYMBOL
VCC
RATINGS
8.6 ~ 22
UNIT
V
Supply Voltage
ꢀ
ELECTRICAL CHARACTERISTICS (Ta＝25°C, VCC=15V, RT=75kΩ, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY SECTION
Start Up Current
ISTR
IOFF
ION
VCC=13.5
22
3.7
4.0
45
5.5
6.0
µA
mA
mA
OFF
ON
VSS = 0, IFB = 0
Supply Current with switch
VSS = 5V, IFB = 0
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
Hysteresis
VTHD(ON)
VCC(MIN)
VCC(HY)
11.8
7.6
12.6
8.1
13.4
8.6
V
V
V
4.5
INTERNAL VOLTAGE REFERENCE
Reference Voltage
VREF measured at pin VFB
6.1
6.3
6.5
V
CONTROL SECTION
Normal
Switch Frequency
VFB = 4V
F(SW)
61
18
65
0
68
20
70
75
23
75
kHz
kHz
%
Power-Saving
VFB = 1V
MAX
DMAX
Duty Cycle
MIN
DMIN VFB < 0.5V
%
MIN
VFB Operating Level
MAX
VMIN
0.5
V
VMAX
4.4
5.0
V
Feedback Resistor
RFB
2.6
3.8
6
kΩ
ms
ms
ms
CSS=0.05uF
Soft-Start Time
TSS
CSS=0.1uF
CSS=1uF
12
120
PROTECTION SECTION
OVP threshold
V(OVP) VSS < 3.5V, VFB > 5V
VFB(OLP) VSS > 5.4V
T(THR)
15.2
4.4
16
4.6
135
3.9
5.1
6.8
16.8
4.9
V
V
OLP threshold
OTP threshold
120
3.7
150
4.2
°C
V
OVP Disable threshold
OLP Enable threshold
Spike Blanking time
VSS(DEACT) VFB > 5V, VCC > 17V
VSS(ACT) VFB > 5V
TSB
4.9
5.4
V
µs
CURRENT LIMITING SECTION
LEB
tLEB
220
ns
POWER MOS-TRANSISTOR SECTION
Drain-Source Breakdown Voltage
Static Drain-Source On-State Resistance
Output Capacitance
VDSS
RDS(ON)
CO
600
V
Ω
5
56
pF
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
21
MAX UNIT
Rise Time
Fall Time
tR
tF
tD(OFF)
ns
ns
ns
24
Turn-Off Delay Time
30
Drain-Source Diode Continuous Source
Current
IS
2
A
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
FUNCTIONAL DESCRIPTION
The internal reference voltages and bias circuit work at VCC>12.6V, and shutdown at VCC< 8.1V.
(1) Soft-Start
When every IC power on, driver output duty cycle will be decided by voltage VSS on soft-start capacitor and VCS on
current sense resistor at beginning. After VSS reach 5.1V, the whole soft-start phase end, and driver duty cycle
depend on VFB and VCS. The relation among VSS, VFB and VOUT as followed FIG.3, here soft-start phase Tsoft-start
should more than VOUT start-up phase Tstart-up, otherwise, IC will enter false OLP protection state. Because after the
soft-start phase end, if VOUT remain in lower voltage, VFB more than 4.6V, then IC enter false OLP state.
Furthermore, soft-start phase should end before VCC reach VCC(MIN) during VCC power on. Otherwise, if soft-start
phase remain not end before VCC reach VCC(MIN) during VCC power on, IC will enter auto-restart phase and not set up
VOUT
.
Finally soft-start also set OVP active phase. OVP active phase between VSS=0 and VSS=3.8V, OVP will not be
sensed after VSS reach 3.8V.The Soft-start phase TSS
：
6 ms
12 ms
120 ms
(CSS=0.05uF)
(CSS=0.1uF)
(CSS=1uF)
TSS
=
VSS
5.1V
TSOFT-START
t
t
VFB
4.6V
VOUT
TSTRAT-UP
t
Driver
t
FIG.3 Soft-start phase
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
FUNCTIONAL DESCRIPTION(Cont.)
(2) Switch Frequency Set
The maximum switch frequency decided by an external resistor RT connected between pin RT and ground. Then
the maximum switch frequency will depend on user requirement. The relation curve between fSW and RT as followed
FIG.5 under the condition of POUT/POUTmax=50%. The equation between fSW and RT as followed (1-2):
fSW = -0.61*RT+115.7--------------------------(1-2)
After RT connected, switch frequency is also modulated by output power POUT during IC operating. So lower switch
frequency at lower load, which more and more improve IC’s efficiency at light load. Switch frequency is decreased
minimum at no load, then the UPS602 will operate at Power-Saving mode for Lower standby power. The relation
curve between fSW and POUT/POUTmax as followed FIG.4 under the condition of RT=75kΩ.
90
80
70
60
50
110V
40
220V
30
20
10
2%
0
1%
3% 4% 5% 6% 7% 8% 9% 10%
POUT/POUTmax
(RT=75KΩ)
FIG.4 The relation curve between fSW and relative output power POUT/POUTmax
100
90
80
70
60
50
40
30
20
10
55
95
60
65
70
75
80
85 90
RT (kΩ)
(POUT/POUTmax=50%)
FIG.5 The relation curve between fSW and RT
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
FUNCTIONAL DESCRIPTION(Cont.)
(3) Protection section
UPS602 takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for
continual 7.2µs (blanking time), the driver is shut down. At the same time, IC enters auto-restart, VCC power on and
driver is reset after VCC power on again.
OLP
After soft-start phase end (VSS>5.1V), IC will shutdown driver if over load state occurs (corresponding to
VFB>4.6V) for continual 7.2µs. OLP function will not inactive during soft-start phase. OLP case as followed FIG. 6.
The test circuit as followed FIG.8 for UPS602.
VCC
VCC
16V
12.6V
8.1V
12.6V
8.1V
Trestart
t
t
t
t
Driver
ON/OFF
t
VOUT
t
VFB
VFB
7.2µs Blanking
7.2µs Blanking
7.2µs Blanking
7.2µs Blanking
4.6V
4.6V
t
t
V
SS
V
SS
SS Phase
5.1V
5.1V
3.9V
SS Phase
OVP Phase
FIG.6 OLP case
FIG.7 OVP case
OVP
Power supply VCC’s OVP function are enabled only when VSS<3.9 & VFB>4.6V during soft-start phase. During
above condition, driver will be shutdown if over voltage state occurs (VCC>16V) for continual 7.2µs. OVP function will
not inactive after soft-start phase. OLP case as followed FIG.7. The test circuit as followed FIG.9 for UPS602.
OTP
OTP will shut down driver when junction temperature TJ of internal circuits is more than threshold 135°C for
continual 7.2µs.
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
FUNCTIONAL DESCRIPTION(Cont.)
VCC
15V
15V VCC
C4
C13
C4
C13
IC3
IC3
Driver
VCS
Driver
VCS
1
2
8
7
1
2
8
7
UPS602
UPS602
3
4
6
3
4
6
5
5
16V
VCC
4.6v
VFB
3v
5.5v
15µs
VFB
20ms
RCS
RCS
FIG.8 OLP test circuit
(4) Driver Output Section
FIG.9 OVP test circuit
Rise edge time of driver output is about 200ns for avoiding Low EMI.
(6) Inside power switch MOS transistor
For UPS602, it’s inside power MOS transistor may load source current 2A. Specific power MOS transistor
parameter is as “POWER MOS TRANSISTOR SECTION” in electrical characteristics table.
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
TYPICAL APPLICATION CIRCUIT
R7
1A/600V
BD1
L1
D3
F1
NF1
TR1
C1
+
D1
C2
5V
2A
AC IN
CX1
C8
R6
C6
+
R1
C7
+
D2
R3
GND
R4
8
7
6
5
1
2
3
4
R2
R8
R11
R9
R12
IC1
IC3
C3
+
C5
C4
IC2
5V = 3.5A
12V =1.5A
CY1
R5
FIG.10 UPS602 Typical Application Circuit
Table1. Components reference description for UPS602 application circuit
CX
C1
C2
C3
C4
C5
C6
C7
C8
C9
0.1uF/250V
33uF/400V
103/1KV
R1
R2
100KΩ
2.2MΩ
10Ω
1/2W
1/8W
1/8W
1/4W
1/8W
1/8W
1/8W
1/8W
1/8W
1/8W
1/8W
D1
D2
FR107
1N4148
C83-004
PC817C
UTC431
222/250V
EF25 or EE25
5uH
R3
D3
22uF/250V
104/50V
R4
0.22Ω
10Ω
IC1
IC2
CY1
TR1
L1
R6
104/50V
R7
1KΩ
102/100V
680uF/16V
680uF/16V
104/50V
R8
150Ω
3.3KΩ
1KΩ
R9
R10
R11
R12
ZD1
NF1
F1
6.2V1W
3.3KΩ
47KΩ
UU10.5
2A/250V
UPS602
1A/600V
IC3
BD1
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
TYPICAL CHARACTERISTICS(Cont.)
Fig 1. Feedback Voltage During Loadjump From
10% Up To 100% Load (VDCIN=120V)
Fig 2. Feedback Voltage During Loadjump From
10% Up To 100% Load (VDCIN=350V)
60.0mV
3.30V
120mV
3.86V
3.29kHz
1.70kHz
1.64kHz
850Hz
Ch1 max
5.90V
Ch1 max
6.00V
Ch1 min
40.0mV
Ch1 min
460mV
Ch1 frequency
1.906kHz
Ch1 frequency
785.5Hz
Ch1 1.00V
A
M 200μs
Ch1 ∫
2.68V
Ch1 1.00V
3.18V
M
400μs A Ch1 ∫
Fig 4. Startup With Full Load Condition At
DCIN=350V, Vc4 and Vout
Fig 3. Startup With Full Load Condition At
VDCIN=120V, Vc4 and Vout
V
12.3V
12.3V
12.3V
12.3V
VC4
VC4
Ch1 max
5.04V
Ch1 max
5.04V
Ch1 min
-120mV
Ch1 min
1.32V
Ch1 frequency
-----Hz
Ch1 frequency
-----Hz
VOUT
VOUT
Ch1 2.00V
Ch2 5.00V
A
M 10.0ms
Ch1 ∫ 3.16V
Ch1 2.00V
Ch2 5.00V
A
Ch1 ∫ 3.16V
M 10.0ms
Fig 5. Startup Behavior At Nominal Load Condition VDCIN =120V
Fig 6. Startup Behavior At Nominal Load Condition VDCIN=350V
120mV
12.3V
240mV
12.0V
357Hz
21.2Hz
1.79kHz
147Hz
VC4
VC4
VFB
VFB
VSS
VSS
Ch1 2.00V
Ch3 2.00V
Ch2 2.00V
M 4.00ms A Ch3 ∫ 4.96V
Ch1 2.00V
Ch3 2.00V
Ch2 2.00V
M 4.00ms A Ch3 ∫ 4.96V
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UPS602
LINEAR INTEGRATED CIRCUIT
ꢀ
TYPICAL CHARACTERISTICS(Cont.)
Fig 8. NO Load Input Power vs.
Line Voltage(Normal Mode)
Fig 7. Frequency vs. Output Power
120
100
80
60
40
20
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
VDCIN=120V
0.3
0.2
0.1
0
Input Power NO Load (PoUT=0W)
0
2
4
6
8 10 12 14 16 18 20
100 150
200
250 300
350 400
Output Power(W)
DC Input Voltage(V)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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