US3702 [UTC]
HIGH PERFORMANCE CURRENT MODE POWER SWITCH;
| 型号： | US3702 |
| 厂家： | 
Unisonic Technologies |
| 描述： | HIGH PERFORMANCE CURRENT MODE POWER SWITCH |
| 文件： | 总9页 (文件大小：313K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
HIGH PERFORMANCE
CURRENT MODE POWER
SWITCH WITH ZERO
CURRENT DETECTION
DESCRIPTION
DIP-8
The UTC US3702 is an integrated PWM controller and
SenseFET specifically designed for switching operation with
minimal external components. The UTC US3702 is designed to
provide several special enhancements to satisfy the needs, for
example, Power-Saving mode for low standby power (<0.3W),
Frequency Hopping , Constant Output Power Limiting , Slope
Compensation ,Over Current Protection (OCP), Over Voltage
Protection (OVP), Over Load Protection (OLP), Under Voltage
Lock Out (UVLO), Short Circuit Protection (SCP) , Over
Temperature Protection (OTP) etc. IC will be shutdown or can
auto-restart in situations.
FEATURE
* Internal high voltage SenseFET(700V)
* Frequency hopping for Improved EMI performance.
* Lower than 0.3W standby power design
* Linearly decreasing frequency to 26KHz during light load
* Internal soft start
* Internal slope compensation
* Constant power limiting for universal AC input range
* Gate output maximum voltage clamp(15V)
* Over temperature protection
* Overload protection
* Over voltage protection
* Leading edge blanking
* Cycle-by-cycle current limiting
* Under voltage lock out
* Short circuit protection
ORDERING INFORMATION
Ordering Number
Lead Free
Package
DIP-8
Packing
Tube
Halogen Free
US3702L-D08-T
US3702G-D08-T
US3702L-D08-T
(1) T: Tube
(1)Packing Type
(2)Package Type
(3)Green Package
(2) D08: DIP-8
(3) L: Lead Free, G: Halogen Free and Lead Free
www.unisonic.com.tw
1 of 9
Copyright © 2015 Unisonic Technologies Co., Ltd
QW-R119-022.c
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
MARKING
PIN CONFIGURATION
1
DRAIN
DRAIN
8
7
SGND
PGND
2
3
4
6
5
VCC
FB
DRAIN
NC
PIN DESCRIPTION
PIN NO.
PIN NAME
SGND
PGND
VCC
DESCRIPTION
1
2
3
4
5
6
7
8
Ground
MOSFET Ground
Supply voltage
Feedback
FB
NC
DRAIN
DRAIN
DRAIN
Power MOSFET drain
Power MOSFET drain
Power MOSFET drain
UNISONIC TECHNOLOGIES CO., LTD
2 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
Notes: OLP (Over Load Protection)
OVP (Over Voltage Protection)
OTP (Over Temperature Protection)
OCP (Over Current Protection)
UVLO (Under Voltage Latch-Out)
LEB (Led Edge Blanking)
ABSOLUTE MAXIMUM RATING (TA=25°C, unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
30
UNIT
V
Supply Voltage
Input Voltage to FB Pin
Junction Temperature
Operating Temperature
Storage Temperature
VFB
-0.3~6.5
+150
V
TJ
°C
°C
°C
TOPR
TSTG
-40~+125
-50~+150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RANGE
PARAMETER
SYMBOL
VCC
RATINGS
7~23
UNIT
V
Supply Voltage
ELECTRICAL CHARACTERISTICS (TA＝25°C, VCC=15V, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY SECTION
Start Up Current
IST
VCC = VTHD(ON)-1V
VFB=4V GATE Without
CLOAD
5
2
15
3
μA
Supply Current with switch
IOP
mA
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
VTHD(ON)
VCC(MIN)
12
7
13.5
8
14
9
V
V
Min. Operating Voltage
CONTROL SECTION
UNISONIC TECHNOLOGIES CO., LTD
3 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
Feedback Source Current
IFB
VFB=0
2
mA
V
VFB Open Level
VFBMAX
5.0
1.2
2.4
1.0
75
Burst-Mode Out FB Voltage
Reduce-Frequency end FB Voltage
Burst-Mode Enter FB Voltage
VFB(OUT) VCS =0
VFB(END) VCS =0
V
V
VFB(IN)
VCS =0
V
Normal initial
Power-Saving
VFB=4V
69
20
70
±3
81
kHz
kHz
%
Switching
frequency
F(SW)
Before enter burst mode
VFB=4V，vCS=0
Duty Cycle
DMAX
△FJ(SW)
FDV
75
80
±6
5
Frequency Hopping
±4.5
%
Frequency Variation VS VCC Deviation
Frequency Variation VS Temperature
Deviation
VCC=10~20V
T=-25~105°C
%
FDT
5
6
%
Soft-Start Time
TSoftS
2
4
ms
PROTECTION SECTION
OVP threshold
VOVP
VFB=4V
23
4.7
65
V
V
OLP threshold
VFB(OLP) VCS=0
TD-OLP
Delay Time Of OLP
OTP threshold
35
95
ms
°C
T(THR)
130
145
CURRENT LIMITING SECTION
Peak Current Limitation
Threshold Voltage For Valley
ILIM
VFB=4.4V
VFB=4.4V
1.06
1.2
1.34
A
A
ILIM-L
1.14
UNISONIC TECHNOLOGIES CO., LTD
4 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
V
POWER MOS-transistor SECTION
Drain-Source Breakdown Voltage
Turn-on voltage between gate and source
Drain-Source Diode Continuous Source
Current
VDSS
VTH
VGS=0V, ID=250mA
VDS=VGS, ID=250mA
700
2
4
V
IS
2
A
Static Drain-Source On-State Resistance
RDS(ON) VGS=10V, ID=2.25A
5
Ω
V
DD=300V, ID=4.0A
Rise Time
Fall Time
TR
TF
45
35
100
80
NS
NS
RG=25ꢀ (Note 1,2)
Notes: 1. Pulse Test: Pulse width≤300μs, Duty cycle≤2%
2. Essentially independent of operating temperature
UNISONIC TECHNOLOGIES CO., LTD
5 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION
The internal reference voltages and bias circuit work at VCC> VTHD (ON), and shutdown at VCC<VCC (MIN)
.
(1) Soft-Start
When every IC power on, driver output duty cycle will be decided by inter-slope voltage VSOFTS and VCS on
current sense resistor at beginning. After the whole soft-start phase end, and driver duty cycle depend on VFB and
VCS. The relation among VSOFTS, VFB and VOUT as followed Fig.3. Furthermore, soft-start phase should end before VCC
reach VCC (MIN) during VCC power on. Otherwise, if soft-start phase remain not end before VCC reach VCC (MIN) during
VCC power on, IC will enter auto-restart phase and not set up VOUT.
Fig.3 Soft-start phase
(2) Switching Frequency Set
The maximum switching frequency is set to75kHz. Switching frequency is modulated by output power POUT
during IC operating. At no load or light load condition, most of the power dissipation in a switching mode power
supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber
circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time.
So lower Switching frequency at lower load, which more and more improve IC’s efficiency at light load. At from no
load to light load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve
between fSW and POUT/POUT (MAX) as followed Fig.4.
Fig. 4 The relation curve between fSW and relative output power POUT/ POUT (MAX)
UNISONIC TECHNOLOGIES CO., LTD
6 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
(3) Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM generation,
this greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus reduces the
output ripple voltage.
(4) Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.5. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
Fig. 5 Frequency Hopping
(5) Constant Output Power Limit
When the primary current, across the primary wind of transfer, reaches the limit current, around 1.2A, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate for this output power limit variation across a wide AC input
range, the limit current in primary winding is adjusted by adding a positive ramp. This ramp signal rises from 1.14A to
1.2A, and then flattens out at 1.2A. A smaller limit current forces the output GATE drive to terminate earlier. This
reduces the total PWM turn-on time and makes the output power equal to that of low line input. This proprietary
internal compensation ensures a constant output power limit for a wide AC input voltage range (90VAC~264VAC).
(6) Protection section
The IC takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. At the same time, IC enters auto-restart, VCC power on and driver is
reset after VCC power on again.
OLP
After power on, IC will shutdown driver if over load state occurs for continual TD-OLP. OLP case as followed Fig. 6.
The test circuit as followed Fig.8
OVP
OVP will shutdown the switching of the power MOSFET whenever VCC>VOVP. The OVP case as followed Fig.7.
the test circuit as followed Fig.9.
UNISONIC TECHNOLOGIES CO., LTD
7 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
FUNCTIONAL DESCRIPTION(Cont.)
Fig.6 OLP case
Fig.7 OVP case
VCC
15V
VDD
33n
15V
470u
470u
500Ω
33n
IC3
8
7
1
2
Drain
US3702
3
4
6
5
VOVP
VCC
2.5V
Fig.8 OLP test circuit
Fig.9 OVP test circuit
OTP
OTP will shut down driver when junction temperature TJ>T (THR) for continual a blanking time.
(7) Driver Output Section
The driver-stage drives the gate of the MOSFET and is optimized to minimize EMI and to provide high circuit
efficiency. This is done by reducing the switch on slope when reaching the MOSFET threshold. This is achieved by a
slope control of the rising edge at the driver’s output. The output driver is clamped by an internal 15V Zener diode in
order to protect power MOSFET transistors against undesirable gate over voltage.
(8) Inside power switch MOS transistor
Specific power MOS transistor parameter is as “POWER MOS TRANSISTOR SECTION” in electrical
characteristics table.
UNISONIC TECHNOLOGIES CO., LTD
8 of 9
QW-R119-022.c
www.unisonic.com.tw
US3702
Preliminary
LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUIT
YC1
C8
R5
T1
F1
L2
L1
BD1
3
1
2
10
5V/2.4A
LINE
D2
R1
R2
R3
D1
C2
9
1
2
1
3
4
XC1
C10
ZNR1
C4
C5
C1
4
R4
3
4
2
t°
GND
NEUT
TR1
8
D3
7
C3
IC1
DRAIN
DRAIN
DRAIN
3
8
7
6
6
VCC
R6
R9
R8
IC2
PGND
FB
4
4
1
2
2
C9
R7
SGND
1
R12
IC3
3
C7
C11
Fig.10 UTC US3702 Typical Application Circuit
Table1. Components reference description for UTC US3702 application circuit
DESIGNATOR
PART TYPE
33μF
DESIGNATOR
PART TYPE
2.2Mꢀ
2.2Mꢀ
100Kꢀ
1Mꢀ
DESIGNATOR
PART TYPE
FR107
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
R1
R2
D1
D2
202pF
SB540
22μF
R3
D3
RS1D
470μF
R4
IC1
IC2
IC3
YC1
T1
US3702
PC-817
TL431
470μF
R5
15ꢀ
0.1μF
R6
820ꢀ
102pF
R7
1Kꢀ
222
0.001μF
0.1μF
R8
22Kꢀ
EE25
R9
22Kꢀ
L1
UU10.5
2μH
220μF
R10
R11
R12
15~25Mꢀ
68Kꢀ
L2
1μF (Optional)
F1
2A/250V
7D471K
SCK102R55A
334/275V
KBP205
2Kꢀ
ZNR1
TR1
XC1
BD1
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UNISONIC TECHNOLOGIES CO., LTD
9 of 9
QW-R119-022.c
www.unisonic.com.tw
相关型号：
©2020 ICPDF网 联系我们和版权申明