VCJ5_09 [VECTRON]
3.3V or 2.5V Operation; 3.3V或2.5V操作
| 型号： | VCJ5_09 |
| 厂家： | 
Vectron International, Inc |
| 描述： | 3.3V or 2.5V Operation |
| 文件： | 总7页 (文件大小：219K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VCJ5
LVPECL, LVDS Crystal Oscillator Data Sheet
VCJ5
Description
Vectron’s VCJ5 Crystal Oscillator is a quartz stabilized, differential output oscillator, operating off either 2.5 or 3.3 volt supply, in a
hermetically sealed 9x15 ceramic package.
Features
Applications
• 3.3V or 2.5V Operation
• Storage Area Networking
• Telecom
• Output Frequencies to 260MHz
• <0.7 ps RMS jitter, 12k-20MHz
• Differential Output
• Enable/Disable
• -10/70°C or -40/85°C Operation
• Hermetically Sealed 9x14 Ceramic Package
• Ethernet, GE, SynchE
• Fiber Channel
• PON
• Driving A/D’s, D/A’s, FPGA’s
• Test and Measurement
• Medical
• Product is compliant to RoHS directive
and fully compatible with lead free assembly
• COTS
Block Diagram
Complementary
Output
Output
VDD
Crystal
Oscillator
E/D or NC
E/D or NC
Gnd
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page1
Performance Specifications
Table 1. Electrical Performance, LVPECL Option
Parameter
Symbol
Min
Typical
Maximum
Units
Supply
Voltage1
VDD
IDD
3.135
2.375
3.3
2.5
3.465
2.625
V
Current (No Load)
50
98
mA
Frequency
Nominal Frequency2
Stability2,3 (Ordering Options)
fN
10
260
MHz
ppm
25, 50, 100
Outputs
Output Logic Levels4, -10/70°C
Output Logic High
Output Logic Low
Output Logic Levels4, -40/85°C
Output Logic High
Output Logic Low
V
V
VOH
VOL
VDD-1.025
VDD-0.880
VDD-1.620
V
DD-1.810
VOH
VOL
VDD-1.085
VDD-1.830
VDD-0.880
VDD-1.555
Output Rise and Fall Time4
Rise Time
Fall Time
tR/tF
1
1
ns
ns
Load
50 ohms into VDD-1.3V
Duty Cycle5
45
50
55
%
Jitter (12 kHz - 20 MHz BW)155.52MHz6
Period Jitter7
RMS
фJ
фJ
0.3
0.7
ps
2.7
23
ps
ps
P/P
Enable/Disable
Output Enabled8
Output Disabled
VIH
VIL
0.7*VDD
V
V
0.3*VDD
200
Enable/Disable Time
tD
ns
Enable/Disable Leakage Current
200
uA
Enable Pull-Up Resistor
Output Enabled
Output Disabled
33
1
kOhm
MOhm
Start-Up Time
tSU
10
ms
°C
Operating Temp. (Ordering Option)
Package Size
TOP
-10/70 or -40/85
9x14x4.5
mm
1. The VCJ5 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor.
2. See Standard Frequencies and Ordering Information for more information.
3. Includes calibration tolerance, operating temperature, supply voltage variations,, aging and IR reflow.
4. Figure 2 defines these parameters and Figure 1 defines the test circuit.
5. Duty Cycle is defines as the On/Time Period.
6. Measured using an Agilent E5052, 155.520MHz.
7. Measured using a LeCroy 8600, 25K samples.
8. Outputs will be Enabled if Enable/Disable is left open.
tR
tF
VOH
50%
VOL
On Time
Period
Figure 1
Figure 2
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page2
Performance Specifications
Table 2. Electrical Performance, LVDS Option
Parameter
Symbol
Min
Typical
Maximum
Units
Supply
Voltage1
VDD
IDD
3.135
2.375
3.3
2.5
3.465
2.625
V
Current (No Load)
60
mA
Frequency
Nominal Frequency2
Stability2,3, (Ordering Options)
fN
10
260
MHz
ppm
25, 50, 100
Outputs
Output Logic Levels4
Output Logic High
Output Logic Low
V
VOH
VOL
1.43
1.10
1.6
0.9
Differential Output
Differential Output Error
Offset Voltage
247
330
454
50
mV
mV
V
1.125
1.25
1.375
50
Offset Voltage Error
Output Leakage Current
mV
uA
10
Output Rise and Fall Time4
Rise Time
Fall Time
tR/tF
1
1
ns
ns
Load
100 ohms differential
Duty Cycle5
45
50
55
%
Jitter (12 kHz - 20 MHz BW)155.52MHz6
Period Jitter7
RMS
фJ
фJ
0.3
0.7
ps
2.7
23
ps
ps
P/P
Enable/Disable
Output Enabled8
Output Disabled
VIH
VIL
0.7*VDD
V
V
0.3*VDD
200
Enable/Disable Time
tD
ns
Enable/Disable Leakage Current
200
uA
Enable Pull-Up Resistor
Output Enabled
Output Disabled
33
1
kOhm
MOhm
Start-Up Time
tSU
10
ms
°C
Operating Temp. (Ordering Option)
Package Size
TOP
-10/70 or -40/85
9x14x4.5
mm
1. The VCJ5 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor.
2. See Standard Frequencies and Ordering Information for more information.
3. Includes calibration tolerance, operating temperature, supply voltage variations,, aging and IR reflow.
4. Figure 2 defines these parameters and Figure 3 defines the test circuit.
5. Duty Cycle is defines as the On/Time Period.
6. Measured using an Agilent E5052, 155.520MHz.
7. Measured using a LeCroy 8600, 25K samples.
8. Outputs will be Enabled if Enable/Disable is left open.
Figure 3
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page3
Package and Pinout
Table 3. Pinout
Pin #
Symbol
Function
1
2
3
4
5
6
E/D or NC
E/D or NC
GND
Enable Disable or No Connection
Enable Disable or No Connection
Electrical and Lid Ground
Output Frequency
The Enable/Disable function is set at the factory on either pin 1
or pin 2 and is an ordering option
fO
CfO
Complementary Output Frequency
Supply Voltage
VDD
5
4
6
Part Number
Frequency
Date Code
1
2
3
Figure 4 Package
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page4
LVPECL Application Diagrams
Figure 5 Standard PECL Output Configuration Figure 6 Single Resistor Termination Scheme
Figure 7 Pull-Up Pull Down Termination
Resistor values are typically 120 to 240 ohms
for 3.3V operation.
Resistor values are typically 82 to 120 ohms
for 2.5V operation.
Resistor values are typically for 3.3V operation
For 2.5V operation, the resistor to ground is 62
ohms and the resistor to supply is 240 ohms
The VCJ5 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 5. There are numerous application notes on
terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 6, and a pull-up/pull-down scheme as
shown in Figure 7. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage.
LVDS Application Diagrams
Figure 9 LVDS to LVDS Connection, Internal 100ohm
Some LVDS structures have an internal 100 ohm resistor
on the input and do not need additional components.
Figure 10 LVDS to LVDS Connection
External 100ohm and AC blocking caps
Some input structures may not have an internal 100 ohm
resistor on the input and will need an external 100ohm
resistor for impedance matching. Also, the input may have
an internal DC bias which may not be compatible with
LVDS levels, AC blocking capacitors can be used.
Figure 8 Standard LVDS
Output Configuration
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-termi-
nated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to jitter related problems.
Environmental and IR Compliance
Table 4. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Condition
MIL-STD-883 Method 2002
MIL-STD-883 Method 2007
MIL-STD-883 Method 2003
MIL-STD-883 Method 2003
MIL-STD-883 Method 1014
MIL-STD-883 Method 2015
MSL1
Fine and Groossss LLeeaakk
Resistance to Solvents
Moisture Sensitivity Level
Contact Pads
Gold over Nickel
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page5
IR Compliance
Suggested IR Profile
tL
tP
Devices are built using lead free epoxy and can be subjected to
standard lead free IR reflow conditions shown in Table 5. Contact
pads are gold over nickel and lower maximum temperatures can also
be used, such as 220C.
260
RUP
217
200
RDN
Table 5. Reflow Profile
Parameter
PreHeat Time
Symbol
ts
Value
150
25
200 sec Max
3°C/sec Max
150 sec Max
480 sec Max
10 sec Max
60 sec Max
6°C/sec Max
tS
tAMB-P
Ramp Up
RUP
Time above 217°C
Time to Peak Temperature
Time att 226600°°CC
tL
tAMB-P
tP
ility
Time at 240°C
tP2
Ramp dowwnn
RDN
Time (sec)
Maximum Ratings, Tape & Reel
Absolute Maximum Ratings and Handling Precautions
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other
excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended
periods may adversely affect device reliability.
Although ESD protection circuitry has been designed into the VCJ5, proper precautions should be taken when handling and mounting, VI
employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation.
ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry standard has been adopted for
the CDM a standard resistance of 1.5kOhms and capacitance of 100pF is widely used and therefor can be used for comparison purposes.
Table 6. Maximum Ratings
Parameter
Symbol
TSTORE
VDD
Rating
-55/125
Unit
°C
Storage Temperature
Supply Voltage
-0.5 to 5.0
-0.5 to VDD+0.5
1000
V
Enable Disable Voltage
ESD, Human Body Model
ESD, Charged Device Model
VE/D
V
V
1000
Table 7. Tape and Reel Information
Tape Dimensions (mm)
Reel Dimensions (mm)
W
F
Do
1.5
Po
4
P1
12
A
B
C
D
N
W1
25
W2
30
#/Reel
200
24
11.5
330
1.78
13
21
100
Vectron Interaioal 267 Lowell RoadHudsonN03051 • Tel1-88VECTRON1 • tp//www.ecroncom
Page6
Table 8. Standard Frequencies (MHz)
19.4400
43.7500
71.5000
84.0000
114.2850
136.0000
156.2500
166.0000
173.4380
195.3125
25.0000
27.1200
33.0000
56.0000
33.3330
61.4400
35.0000
62.2080
35.5000
62.5000
38.8800
66.0000
40.0000
68.0000
40.6800
70.0000
50.0000
53.1250
74.1758
74.2500
75.0000
75.4000
77.7600
78.1250
80.0000
81.2500
83.3330
86.0000
90.0000
95.0000
100.0000
125.0093
148.7500
159.3750
167.3317
177.3437
225.0000
105.0000
128.0000
150.0000
160.0000
167.4100
180.0000
250.0000
106.2500
130.0000
153.6000
161.1328
168.2009
187.0177
260.0000
110.0000
130.5882
153.8500
162.3250
168.6997
187.5000
112.0000
133.0000
155.5200
164.3555
172.6423
190.0000
112.5000
135.0000
156.1734
165.0000
173.3708
192.4560
120.0000
140.0000
156.2539
166.5600
175.0000
200.0000
124.4160
142.5408
156.2740
166.6286
176.0950
212.4840
125.0000
143.0000
156.2930
166.6667
176.8382
212.5000
Ordering Information
Ordering Information
VCJ5 - X X X - 000M000000
Frequency in MHz
Product
XO, 9x14x4.5 Package
Stability/Temp Range
Output and Voltage
Q: +3.3 Vdc 5%, LVPECL
R: +3.3 Vdc 5%, LVPECL
L: +3.3 Vdc 5%, LVDS
V: +2.5 Vdc 5%, LVDS
A: 100 ppm over -10/70°C
B: 50 ppm over -10/70°C
C: 100 ppm over -40/85°C
D: 50 ppm over -40/85°C
E: 25ppm over -10/70°C
F: 25ppm over -40/85°C
Enable/Disable
A: E/D is on Pin 2, Active High or Open
C: E/D is on Pin 1, Active High or Open
*Note: not all combination of options are available.
Other specifications may be available upon request.
Example: VCJ5-QAA-155M520000
For Additional Information, Please Contact
USA:
Europe:
Asia:
Vectron International
267 Lowell Road
Hudson, NH 03051
Tel: 1.888.328.7661
Vectron International
Vectron International
Landstrasse, D-74924
Neckarbischofsheim, Germany
Tel: +49 (0) 3328.4784.17
1F-2F, No 8 Workshop, No 308 Fenju Road
WaiGaoQiao Free Trade Zone
Pudong, Shanghai, China 200131
Tel: 86.21.5048.0777
Fax: 1.888.329.8328
Fax: +49 (0) 3328.4784.30
Fax: 86.21.5048.1881
Disclaimer
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application.
No rights under any patent accompany the sale of any such product(s) or information.
Rev: 01/10/2009
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