VS-509-ECE-KAAN-P2-R3 [VECTRON]
Dual Frequency VCSO; 双频VCSO
| 型号： | VS-509-ECE-KAAN-P2-R3 |
| 厂家： | 
Vectron International, Inc |
| 描述： | Dual Frequency VCSO |
| 文件： | 总9页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet
VS-509
Dual Frequency VCSO
Features
•
•
Industry Standard Package, 9.1 x 13.8 x 3.1 mm
5th Generation ASIC Technology for Ultra Low Jitter
125 fs-rms (fN = 622.08 MHz, 12 kHz to 20 MHz)
120 fs-rms (fN = 622.08 MHz, 50 kHz to 80 MHz)
•
•
•
•
•
•
Output Frequencies from 150 MHz to 1000 MHz
Spurious Suppression, 90 dBc Typical
3.3V Supply Voltage
LVPECL or LVDS Output Configurations
Tri-State Frequency Select (F1, OD, F2)
Compliant to EC RoHS6 Directive Pb
Applications
PLL circuits for Clock Smoothing and Frequency Translation
Description
Standard
GR-253-CORE
•
•
•
•
•
•
•
SONET / SDH
ITU-T G.709/Y.1331
IEEE 802.3ae
OTN (Optical Transport Network)
10 GbE (Gigabit Ethernet)
10 GFC (Gigabit Fibre Channel)
40 GbE & 100 GbE
INCITS 364-2003
IEEE 802.3ba
ITU-T G.8261
Synchronous Ethernet
WiMax
IEEE 802.16
Vcc
COutput
Output
Description
The VS-509 is a Voltage Controlled SAW Oscillator that
operates at the fundamental frequency from one of the two
internal SAW filters. The SAW filters are high-Q Quartz devices
that enable the circuit to achieve low phase jitter performance
over a wide operating temperature range. A divider circuit is
deployed for output frequencies less than 600 MHz. The
selectable dual oscillator is housed in a hermetically sealed
leadless surface mount package and offered on tape and reel.
It has a tri-state Frequency Select function that provides one of
three conditions: Frequency 1, Output Disable, or Frequency 2.
SAW 1
SAW 2
LVPECL
LVDS
1
X
X=1,2,4
Gnd
Vc
FS
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 1 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Electrical Performance: 3.3V LV-PECL
Parameter
Symbol Minimum
Typical
Maximum Units Notes
Frequency
Nominal Frequency
Absolute Pull Range
Linearity
150
1000
MHz
ppm
%
1,2,3
1,2,3,9
2,4,9
2,9
fN
APR
Lin
±50
±7
Gain Transfer (Low / Standard)
Temperature Stability
+300 / +365
ppm/V
ppm
KV
1,7
fSTAB
±100
Supply
Voltage (± 10%)
2.97
3.3
73
60
3.63
75
V
2,3
3
VCC
ICC
Current (Typical 50Ω Load)
Current (No Load)
mA
mA
3
ICC
Outputs
Mid Level
mV
mV-pp
V-pp
mA
2,3
2,3
2,3
7
VCC-1.5
VCC-1.3
750
1.5
VCC-1.1
Single Ended Swing
Differential Swing
Current
20
250
250
55
IOUT
tR
Rise Time
180
180
50
ps-pp
ps-pp
%
6,7
6,7
2,3
7
7,8
7,8
7,8
Fall Time
tF
SYM
Symmetry
45
85
Spurious Suppression
Jitter (600 ≤ fN ≤ 1000)
Jitter (300 ≤ fN ≤ 500)
Jitter (150 ≤ fN ≤ 250)
90
dBc
150
190
280
fs-rms
fs-rms
fs-rms
φJ
φJ
φJ
Control Voltage
Input Impedance (F1 or F2 Enabled)
Input Impedance (Output Disabled)
Modulation Bandwidth
167
472
200
7
7
ZC
ZC
kΩ
kΩ
kHz
BW
TOP
7
-40
+85
°C
1,3
Operating Temperature
Package Size
9.1 x 13.8 x 3.1
mm
1. See Standard Frequencies and Ordering Information (Pg 8).
2. Parameters are tested with production test circuit (Pg 3).
3. Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
4. Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.
5. The Vc Model is described below (Fig 1).
6. Parameters are described with waveform diagram below (Fig 2).
7. Not tested in production, guaranteed by design, verified at qualification.
8. For Frequencies > 600 MHz, Jitter is integrated across 50 kHz to 80 MHz.
For Frequencies < 600 MHz, Jitter is integrated across 12 kHz to 20 MHz. (Both per GR-253-CORE Issue3).
9. Tested with Vc = 0.3V to 3.0V.
SYM = 100 x tA / tB Vcc=+2V
Vcc-1.1V
tF
tR
167kΩ
Vc
80%
20%
+
-
Vcc-1.3V
3pF
1.65V
Vcc-1.5V
tA
tB
Figure 1. Vc Model – F1 or F2 Enabled
Figure 2. 10K LV-PECL Waveform
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 2 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Absolute Maximum Ratings
Parameter
Symbol
VCC
Ratings
0 to 6
Unit
V
Power Supply
Input Current
IIN
100
mA
mA
V
Output Current
IOUT
25
Voltage Control Range
Frequency Select
VC
0 to VCC
0 to VCC
-55 to 125
260 / 40
FS
V
Storage Temperature
Soldering Temperature / Duration
TSTR
TPEAK / t P
°C
°C / sec
Stresses in excess of the absolute maximum ratings can permanently damage the device. Also, exposure to
these absolute maximum ratings for extended periods may adversely affect device reliability. Functional
operation is not implied at these or any other conditions in excess of those represented in the operational
sections of this datasheet. Permanent damage is also possible if any device input (Vc or FS) draws >100 mA.
Test Circuits & Output Load Configurations
Vc (-3.00V to -0.30V)
+2.0V
+3.3V
0.10 μF
0.01 μF
0.10 μF
0.01 μF
H (-0.55V to 0.00V)
M (-1.90V to -1.40V)
L (-3.30V to -2.75V)
FS
+
-
Vc
FS
Vcc
Vc
Vcc
1
2
6
5
1
2
6
5
+
-
0.01 μF
0.01 μF
0.01 μF
COutput
Output
FS
Vee
COutput
Output
Or
0.01 μF
240Ω
Gnd
3
4
3
4
10KΩ
10KΩ
-1.3V
240Ω
V
DMV
Functional Test: Allows use of standard power supply biasing
configuration. Pull down resistors are used for LV-PECL outputs
and are removed for with LVDS outputs. Since the LVDS outputs
are AC coupled, the output DC levels cannot be measured.
Production Test: DC levels shown for Vee, OSelect,
& Vc are for devices configured for 3.3V operation.
LV-PECL outputs are DC coupled to 50Ω test
Vee
equipment. LVDS outputs are connected to a digital volt meter, then AC
coupled to the test equipment. The digitial volt meter allows for Mid Level &
Swing measurements.
+3.3V
+3.3V
0.10 μF
0.10 μF
0.01 μF
0.01 μF
Vc
FS
Vcc
Vc
FS
Vcc
1
2
6
5
1
2
6
5
COutput
Output
Z = 50Ω
Z = 50Ω
COutput Z = 50Ω
100Ω
100Ω
Gnd
Gnd
Output
Z = 50Ω
3
4
3
4
240Ω
240Ω
LV-PECL to LV-PECL: For short transmission lengths, the pull
down resistor values shown provide reasonable power
consumption and waveform performance.
LVDS to LVDS: The 100Ω resistor should be removed if this load is
provided internally within the LVDS receiver.
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 3 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Typical Characteristics: Vc Pull, Vc Pull Linearity, & Vc Pull Slope
800
Vc Pull
700
600
500
400
300
F1
200
100
F2
Upr Guardband
Lwr Guardband
0
-100
-200
-300
-400
-500
-600
-700
-800
F1
F2
Gain Transfer 364.4 367.4 ppm/V (0.3V to 3.0V)
Total Pull
Freq @1.65V
1004
100
985
100 ppm
ppm (0.3V to 3.0V)
0.00
0.30
0.60
0.90
1.20
1.50
1.80
2.10
2.40
2.70
3.00
3.30
Control Voltage (V)
10%
8%
F1
F2
Vc Pull Linearity
Upr Limit
Lwr Limit
6%
4%
2%
0%
-2%
-4%
-6%
-8%
-10%
F1
F2
Max 2.43% 1.22% (0.3V to 3.0V)
Min
-2.90% -3.12%
(0.3V to 3.0V)
0.00
0.30
0.60
0.90
1.20
1.50
1.80
2.10
2.40
2.70
3.00
3.30
Control Voltage (V)
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
Vc Pull Slope
F1
F2
F1
F2
ppm/V (0.3V to 3.0V)
Max 465.2 478.1
Min 264.4 270.7
ppm/V
(0.3V to 3.0V)
(0.3V to 3.0V)
Ratio
1.76
1.77
0
0.00
0.30
0.60
0.90
1.20
1.50
1.80
2.10
2.40
2.70
3.00
3.30
Control Voltage (V)
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 4 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Typical Characteristics: Phase Noise & Jitter
0
F1
-10
F2
12K - 20M
50K - 80M
-20
-30
Phase Noise
-40
Offset
F1
F2
-50
(Hz) (dBc/Hz) (dBc/Hz)
10
100
1K
-33.9
-62.3
-87.8
-33.4
-60
-62.3
-87.6
-70
10K -110.4
100K -131.2
1M -148.6
10M -149.9
100M -150.2
-109.9
-130.8
-147.7
-148.7
-148.6
-80
-90
-100
-110
-120
-130
-140
-150
-160
Jitter
Interval
(Hz)
F1
(fs)
F2
(fs)
12K-20M 118.4 117.9
50K-80M
110.7 118.0
10
100
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000
Offset (Hz)
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 5 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Reliability
VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and
IR reflow simulation. The VS-509 family is capable of meeting the following qualification tests:
Environmental Compliance
Parameter
Conditions
Mechanical Shock
Mechanical Vibration
Solderability
MIL-STD-883, Method 2002 B
MIL-STD-883, Method 2007 A
MIL-STD-883, Method 2003
MIL-STD-883, Method 1014
MIL-STD-883, Method 2016
IPC/JEDEC J-STD-020, MSL1
Gross and Fine Leak
Resistance to Solvents
Moisture Sensitivity Level
Handling Precautions
Although ESD protection circuitry has been designed into the VS-509 proper precautions should be taken when
handling and mounting. VI employs a human body model (HBM) and a charged-device model (CDM) for ESD
susceptibility testing and design protection evaluation.
ESD Ratings
Model
Minimum
2000 V
1000 V
200 V
Conditions
Human Body Model
Charged Device Model
Machine Model
MIL-STD 883, Method 3015
JEDEC, JESD22-C101
JEDEC, JESD22-A115-A
Reflow Profile (IPC/JEDEC J-STD-020)
Parameter
Symbol
Value
PreHeat Time
t S
60 sec Min, 180 sec Max
3 oC/sec Max
Ramp Up
R UP
t L
Time Above 217 oC
Time To Peak Temperature
Time At 260 oC
60 sec Min, 150 sec Max
480 sec Max
t AMB-P
t P
20 sec Min, 40 sec Max
6 oC/sec Max
Ramp Down
R DN
t L
t P
260
The VS-509 is qualified to meet the JEDEC standard
for Pb-Free assembly. The temperatures and time
intervals listed are based on the Pb-Free small body
requirements. The temperatures refer to the topside
of the package, measured on the package body
surface. The VS-509 should not be subjected to a
wash process that will immerse it in solvents. NO
CLELAN is the recommenced procedure. The VS-509
is designed for pick and place soldering. It should be
reflowed once on topside position only.
R UP
217
200
R DN
150
t S
t AMB-P
25
Terminal Plating: ENIG per IPC-4552
Electroless Ni = 3 - 6 µm
Time (sec)
Immersion Au = 0.05 µm Min
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 6 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Outline & Marking Diagram
Suggested Pad Layout
13.80±0.15
[.543±.006]
3.03±0.15
[.119±.006]
7.62
[.300]
0.79
[.031]
6
5
4
1.27
[.050]
VS509 YWW
CCC-CCCC
XX/XX
9.10±0.15
[.358±.006]
0.76
[.030]
8.80
[.346]
1
2
3
12.70
[.500]
2.24
[.088]
0.51
1.55
[R0.020]
[.061]
3.00
[.118]
Y = Year
WW = Week
2.54
[.100]
6.00±0.15
[.236±.006]
C = Option Codes
XX = Frequency Codes
(See Ordering Info)
5.08
[.200]
mm
[inch]
mm
1.02
2.54
[.040]
[.100]
[inch]
Pin Out
Frequency Select (Tri-State LV-CMOS)
Pin
1
Symbol
VC
Function
Control Voltage
FS
H
Voltage Range
(5VCC / 6) to VCC
Result
F2
2
FS
Frequency Select
M
L
OD
(VCC / 2) ± 15%(VCC / 2)
Gnd to (VCC / 6)
3
GND
Output
COutput
VCC
Case and Electrical Ground
Output
F1
4
5
Complementary Output
Power Supply Voltage
LV-CMOS Tri-State Control
6
Floating FS Results in F2 (VS550 Compatibility) or in
OD (VS709 Compatibility), See Order Options
Tape and Reel (EIA-481-2-A)
Pull Off Direction
D
Pin ID
Po
ØDo
W2
F
W
N
A
C
W1
P1
B
Tape Dimensions (mm)
Reel Dimensions (mm)
Dimension
Tolerance
VS-509
W
F
Do
Po
P1
A
B
C
Typ
13
D
N
W1
W2 # Per
Typ Typ Typ Typ Typ
24 11.5 1.5 12
Typ
330
Min
1.5
Min
20.2
Min
100
Typ
Max
Reel
4
24.4 30.4
200
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 7 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Standard Frequencies (MHz)
155.520000 M2
173.370748 ND
622.080000 P2
672.162712 R5
718.863800 V6
156.250000 M3
184.320000 NH
625.000000 P3
690.569196 R4
737.280000 TL
161.132813 M4
307.200000 RX
644.531250 P4
693.482991 R6
905.499558 V7
166.628572 M5
311.040000 P1
657.421875 PB
696.421478 V1
167.331646 N2
368.640000 RY
666.514286 P5
696.614900 V8
168.040678 N3
614.400000 RG
669.326582 R3
707.352650 TC
Other Frequencies Available Upon Request.
Frequency F1 Must Be Lower Than Frequency F2.
Frequencies F1 & F2 Must Be Selected Within One Frequency Range: (150 - 250),(300 - 500),(600 - 1000)
Ordering Information
VS - 509 - E C E - K A A N - P2 / P4
Frequency 1
Frequency 2
See Above
Product Family
See Above
VS: VCSO
Package
Other (Future Use)
N: N/A
509: 9.1 x 13.8 x 3.1 mm
Supply Voltage
E: 3.3V
Oscillator Gain
A: +365 ppm/V
B: +300 ppm/V
Output Type
Control Logic / Float Condition
C: LVPECL
D: LVDS
A: L = F1, M = OD, H = F2 / F2
B: L = F1, M = OD, H = F2 / OD
Operating Temperature
E: -40oC to 85oC
Absolute Pull Range
K: ± 50 ppm
S: ± 100 ppm
Example1: VS-509-ECE-KAAN-P2/R3
Example2: VS-509-ECE-SBAN-P4/PB
Contact Information:
USA: Vectron International • 267 Lowell Rd. Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
EUROPE: Landstrasse, D-74924, Neckarbischofsheim, Germany
Tel: 49 (0) 7268 8010 • Fax: 49 (0) 7268 801281
ASIA: 1F-2F, No 8 Workshop, No. 308 Fenju Road, WaiGaoQiao Free Trade Zone,
Pudong, Shanghai, China 200131
Tel : 86 21 5048 0777 • Fax : 86 21 5048 1881
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is
assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 8 of 9
Rev: 29Oct2010
VS-509 Dual Frequency VCSO
Preliminary Data Sheet
Revision History
Date
Approved
Description
11Mar2010
18Mar2010
04May2010
30Jul2010
16Aug2010
29Oct2010
JM, BW
Preliminary Release
JM
Corrected Pin1 ID on Outline and Changed Floating FS to F2
JM
Changed Pin1 ID on Cover and Increased Outline Height (24 Mil Pcb to 31 Mil Pcb)
Added Typ Low Gain on pg2, Float Condition Text on pg7 and its Ordering Option on pg8
Changed Standard Gain to +365 ppm/V, Removed Vc Pull Plots
JM
JM
JM
Removed 2.5V option, Added Vc Pull & Phase Noise Plots
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 9 of 9
Rev: 29Oct2010
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