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PFM4414BB6M48D0CA8 [VICOR]

Isolated AC-DC Converter with PFC;
PFM4414BB6M48D0CA8
型号： PFM4414BB6M48D0CA8
厂家： VICOR CORPORATION    VICOR CORPORATION
描述：

Isolated AC-DC Converter with PFC

功率因数校正
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PFM™ in a VIA Package  
AC-DC Converter  
PFM4414xB6M48D0yAz  
S
®
C
NRTL US  
C
US  
Isolated AC-DC Converter with PFC  
Features & Benefits  
Product Ratings  
• Universal input (85 – 264VAC  
)
VIN = 85 – 264V  
VOUT = 48V  
POUT = up to 400W  
IOUT = 8.33A  
• 48V output, regulated, isolated SELV  
• 92% typical efficiency  
Product Description  
• Built-in EMI filtering  
• Chassis mount or board mount packaging options  
• Always-on, self-protecting converter control architecture  
• SELV Output  
The PFM in a VIA™ Package is a highly advanced 400W AC-DC  
converter operating from a rectified universal AC input which  
delivers an isolated and regulated Safety Extra Low Voltage (SELV)  
48V secondary output.  
This unique, ultra-low profile module incorporates AC-DC  
conversion, integrated filtering and transient surge protection in a  
chassis mount or PCB mount form factor.  
• Two temperature grades including operation to –40°C  
• VIA Package  
• Robust Mechanical Design  
The PFM enables a versatile two-sided thermal strategy which  
greatly simplifies thermal design challenges.  
• Versatile thermal management capability  
• Safe and reliable secondary-side energy storage  
• High MTBF  
When combined with downstream Vicor DC-DC conversion  
components and regulators, the PFM allows the Power Design  
Engineer to employ a simple, low-profile design which will  
differentiate his end-system without compromising on cost or  
performance metrics.  
• 140W/in3 power density  
• 4414 package  
• AC Input Front-End Module provides external rectification  
and transient protection (VIA AIM™ sold separately)  
Typical Applications  
• Small cell base stations  
• Telecom switching equipment  
• LED lighting  
Shown with required  
companion component,  
VIA AIM  
(see pages 2-3)  
• Industrial power systems  
Size:  
4.35 x 1.40 x .37in  
110.6 x 35.5 x 9.3mm  
Part Ordering Information  
Output  
Max  
Product  
Function  
Package  
Length  
Package  
Width  
Package  
Type  
Input  
Voltage  
Range  
Ratio  
Voltage Output Product Grade  
(Range)  
Option Field  
Power  
PFM  
44  
14  
x
B6  
M
48  
D0  
y
z
z
PFM =  
Power Factor  
Module  
A0 = Chassis/Always On  
A4 = Short Pin/Always On  
A8 = Long Pin/Always On  
Length in  
Width in  
B = Board VIA  
C = –20 to 100°C  
T = –40 to 100°C  
Internal Reference  
Inches x 10 Inches x 10 V = Chassis VIA  
PFM™ in a VIA Package  
Page 1 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Typical PCB Mount Applications  
M1  
M2  
J1  
F1  
48V  
+
_
48V 5 A  
L
+OUT  
+IN  
–IN  
+OUT  
–OUT  
2 x Cool-Power®  
ZVS Buck  
+
_
3.3 V 10A  
+
+
+
85 –  
264VAC  
VIA  
MOV  
VIA™ PFM  
AIM™  
C1 C2 C3  
Cool-Power®  
ZVS Buck  
+
_
1.8 V 8A  
–OUT  
N
The PCB terminal option allows mounting on an industry standard printed circuit board, with two different pin lengths. Vicor offers a  
variety of downstream DC-DC converters driven by the 48V output of the PFM in a VIA package. The 48V output is usable directly by loads  
that are tolerant of the PFC line ripple, such as fans, motors, relays, and some types of lighting. Use downstream DC-DC Point of Load  
converters where more precise regulation is required.  
Parts List for Typical PCB Mount Applications  
J1  
Qualtek 703W IEC 320-C14 Power Inlet  
F1  
Littelfuse 0216008.MXP 8A 250VAC 5 x 20mm holder  
M1  
M2  
Vicor AIM™ AIM1714BB6MC7D5yzz  
Vicor PFM™ PFM4414BB6M48D0yzz  
Nichicon UVR1J472MRD 4700µF 63V 3.4A 22 x 50mm bent 90° x 2 pcs  
or  
CDE 380LX472M063K022 4700µF 63V 4.9A 30 x 30mm snap x 2 pcs  
or  
C1  
Sic Safco Cubisic LP A712121 10,000µF 63V 6.4A 45 x 75 x 12mm rectangular  
or  
CDE MLPGE1571 6800µF 63V 5.2A 45 x 50 x 12.5mm, 1 or 2pcs.  
MOV  
Littelfuse TMOV20RP300E VARISTOR 10kA 300V 250J 20mm  
PFM™ in a VIA Package  
Page 2 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Typical Chassis Mount Applications  
M1  
M2  
J1  
F1  
48V  
L
+OUT  
+IN  
–IN  
+OUT  
Fan  
85 –  
264VAC  
VIA  
AIM™  
+
+
+
MOV  
VIA™ PFM  
C1  
C2  
C3  
–OUT  
N
–OUT  
Relays  
8
8
16  
Dispensors  
Controller  
Coin Box  
The PFM in a VIA package is available in Chassis Mount option, saving the cost of a PCB and allowing access to both sides of the power  
supply for cooling. The parts list below minimizes the number of interconnects required between necessary  
components, and selects components with terminals traditionally used for point to point chassis wiring.  
Parts List for Typical Chassis Mount Applications  
J1  
Qualtek 719W or 723W IEC 320-C14 Power Inlet  
F1  
Littelfuse 0216008.MXP 8A 250VAC 5 x 20mm in a J1, or separate fuse holder  
M1  
M2  
Vicor AIM™ AIM1714VB6MC7D5y00  
Vicor PFM™ PFM4414VB6M48D0y00  
UCC E32D630HPN103MA67M 10,000µF, 63V 7.4A, 35 x 67mm screw terminal  
C1  
or  
Kemet ALS30A103DE063, 10,000µF 63V 10.8A 36 x 84mm screw terminal  
MOV  
Littelfuse TMOV20RP300E VARISTOR 10kA 300V 250 20mm  
PFM™ in a VIA Package  
Page 3 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Pin Configuration  
TOP VIEW  
+IN  
–IN  
1
2
3
4
+OUT  
–OUT  
4414 VIA™ PFM - Chassis Mount - Terminals Up  
TOP VIEW  
–IN  
+IN  
2
1
4
3
–OUT  
+OUT  
4414 VIA PFM - PCB Mount - Pins Down  
Please note that these Pin drawings are not to scale.  
Pin Descriptions  
Pin Number  
Signal Name  
Type  
Function  
1
2
3
4
+IN  
–IN  
INPUT POWER  
Positive input power terminal  
Negative input power terminal  
Positive output power terminal  
Negative output power terminal  
INPUT POWER  
RETURN  
+OUT  
–OUT  
OUTPUT POWER  
OUTPUT POWER  
RETURN  
PFM™ in a VIA Package  
Page 4 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Absolute Maximum Ratings  
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.  
Parameter  
Comments  
Min  
Max  
Unit  
Input Voltage +IN to –IN  
1ms max  
0
600  
VPK  
Input Voltage (+IN to –IN)  
Continuous, Rectified  
0
275  
VRMS  
Output Voltage (+OUT to –OUT)  
Output Current  
–0.5  
0.0  
58  
12.4  
VDC  
A
.
.
Screw Torque  
4 mounting, 2 input, 2 output  
T-Grade  
4 [0.45]  
125  
in lbs [N m]  
Operating Junction Temperature  
Storage Temperature  
Dielectric Withstand *  
Input – Case  
–40  
–65  
°C  
°C  
T-Grade  
125  
See note below  
Basic Insulation  
2121  
2121  
707  
VDC  
VDC  
VDC  
Reinforced Insulation  
(Internal ChiP™ tested at 4242VDC prior to assembly.)  
Input – Output  
Output – Case  
Functional Insulation  
* Please see Dielectric Withstand section. See page 19.  
10.00  
8.00  
6.00  
4.00  
2.00  
0.00  
500  
400  
300  
200  
100  
0
-60  
-40  
-20  
0
20  
40  
60  
80  
100  
Case Temperature (°C)  
Current  
Power  
Safe Operating Area  
PFM™ in a VIA Package  
Page 5 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Electrical Specifications  
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TJ = 25°C, unless otherwise noted; boldface specifications apply over  
the temperature range of the specified product grade. COUT is 10,000µF 20ꢀ unless otherwise specified.  
Attribute  
Symbol  
Conditions / Notes  
Min  
85  
Typ  
Max  
Unit  
Power Input Specification  
Input Voltage Range,  
Continuous Operation  
VIN  
VIN  
264  
VRMS  
V
Input Voltage Range,  
Transient, Non-Operational (Peak)  
1ms  
600  
Input Current (Peak)  
Source Line Frequency Range  
Power Factor  
IINRP  
fline  
PF  
See Figure 8, Startup Waveforms  
12  
63  
A
Hz  
-
47  
Input power >200W  
0.96  
Differential mode inductance, common mode  
inductance may be higher. See section  
“Source Inductance Considerations” on page 15.  
Input Inductance, Maximum  
Input Capacitance, Maximum  
LIN  
1
mH  
µF  
CIN  
After AIM™, between +IN and –IN  
1.5  
No Load Specification  
Input Power – No Load, Maximum  
PNL  
15  
W
Power Output Specification  
VIN = 230VRMS, 100ꢀ load  
Output Voltage Set Point  
Output voltage, No Load  
VOUT  
46  
48  
50  
V
V
VOUT-NL  
Over all operating steady state line conditions.  
42  
54  
Non-faulting abnormal line and  
load transient conditions  
Output Voltage Range (Transient)  
Output Power  
VOUT  
POUT  
30  
57.6  
400  
V
See SOA on Page 5  
W
ꢀ
VIN = 230V, full load, exclusive of AIM losses  
90.5  
90.0  
92.4  
92.1  
85V < VIN < 264V, full load, exclusive of  
AIM losses  
ꢀ
ꢀ
mV  
V
Efficiency  
η
85V < VIN < 264V, full load,  
exclusive of AIM losses  
88.5  
91.7  
200  
3.0  
Output Voltage Ripple,  
Switching Frequency  
Over all operating steady-state line and load  
conditions, 20MHz BW, measured at output, Figure 5  
VOUT-PP-HF  
VOUT-PP-LF  
2000  
Output Voltage Ripple  
Line Frequency  
Over all operating steady-state line and load  
conditions, 20MHz BW  
7.0  
Output Capacitance (External)  
Output Turn-On Delay  
COUT-EXT  
TON  
Allows for 20ꢀ capacitor tolerance  
6800  
15000  
1000  
1000  
11  
µF  
ms  
ms  
ms  
ꢀ
ms  
ꢀ
ꢀ
A
From VIN applied  
Full load  
500  
500  
5.5  
Start Up Setpoint Aquisition Time  
Cell Reconfiguration Response Time  
Voltage Deviation (Transient)  
Recovery Time  
TSS  
TCR  
Full load  
ꢀVOUT-TRANS  
TTRANS  
–37.5  
20  
300  
600  
3
Line Regulation  
ꢀVOUT-LINE  
ꢀVOUT-LOAD  
IOUT  
Full load  
Load Regulation  
10ꢀ to 100ꢀ load  
3
Output Current (Continuous)  
Output Current (Transient)  
SOA  
8.33  
12.5  
IOUT-PK  
20ms duration, average power ≤POUT, max  
A
PFM™ in a VIA Package  
Page 6 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Electrical Specifications (Cont.)  
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TJ = 25°C, unless otherwise noted; boldface specifications apply over  
the temperature range of the specified product grade. COUT is 10,000µF 20ꢀ unless otherwise specified.  
Attribute  
Symbol  
Conditions / Notes  
Min  
132  
Typ  
Max  
Unit  
Powertrain Protections  
Input Undervoltage Threshold,  
High Range  
VUVLOH-  
VUVLOH+  
VIN-UVLOL+  
VIN-UVLOL-  
135  
145  
74  
VRMS  
VRMS  
VRMS  
VRMS  
Input Undervoltage Recover,  
High Range  
148  
83  
Input Undervoltage Turn-On,  
Low Range  
See Timing Diagram  
Input Undervoltage Turn-Off,  
Low Range  
65  
71  
Input Overvoltage Turn-On  
Input Overvoltage Turn-Off  
Output Overvoltage Threshold  
VIN-OVLO-  
VIN-OVLO+  
VOUT-OVLO+  
See Timing Diagram  
265  
270  
273  
61  
VRMS  
VRMS  
V
287  
64  
Instantaneous, latched shutdown  
58  
Upper Start / Restart  
Temperature Threshold (Case)  
TCASE-OTP-  
TJ-OTP+  
100  
°C  
°C  
°C  
Overtemperature Shutdown  
Threshold (Junction)  
125  
Overtemperature Shutdown  
Threshold (Case)  
TCASE-OTP+  
110  
Overcurrent Blanking Time  
Input Overvoltage Response Time  
Input Undervoltage Response Time  
Output Overvoltage Response Time  
Short Circuit Response Time  
Fault Retry Delay Time  
TOC  
TPOVP  
TUVLO  
TSOVP  
TSC  
Based on line frequency  
400  
460  
40  
550  
ms  
ms  
ms  
ms  
µs  
s
Based on line frequency  
Powertrain on  
200  
30  
Powertrain on, operational state  
See Timing Diagram  
270  
10  
TOFF  
Output Power Limit  
PPROT  
50ꢀ overload for 20ms typ allowed  
400  
W
PFM™ in a VIA Package  
Page 7 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Timing Diagram  
PFM™ in a VIA Package  
Page 8 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Timing Diagram (Cont.)  
PFM™ in a VIA Package  
Page 9 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Application Characteristics  
12  
10  
8
93.5  
93.0  
92.5  
92.0  
91.5  
91.0  
6
4
90.5  
90.0  
2
85  
105 125 145 165 185 205 225 245 265  
85  
105  
125  
145 165 185  
205  
225  
245  
265  
Input Line Voltage  
Input Line Voltage  
–40°C  
25°C  
80°C  
-40°C  
25°C  
80°C  
Figure 1 — Full load efficiency vs. line voltage  
Figure 2 — Typical no load power dissipation vs. VIN ,  
module enabled  
1.00  
0.98  
0.96  
0.94  
0.92  
0.90  
0.88  
0.86  
0.84  
0.82  
0.80  
800  
700  
600  
500  
400  
300  
200  
100  
0
0
100  
200  
300  
400  
3
1
5
7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39  
Output Power (W)  
230V, 50Hz  
EN61000-3-2, Class D  
1/3x EN61000-3-2, Class A  
VIN  
:
120V/60Hz  
100V/50Hz  
230V/50Hz  
Figure 3 — Typical input current harmonics, full load vs. VIN using  
Figure 4 — Typical power factor vs. VIN and IOUT using  
typical applications circuit on pages 2 & 3  
typical applications circuit on pages 2 & 3  
Figure 5 — Typical switching frequency output voltage ripple  
waveform, TCASE = 30ºC, VIN = 230V, IOUT = 8.3A, no  
external ceramic capacitance, 20MHz BW  
Figure 6 — Typical line frequency output voltage ripple waveform,  
TCASE = 30ºC, VIN = 230V, IOUT = 8.3A,  
COUT = 10,000µF. 20MHz BW  
PFM™ in a VIA Package  
Page 10 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Application Characteristics (Cont.)  
Figure 7 — Typical output voltage transient response,  
TCASE = 30ºC, VIN = 230V, IOUT = 8.3A, 2.1A  
COUT = 10,000µF  
Figure 8 — Typical startup waveform, application of VIN ,  
IOUT = 8.3A, COUT = 10,000µF  
Figure 9 — 230V, 120V range change transient response,  
Figure 10 — Line drop out, 230V 50Hz, 0° phase, IOUT = 8.3A,  
IOUT = 8.3A, COUT = 10,000µF  
COUT = 10,000µF  
Figure 11 — Line drop out, 90° phase, VIN = 230V, IOUT = 8.3A,  
Figure 12 — Typical line current waveform, VIN = 120V,  
COUT = 10,000µF  
60Hz IOUT = 8.3A, COUT = 10,000µF  
PFM™ in a VIA Package  
Page 11 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Application Characteristics (Cont.)  
Det  
ResBW  
Meas  
QPTrd  
kHz  
55022RED  
dB  
Det  
ResBW  
Meas  
QPTrd  
9 kHz  
20 msUnit  
55022RED  
dB V  
Att 20 dB  
INPUT  
9
Att 20 dB  
INPUT  
2
T
20 msUnit  
V
2
T
100  
90  
80  
70  
60  
50  
40  
30  
20  
100  
90  
80  
70  
60  
50  
40  
30  
20  
1
MHz  
10 MHz  
1
MHz  
10 MHz  
SGL  
SGL  
1QP  
2AV  
1QP  
2AV  
22QPB  
22AVB  
22QPB  
22AVB  
13.Jul 2017 14:25  
13.Jul 2017 12:29  
150 kHz  
30 MHz  
150 kHz  
30 MHz  
Date: 13.JUL.2017 14:25:07  
Date: 13.JUL.2017 12:29:36  
Figure 13 — Typical EMI Spectrum, Peak Scan, 90% load,  
VIN = 115V, COUT = 10,000µF using Typical Chassis  
Mount Application Circuit  
Figure 14 — Typical EMI Spectrum, Peak Scan, 90% load,  
VIN = 230V, COUT = 10,000µF using Typical Chassis  
Mount Application Circuit  
40  
35  
30  
25  
20  
15  
10  
5
94  
92  
90  
88  
86  
84  
82  
80  
78  
40  
35  
30  
25  
20  
15  
10  
94  
92  
90  
88  
86  
84  
82  
80  
78  
5
0
0
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
Load Current (A)  
Load Current (A)  
85V  
85V  
115V  
230V Eff  
VIN:  
85V  
85V  
115V  
230V Eff  
VIN:  
115V  
230V P Diss  
115V  
230V P Diss  
Figure 15 — VIN to VOUT efficiency and power dissipation vs.  
Figure 16 — VIN to VOUT efficiency and power dissipation vs.  
VIN and IOUT , TCASE = –40ºC  
VIN and IOUT, TCASE = 25ºC  
94  
92  
90  
88  
86  
84  
82  
80  
78  
50  
45  
40  
35  
30  
25  
20  
15  
10  
0
1
2
3
4
5
6
7
8
9
Load Current (A)  
85V  
85V  
115V  
230V Eff  
VIN:  
115V  
230V P Diss  
Figure 17 — VIN to VOUT efficiency and power dissipation vs.  
VIN and IOUT , TCASE = 80ºC  
PFM™ in a VIA Package  
Page 12 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
General Characteristics  
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TC = 25°C, unless otherwise noted; boldface specifications apply over  
the temperature range of the specified Product Grade.  
Attribute  
Symbol  
Conditions / Notes  
Mechanical  
Min  
Typ  
Max  
Unit  
Length  
L
W
H
110.6 [4.35]  
35.5 [1.40]  
9.3 [0.37]  
36.9 [2.25]  
148 [5.2]  
mm [in]  
mm [in]  
mm [in]  
cm3 [in3]  
g [oz]  
Width  
Height  
Volume  
Weight  
Vol  
W
Without heatsink  
Pin Material  
Underplate  
C145 copper, half hard  
Low stress ductile nickel  
Palladium  
50  
0.8  
100  
6
µin  
µin  
µin  
Pin Finish  
Soft Gold  
0.12  
2
Thermal  
C-Grade, see derating curve in SOA  
T-Grade, see derating curve in SOA  
–20  
–40  
100  
100  
°C  
°C  
Operating Case Temperature  
TC  
Thermal Resistance,  
Junction to Case, Top  
RJC_TOP  
RJC_BOT  
RHOU  
1.34  
1.72  
°C/W  
°C/W  
Thermal Resistance,  
Junction to Case, Bottom  
Coupling Thermal Resistance,  
Top to Bottom of Case, Internal  
0.57  
54  
°C/W  
J/K  
Shell Thermal Capacity  
Thermal Design  
See Thermal Considerations on Page 17  
Assembly  
Human Body Model,  
JEDEC JESD 22-A114C.01  
ESDHBM  
ESDMM  
ESDCDM  
1,000  
N/A  
Machine Model,  
JEDEC JESD 22-A115B  
ESD Rating  
V
Charged Device Model,  
JEDEC JESD 22-C101D  
200  
Safety  
cTUVus, EN60950-1 and IEC 60950-1  
cURus, UL 60950-1 and CAN/CSA 60950-1  
Agency Approvals / Standards  
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable  
Touch Current measured in accordance  
with IEC 60990 using measuring network  
0.5  
mA  
Figure  
3 (PFM in a VIA™ package only)  
PFM™ in a VIA Package  
Page 13 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
General Characteristics (Cont.)  
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TC = 25°C, unless otherwise noted; boldface specifications apply over  
the temperature range of the specified Product Grade.  
Attribute  
Symbol  
Conditions / Notes  
Min  
Typ  
Max  
Unit  
EMI/EMC Compliance  
FCC Part 15, EN55022, CISPR22: 2006 +  
A1: 2007, Conducted Emissions  
Class B Limits - with –OUT  
connected to GND  
Level 3, Immunity Criteria A,  
external TMOV and fuse, shown  
on page 2 or 3, required  
EN61000-4-5: 2006,  
Surge Immunity  
Reliability  
Case  
Reliability Assurance Relex Modeling, Studio 2007, v2]  
Temp (°C)  
Duty Cycle  
Condition  
MTBF (MHrs)  
FIT  
1
Telcordia Issue 2, Method I Case 1  
25  
100ꢀ  
GB,GC  
0.702  
1424  
MIL-HDBK-217FN2 Parts Count - 25°C Ground Benign,  
Stationary, Indoors / Computer  
2
3
25  
25  
100ꢀ  
100ꢀ  
GB,GC  
GB,GC  
0.322  
2.43  
3102  
412  
Telcordia Issue 2, Method I Case 3  
PFM™ in a VIA Package  
Page 14 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Input Fuse Selection  
Product Details and Design Guidelines  
PFM in a VIA package products are not internally fused in order to  
provide flexibility in configuring power systems. Input line fusing  
is recommended at system level, in order to provide thermal  
protection in case of catastrophic failure. The fuse shall be  
selected by closely matching system requirements with the  
following characteristics:  
Building Blocks and System Designs  
L
+OUT  
+IN  
-IN  
+OUT  
-OUT  
ꢀnRecommended fuse: 216 Series Littelfuse 8A or lower current  
rating (usually greater than the PFM maximum current at lowest  
input voltage)  
VIA  
VIA  
AIM™  
PFM™  
-OUT  
N
Holdup Capacitor  
ꢀnMaximum voltage rating  
(usually greater than the maximum possible input voltage)  
ꢀnAmbient temperature  
ꢀnBreaking capacity per application requirements  
ꢀnNominal melting I2t  
Figure 18 — 400W Universal AC-DC Supply  
The PFM in a VIA™ package is a high efficiency AC-DC converter,  
operating from a universal AC input to generate an isolated SELV  
48VDC output bus with power factor correction. It is the key  
component of an AC-DC power supply system such as the one  
shown in Figure 18 above.  
Source Inductance Considerations  
The PFM Powertrain uses a unique Adaptive Cell Topology that  
dynamically matches the powertrain architecture to the AC line  
voltage. In addition the PFM uses a unique control algorithm to  
reduce the AC line harmonics yet still achieve rapid response to  
dynamic load conditions presented to it at the DC output terminals.  
Given these unique power processing features, the PFM can expose  
deficiencies in the AC line source impedance that may result in  
unstable operation if ignored.  
The input to the PFM in a VIA package is a rectified sinusoidal  
AC source with a power factor maintained by the module with  
harmonics conforming to IEC 61000-3-2. Internal filtering enables  
compliance with the standards relevant to the application (Surge,  
EMI, etc.). See EMI/EMC Compliance standards on Page 14.  
It is recommended that for a single PFM, the line source inductance  
should be no greater than 1mH for a universal AC input of  
100 – 240V. If the PFM will be operated at 240V nominal only,  
the source impedance may be increased to 2mH. For either of the  
preceding operating conditions it is best to be conservative and  
stay below the maximum source inductance values. When multiple  
PFM’s are used on a single AC line, the inductance should be no  
greater than 1mH/N, where N is the number of PFM’s on the AC  
branch circuit, or 2mH/N for 240VAC operation. It is important to  
consider all potential sources of series inductance including and  
not limited to, AC power distribution transformers, structure wiring  
inductance, AC line reactors, and additional line filters. Non-linear  
behavior of power distribution devices ahead of the PFM may  
further reduce the maximum inductance and require testing to  
ensure optimal performance.  
The module uses secondary-side energy storage (at the SELV  
48V bus) to maintain output hold up through line dropouts and  
brownouts. Downstream regulators also provide tighter voltage  
regulation, if required.  
Traditional PFC Topology  
Full Wave EMI/TVS  
Rectifier  
Filter  
Isolated  
DC/DC  
Converter  
48V Bus  
If the PFM is to be utilized in large arrays, the PFMs should be  
spread across multiple phases or sources thereby minimizing the  
source inductance requirements, or be operated at a line voltage  
close to 240VAC. Vicor Applications should be contacted to assist  
in the review of the application when multiple devices are to be  
used in arrays.  
Figure 19 — Traditional PFC AC-DC supply  
To cope with input voltages across worldwide AC mains  
(85 – 264VAC), traditional AC-DC power supplies (Figure 19)  
use two power conversion stages: 1) a PFC boost stage to step up  
from a rectified input as low as 85VAC to ~380VDC; and 2) a DC-DC  
down converter from 380VDC to a 48V bus.  
The efficiency of the boost stage and of traditional power supplies  
is significantly compromised operating from worldwide AC lines  
as low as 85VAC  
.
Adaptive Cell™ Topology  
With its single stage Adaptive Cell™ topology, the PFM in a VIA  
package enables consistently high efficiency conversion from  
worldwide AC mains to a 48V bus and efficient secondary-side  
power distribution.  
PFM™ in a VIA Package  
Page 15 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Fault Handling  
Ruggedized Auto Range Functionality  
The input voltage range is determined at power up time, to cover  
Input Undervoltage (UV) Fault Protection  
The input voltage is monitored by the microcontroller to detect an  
input under voltage condition. When the input voltage is less than  
the UVLO threshold, a fault is detected. After a time tUVLO, the unit  
shuts down. Faults lasting less than tUVLO may not be detected.  
Such a fault does not go through an auto-restart cycle. Once the  
input voltage rises above the UVLO threshold, the unit recovers  
from the input UV fault, the powertrain resumes normal switching  
after a time tON and the output voltage of the unit reaches the set  
point voltage within a time tSS.  
the input voltage range of either 85 – 132VRMS or 170 – 264VRMS  
called low range and high range. Once selected, dynamic range  
changes are limited by the logic explained below.  
,
In low range, operation continues until the input either drops under  
the UVLO threshold (in which case the converter turns off), or until  
the input exceeds the range transition threshold.  
The increase in input voltage can be temporary, as when handling a  
surge on the input, or it could be permanent, as can happen in the  
rare occasion when an input is turned on during a brown-out or  
sag condition on a high voltage system:  
Overcurrent (OC) Fault Protection  
As long as the fault persists, the module goes through an auto-  
restart cycle with off time equal to tOFF + tON and on time equal to  
tOC. Faults shorter than a time tOC may not be detected. Once the  
fault is cleared, the module follows its normal start up sequence  
ꢀnIf the increase is temporary, and the input returns under  
range transition threshold within 0.8s, operation continues in  
low range.  
after a time tOFF  
.
ꢀnIf the input stays over the range transition threshold, the  
Short Circuit (SC) Fault Protection  
converter changes to high range.  
The module responds to a short circuit event within a time tSC. The  
module then goes through an auto restart cycle, with an off time  
equal to tOFF + tON and an on time equal to tSC, for as long as the  
short circuit fault condition persists. Once the fault is cleared, the  
unit follows its normal start up sequence after a time tOFF. Faults  
shorter than a time tSC may not be detected.  
In high range, operation continue up to to the OVLO. A surge will  
cause the power train to turn off on a short term basis to protect  
itself during the rise in input voltage, and it will return to operation  
when the input returns to the operating range.  
When the input crosses under the range transition threshold,  
the input turns off as it considers this to be the high range UVLO  
threshold. If the converter returns above the range transition  
threshold within 50ms, the converter will resume operation in high  
range. If the converter does not return to operating range, the  
system will reset to the default power down condition, monitoring  
the input and waiting to decide whether it should startup into low  
range or high range.  
Temperature Fault Protection  
The microcontroller monitors the temperature within the PFM.  
If this temperature exceeds TJ-OTP+, an overtemperature fault is  
detected, and the output voltage of the PFM falls. Once the case  
temperature falls below TCASE-OTP-, after a time greater than or  
equal to tOFF, the converter recovers and undergoes a normal  
restart. For the C-grade version of the converter, this temperature  
is 75°C. Faults shorter than a time tOTP may not be detected. If the  
temperature falls below TCASE-UTP-, an undertemperature fault is  
detected, and the output voltage of the unit falls. Once the case  
temperature rises above TCASE-UTP, after a time greater than or equal  
to tOFF, the unit recovers and undergoes a normal restart.  
Output Overvoltage Protection (OVP)  
The microcontroller monitors the primary sensed output voltage to  
detect output OVP. If the primary sensed output voltage exceeds  
VOUT-OVLO+, a fault is latched, and the output voltage of the module  
falls after a time tSOVP. Faults shorter than a time tSOVP may not be  
detected. This type of fault is a latched fault and requires that the  
input power be recycled to recover from the fault.  
PFM™ in a VIA Package  
Page 16 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Input Line Cycle Skipping  
Output Filtering  
This model does not have input line cycle skipping. As a result, the  
regulation spec is guaranteed from no load to full load. Because of  
this, this model does not present high peak to peak output voltage  
under low load conditions, limiting perturbation that may affect  
downstream regulators ability to regulate their outputs as tightly  
as desired. The only sources of output voltage perturbation (from  
largest to smallest amplitude) are:  
The PFM in a VIA package requires an output bulk capacitor in  
the range of 6,800µF to 15,000µF for proper operation of the  
PFC front-end. A minimum 10,000µF is recommended for full  
rated output. Capacitance can be reduced proportionally for  
lower maximum loads.  
The output voltage has the following two components of  
voltage ripple:  
ꢀnDischarge of output bulk caps during a dropout condition  
1. Line frequency voltage ripple: 2 • fLINE Hz component  
ꢀnSurge transients that can cause similar dropout or short term  
2. Switching frequency voltage ripple: 1MHz module switching  
range change  
frequency component (see Figure 5).  
ꢀnInput line cycle ripple, with amplitude proportional to  
output current  
Line Frequency Filtering  
Output line frequency ripple depends upon output bulk  
capacitance. Output bulk capacitor values should be calculated  
based on line frequency voltage ripple. High-grade electrolytic  
capacitors with adequate ripple current ratings, low ESR and a  
minimum voltage rating of 63V are recommended.  
ꢀnSwitching frequency ripple, which can be reduced further with a  
higher frequency filter stage if necessary  
Noise sensitive applications should still test to ensure they can  
handle or safely ignore these AC transitions on the PFM output  
bus, which are expected to be handled by the downstream point of  
load regulators.  
lPK  
Hold-Up Capacitance  
The PFM in a VIA™ package uses secondary-side energy storage  
(at the SELV 48V bus) and downstream regulators to maintain  
output hold up through line dropouts and brownouts. The  
module’s output bulk capacitance can be sized to achieve the  
required hold up functionality.  
lPK/2  
loutDC  
lfLINE  
Hold-up time depends upon the output power drawn from the  
PFM in a VIA package based AC-DC front end and the input  
voltage range of downstream DC-DC converters.  
Figure 20 — Output current waveform  
Based on the output current waveform, as seen in Figure 20, the  
following formula can be used to determine peak-to-peak line  
frequency output voltage ripple:  
The following formula can be used to calculate hold-up capacitance  
for a system comprised of PFM and a downstream regulator:  
~
2
2
VPPL ~ 0.2 • POUT / (VOUT • fLINE • C)  
Where:  
C = 2 • POUT • (0.005 + td)/(V2 – V1 )  
Where:  
VPPL  
Output voltage ripple peak-to-peak line frequency  
Average output power  
C
VIA PFM’s output bulk  
capacitance in Farads  
POUT  
td  
Hold-up time in seconds  
VOUT Output voltage set point, nominally 48V  
POUT  
V2  
VIA PFM’s output power in Watts  
fLINE  
C
Frequency of line voltage  
Output voltage of VIA PFM’s  
converter in Volts  
Output bulk capacitance  
IDC  
IPK  
Maximum average output current  
Peak-to-peak line frequency output current ripple  
V1  
Downstream regulator undervoltage turn off (Volts)  
–OR–  
POUT / IOUT-PK, whichever is greater.  
In certain applications, the choice of bulk capacitance may be  
determined by hold-up requirements and low frequency output  
voltage filtering requirements. Such applications may use the  
greater capacitance value determined from these requirements.  
The ripple current rating for the bulk capacitors can be determined  
from the following equation:  
~
IRIPPLE ~ 0.8 • POUT / VOUT  
Switching Frequency Filtering  
This is included within the PFM in a VIA. No external filtering  
is necessary for most applications. For the most noise sensitive  
applications, a common mode choke followed by two caps to PE  
GND will reduce switching noise further.  
PFM™ in a VIA Package  
Page 17 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
In this case, the internal power dissipation is PDISS, RJC_TOP and  
RJC_BOT are thermal resistance characteristics of the VIA module and  
EMI Filtering and Transient Voltage Suppression  
EMI Filtering  
the top and bottom surface temperatures are represented as TC_TOP  
,
The PFM with PFC is designed such that it will comply with  
EN55022 Class B for Conducted Emissions with the Vicor AIM™,  
AIM1714xB6MC7D5yzz. The emissions spectrum is shown in  
Figures 13 & 14. If the positive output is connected to earth ground  
or both output terminals are to be left floating, a 4700pF 500V  
capacitor on the –OUT terminal to ground is also recommended.  
and TC_BOT. It interesting to notice that the package itself provides  
a high degree of thermal coupling between the top and bottom  
case surfaces (represented in the model by the resistor RHOU). This  
feature enables two main options regarding thermal designs:  
ꢀnSingle side cooling: the model of Figure 21 can be simplified by  
calculating the parallel resistor network and using one simple  
thermal resistance number and the internal power dissipation  
curves; an example for bottom side cooling only is shown in  
Figure 22.  
EMI performance is subject to a wide variety of external influences  
such as PCB construction, circuit layout etc. As such, external  
components in addition to those listed herein may be required in  
specific instances to gain full compliance to the standards specified.  
Radiated emissions require certification at the system level. For best  
results, enclose the product in a steel enclosure. Filtering must be  
considered for every conductor leaving the enclosure, which can  
present itself as a potential transmission antenna.  
RJC  
+ TC_BOT  
Transient Voltage Suppression  
s
The PFM contains line transient suppression circuitry to meet  
specifications for surge (i.e. EN61000-4-5) and fast transient  
conditions (i.e. EN61000-4-4 fast transient/“burst”) when coupled  
with an external TMOV as shown on pages 2 and 3.  
PDISS  
When more than one PFM is used in a system, each PFM should  
have its own fuse, TMOV and VIA™ AIM.  
s
Thermal Considerations  
Figure 22 — Single-sided cooling VIA thermal model  
The VIA package provides effective conduction cooling from either  
of the two module surfaces. Heat may be removed from the top  
surface, the bottom surface or both. The extent to which these  
two surfaces are cooled is a key component for determining the  
maximum power that can be processed by a VIA, as can be seen  
from specified thermal operating area on Page 5. Since the VIA has  
a maximum internal temperature rating, it is necessary to estimate  
this internal temperature based on a system-level thermal solution.  
To this purpose, it is helpful to simplify the thermal solution into a  
roughly equivalent circuit where power dissipation is modeled as  
a current source, isothermal surface temperatures are represented  
as voltage sources and the thermal resistances are represented as  
resistors. Figure 21 shows the “thermal circuit” for the VIA module.  
In this case, RJC can be derived as following:  
(RJC_TOP + RHOU) • RJC_BOT  
R
=
JC  
RJC_TOP + RHOU + RJC_BOT  
ꢀnDouble side cooling: while this option might bring limited  
advantage to the module internal components (given the  
surface-to-surface coupling provided), it might be appealing  
in cases where the external thermal system requires allocating  
power to two different elements, like for example heatsinks with  
independent airflows or a combination of chassis/air cooling.  
+
RJC_TOP  
TC_TOP  
–
RHOU  
s
–
TC_BOT  
RJC_BOT  
+
PDISS  
s
Figure 21 — Double sided cooling VIA thermal model  
PFM™ in a VIA Package  
Page 18 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Powering a Constant Power Load  
Dielectric Withstand  
When the output voltage of the PFM in a VIA™ package module  
is applied to the input of the downstream regulator, the regulator  
turns on and acts as a constant-power load. When the module’s  
output voltage reaches the input undervoltage turn on of the  
regulator, the regulator will attempt to start. However, the current  
demand of the downstream regulator at the undervoltage turn-on  
point and the hold-up capacitor charging current may force the  
PFM in a VIA package into current limit. In this case, the unit may  
shut down and restart repeatedly. In order to prevent this multiple  
restart scenario, it is necessary to delay enabling a constant-power  
load when powered up by the upstream PFM in a VIA package until  
after the output set point of the PFM in a VIA package is reached.  
The chassis of the PFM is required to be connected to Protective  
Earth when installed in the end application and must satisfy the  
requirements of IEC 60950-1 for Class I products. Protective  
earthing can be accomplished through dedicated wiring harness  
(example: ring terminal clamped by mounting screw) or surface  
contact (example: pressure contact on bare conductive chassis or  
PCB copper layer with no solder mask).  
The PFM contains an internal safety approved isolating component  
(ChiP™) that provides the Reinforced Insulation from Input  
to Output. The isolating component is individually tested for  
Reinforced Insulation from Input to Output at 3000VAC or 4242VDC  
prior to the final assembly of the VIA.  
This can be achieved by  
When the VIA assembly is complete the Reinforced Insulation can  
only be tested at Basic Insulation values as specified in the electric  
strength Test Procedure noted in clause 5.2.2 of IEC 60950-1.  
1. Keeping the downstream constant-power load off during power  
up sequence,  
and  
Test Procedure Note from IEC 60950-1  
2. Turning the downstream constant-power load on after the  
output voltage of the module reaches 48V steady state.  
“For equipment incorporating both REINFORCED INSULATION and  
lower grades of insulation, care is taken that the voltage applied  
to the REINFORCED INSULATION does not overstress BASIC  
INSULATION or SUPPLEMENTARY INSULATION.”  
After the initial startup, the output of the PFM can be allowed to  
fall to 30V during a line dropout at full load. In this case, the circuit  
should not disable the downstream regulator if the input voltage  
falls after it is turned on; therefore, some form of hysteresis or  
latching is needed on the enable signal for the constant power  
load. The output capacitance of the PFM in a VIA package should  
also be sized appropriately for a constant power load to prevent  
collapse of the output voltage of the module during line dropout  
(see Hold up Capacitance on Page 17). A constant-power load can  
be turned off after completion of the required hold up time during  
the power-down sequence or can be allowed to turn off when it  
reaches its own undervoltage shutdown point.  
The timing diagram in Figure 23 shows the output voltage of the  
PFM in a VIA package and the downstream regulator’s enable pin  
voltage and output voltage of the PRM regulator for the power up  
and power down sequence. It is recommended to keep the time  
delay approximately 10 to 20ms.  
VIA PFM  
48V – 3%  
VOUT  
PRM UV  
Turn on  
tDELAY  
Downstream  
Regulator  
Enable  
Downstream  
Regulator  
VOUT  
tHOLD-UP  
Figure 23 — PRM Enable Hold off Waveforms  
PFM™ in a VIA Package  
Page 19 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Summary  
The final VIA™ assembly contains basic insulation from input to  
case, reinforced insulation from input to output, and functional  
insulation from output to case.  
The output of the VIA complies with the requirements of SELV  
circuits so only functional insulation is required from the output  
(SELV) to case (PE) because the case is required to be connected  
to protective earth in the final installation. The construction of the  
VIA can be summarized by describing it as a “Class II” component  
installed in a “Class I” subassembly. The reinforced insulation from  
input to output can only be tested at a basic insulation value of  
2121VDC on the completely assembled VIA product.  
ChiP Isolation  
Input  
Output  
SELV  
RI  
Figure 24 — ChiP™ before final assembly in the VIA  
VIA PFM Isolation  
VI ChiP  
Input  
Output  
SELV  
VIA Input Circuit  
VIA Output Circuit  
RI  
BI  
PE  
FI  
Figure 25 — PFM in a VIA package after final assembly  
PFM™ in a VIA Package  
Page 20 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
PFM in a VIA Package Chassis Mount Package Mechanical Drawing  
3
4
1
2
Product outline drawing; product outline drawings are available in .pdf and .dxf formats.  
3D mechanical models are available in .pdf and .step formats.  
PFM™ in a VIA Package  
Page 21 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
PFM in a VIA Package PCB Mount Package Mechanical Drawing  
3
4
2
13  
OTPVIEW  
TBMOSIDE  
C(PMNTOIDSE)  
0
1
1
2
PFM™ in a VIA Package  
Page 22 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
PFM in a VIA Package PCB Mount Package Recommended Land Pattern  
4
3
3
12  
MCDHOLPTARNE  
1
10  
2
1
PFM™ in a VIA Package  
Page 23 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Revision History  
Revision  
Date  
Description  
Page Number(s)  
A
11/06/17  
Initial release  
n/a  
PFM™ in a VIA Package  
Page 24 of 25  
Rev 1.0  
11/2017  
PFM4414xB6M48D0yAz  
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and  
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom  
power systems.  
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor  
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves  
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by  
Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies.  
Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
Specifications are subject to change without notice.  
Visit http://www.vicorpower.com/ac-dc/converters/isolated-ac-dc-converter-pfc for the latest product information.  
Vicor’s Standard Terms and Conditions and Product Warranty  
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage  
(http://www.vicorpower.com/termsconditionswarranty) or upon request.  
Life Support Policy  
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE  
EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used  
herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and  
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to  
result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform  
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms  
and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies  
Vicor against all liability and damages.  
Intellectual Property Notice  
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the  
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property  
rights is granted by this document. Interested parties should contact Vicor’s Intellectual Property Department.  
The products described on this data sheet are protected by the following U.S. Patents Numbers:  
Patents Pending.  
Contact Us: http://www.vicorpower.com/contact-us  
Vicor Corporation  
25 Frontage Road  
Andover, MA, USA 01810  
Tel: 800-735-6200  
Fax: 978-475-6715  
www.vicorpower.com  
email  
Customer Service: custserv@vicorpower.com  
Technical Support: apps@vicorpower.com  
©2017 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation.  
All other trademarks, product names, logos and brands are property of their respective owners.  
PFM™ in a VIA Package  
Page 25 of 25  
Rev 1.0  
11/2017  

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