SI2323CDS [VISHAY]
P-Channel 20 V (D-S) MOSFET; P沟道20 V （D -S ）的MOSFET
| 型号： | SI2323CDS |
| 厂家： | 
VISHAY |
| 描述： | P-Channel 20 V (D-S) MOSFET |
| 文件： | 总4页 (文件大小：166K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SPICE Device Model Si2323CDS
Vishay Siliconix
P-Channel 20 V (D-S) MOSFET
DESCRIPTION
CHARACTERISTICS
The attached SPICE model describes the typical electrical
characteristics of the p-channel vertical DMOS. The
subcircuit model is extracted and optimized over the - 55 °C
to + 125 °C temperature ranges under the pulsed 0 V to 5 V
gate drive. The saturated output impedance is best fit at the
gate bias near the threshold voltage. A novel gate-to-drain
feedback capacitance network is used to model the gate
charge characteristics while avoiding convergence
difficulties of the switched Cgd model. All model parameter
values are optimized to provide a best fit to the measured
electrical data and are not intended as an exact physical
interpretation of the device.
• P-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the - 55 °C to + 125 °C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse
Recovery Characteristics
SUBCIRCUIT MODEL SCHEMATIC
D
C
GD
R
M
1
2
3
DBD
Gy
Gx
–
+
G
R
G
M
1
ETCV
C
GS
S
Note
This document is intended as a SPICE modeling guideline and does not constitute a commercial product datasheet. Designers should refer to
the appropriate datasheet of the same number for guaranteed specification limits.
Document Number: 66540
S10-0749-Rev. A, 05-Apr-10
www.vishay.com
1
SPICE Device Model Si2323CDS
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
SIMULATED MEASURED
PARAMETER
SYMBOL
TEST CONDITIONS
DATA
DATA
UNIT
Static
Gate-Source Threshold Voltage
VGS(th)
RDS(on)
VDS = VGS, ID = - 250 μA
VGS = - 4.5 V, ID = - 4.6 A
VGS = - 2.5 V, ID = - 4.1 A
VDS = - 5 V, ID = - 4.6 A
IS = - 3.7 A
0.75
0.032
0.039
18
-
V
0.032
0.041
20
Drain-Source On-State Resistancea
Forward Transconductancea
Diode Forward Voltage
Dynamicb
gfs
S
V
VSD
- 0.75
- 0.80
Input Capacitance
Ciss
Coss
Crss
1080
157
136
12
1090
155
135
16
Output Capacitance
Reverse Transfer Capacitance
VDS = - 10 V, VGS = 0 V, f = 1 MHz
VDS = - 10 V, VGS = - 4.5 V, ID = - 4.6 A
pF
nC
Total Gate Charge
Qg
7.7
9
Gate-Source Charge
Gate-Drain Charge
Qgs
Qgd
VDS = - 10 V, VGS = - 2.5 V, ID = - 4.6 A
2.5
2.5
3.2
3.2
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %.
b. Guaranteed by design, not subject to production testing.
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2
Document Number: 66540
S10-0749-Rev. A, 05-Apr-10
SPICE Device Model Si2323CDS
Vishay Siliconix
COMPARISON OF MODEL WITH MEASURED DATA TJ = 25 °C, unless otherwise noted
4
3
2
1
0
20
15
10
5
T
= 125 °C
J
V
= 5 V, 4 V, 3.5 V, 3 V, 2.5 V
GS
T
= 25 °C
J
V
= 2 V
GS
T
= - 55 °C
J
0
0.0
0.3
0.6
0.9
1.2
1.5
0.0
0.5
V
1.0
1.5
2.0
V
- Gate-to-Source Voltage (V)
- Drain-to-Source Voltage (V)
GS
DS
0.10
0.08
0.06
0.04
0.02
0.00
2250
1800
1350
900
450
0
C
iss
V
= 2.5 V
= 4.5 V
GS
V
GS
C
oss
C
rss
0
5
10
15
20
0
5
10
15
20
I
- Drain Current (A)
V
DS
- Drain-to-Source Voltage (V)
D
100
10
1
5
4
3
2
1
0
I
= 4.6 A
D
V
= 10 V
DS
T
= 150 °C
J
V
= 24 V
DS
T
= 25 °C
J
0.1
0
4
8
12
16
20
0
0.3
V
0.6
0.9
1.2
Q
- Total Gate Charge (nC)
- Source-to-Drain Voltage (V)
g
SD
Note
Dots and squares represent measured data.
Document Number: 66540
S10-0749-Rev. A, 05-Apr-10
www.vishay.com
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Document Number: 91000
Revision: 18-Jul-08
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1
相关型号：
SI2323DDS-T1-GE3
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