SI4459ADY_13 [VISHAY]

P-Channel 30-V (D-S) MOSFET; P通道30 -V (D -S )的MOSFET
SI4459ADY_13
型号: SI4459ADY_13
厂家: VISHAY    VISHAY
描述:

P-Channel 30-V (D-S) MOSFET
P通道30 -V (D -S )的MOSFET

文件: 总10页 (文件大小:255K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Si4459ADY  
Vishay Siliconix  
P-Channel 30-V (D-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
Halogen-free According to IEC 61249-2-21  
Definition  
VDS (V)  
RDS(on) ()  
Qg (Typ.)  
I
D (A)d  
TrenchFET® Power MOSFET  
100 % Rg and UIS Tested  
0.005 at VGS = - 10 V  
- 29  
- 23  
- 30  
61 nC  
0.00775 at VGS = - 4.5 V  
Compliant to RoHS Directive 2002/95/EC  
APPLICATIONS  
Adaptor Switch  
Notebook  
SO-8  
S
S
S
S
G
1
2
3
4
8
7
6
5
D
D
G
D
D
Top View  
D
Ordering Information: Si4459ADY-T1-GE3 (Lead (Pb)-free and Halogen-free)  
P-Channel MOSFET  
ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted)  
A
Parameter  
Symbol  
VDS  
Limit  
- 30  
Unit  
Drain-Source Voltage  
Gate-Source Voltage  
V
VGS  
20  
T
C = 25 °C  
TC = 70 °C  
A = 25 °C  
TA = 70 °C  
- 29  
- 23.5  
- 19.7a, b  
- 15.6a, b  
- 70  
Continuous Drain Current (TJ = 150 °C)  
ID  
T
A
IDM  
IS  
Pulsed Drain Current  
- 6.5  
- 2.9a, b  
T
C = 25 °C  
Continuous Source-Drain Diode Current  
TA = 25 °C  
IAS  
Avalanche Current  
- 30  
L = 0.1 mH  
EAS  
Single-Pulse Avalanche Energy  
45  
mJ  
W
T
T
T
C = 25 °C  
C = 70 °C  
A = 25 °C  
7.8  
5
PD  
Maximum Power Dissipation  
3.5a, b  
2.2a, b  
- 55 to 150  
TA = 70 °C  
TJ, Tstg  
Operating Junction and Storage Temperature Range  
°C  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
RthJA  
RthJF  
Typical  
29  
13  
Maximum  
35  
16  
Unit  
Maximum Junction-to-Ambienta, c  
t 10 s  
Steady State  
°C/W  
Maximum Junction-to-Foot  
Notes:  
a. Surface mounted on 1" x 1" FR4 board.  
b. t = 10 s.  
c. Maximum under steady state conditions is 80 °C/W.  
d. Based on TC = 25 °C.  
Document Number: 69979  
S11-1813-Rev. B, 12-Sep-11  
www.vishay.com  
1
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si4459ADY  
Vishay Siliconix  
SPECIFICATIONS (T = 25 °C, unless otherwise noted)  
J
Parameter  
Symbol  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
Static  
VDS  
VDS/TJ  
VGS(th)/TJ  
VGS(th)  
VGS = 0 V, ID = - 250 µA  
ID = - 250 µA  
Drain-Source Breakdown Voltage  
- 30  
V
mV/°C  
V
V
DS Temperature Coefficient  
- 31  
5.3  
VGS(th) Temperature Coefficient  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
VDS = VGS, ID = - 250 µA  
- 1  
- 2.5  
100  
- 100  
- 75  
- 10  
- 3  
IGSS  
VDS = 0 V, VGS  
VDS = - 30 V, VGS = 0 V  
DS = - 20 V, VGS = 0 V  
DS = - 30 V, VGS = 0 V, TJ = 75 °C  
=
20 V  
nA  
V
IDSS  
Zero Gate Voltage Drain Current  
V
µA  
A
VDS = - 20 V, VGS = 0 V, TJ = 75 °C  
On-State Drain Currenta  
ID(on)  
RDS(on)  
gfs  
VDS - 10 V, VGS = - 10 V  
VGS = - 10 V, ID = - 15 A  
- 30  
0.0039  
0.0062  
24  
0.005  
Drain-Source On-State Resistancea  
Forward Transconductancea  
S
V
GS = - 4.5 V, ID = - 10 A  
0.00775  
VDS = - 10 V, ID = - 15 A  
Dynamicb  
Ciss  
Coss  
Crss  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
6000  
860  
790  
129  
61  
VDS = - 15 V, VGS = 0 V, f = 1 MHz  
pF  
V
DS = - 15 V, VGS = - 10 V, ID = - 20 A  
DS = - 15 V, VGS = - 4.5 V, ID = - 20 A  
f = 1 MHz  
195  
95  
Qg  
Total Gate Charge  
nC  
Qgs  
Qgd  
Rg  
V
Gate-Source Charge  
Gate-Drain Charge  
Gate Resistance  
Turn-On Delay Time  
Rise Time  
16.5  
23.5  
3
0.6  
6
td(on)  
tr  
td(off)  
tf  
td(on)  
tr  
td(off)  
tf  
16  
30  
VDD = - 15 V, RL = 1.5   
16  
30  
ID - 10 A, VGEN = - 10 V, Rg = 1   
Turn-Off DelayTime  
Fall Time  
80  
150  
40  
20  
ns  
Turn-On Delay Time  
Rise Time  
75  
150  
260  
120  
80  
VDD = - 15 V, RL = 1.5   
130  
60  
ID - 10 A, VGEN = - 4.5 V, Rg = 1   
Turn-Off DelayTime  
Fall Time  
40  
Drain-Source Body Diode Characteristics  
Continous Source-Drain Diode Current  
Pulse Diode Forward Current  
IS  
ISM  
VSD  
trr  
TC = 25 °C  
- 29  
- 70  
- 1.2  
130  
150  
A
Body Diode Voltage  
IS = - 3 A, VGS = 0 V  
- 0.71  
67  
V
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Reverse Recovery Fall Time  
ns  
nC  
Qrr  
ta  
74  
IF = - 5 A, dI/dt = 100 A/µs, TJ = 25 °C  
22  
ns  
Reverse Recovery Rise Time  
tb  
45  
Notes:  
a. Pulse test; pulse width 300 µs, duty cycle 2 %.  
b. Guaranteed by design, not subject to production testing.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
www.vishay.com  
2
Document Number: 69979  
S11-1813-Rev. B, 12-Sep-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si4459ADY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
4.0  
3.2  
2.4  
1.6  
0.8  
0.0  
70  
56  
42  
28  
14  
0
V
= 10 thru 4 V  
GS  
T
= 125 °C  
= 25 °C  
C
V
= 3 V  
GS  
T
C
T
C
= - 55 °C  
3.2  
0
1
2
3
4
5
0.0  
0.8  
1.6  
2.4  
4.0  
V
- Drain-to-Source Voltage (V)  
DS  
V
- Gate-to-Source Voltage (V)  
GS  
Output Characteristics  
Transfer Characteristics  
0.008  
0.007  
0.006  
0.005  
0.004  
0.003  
9000  
7200  
5400  
3600  
1800  
0
C
V
= 4.5 V  
iss  
GS  
V
= 10 V  
GS  
C
oss  
C
rss  
0
6
12  
18  
24  
30  
0
14  
28  
42  
56  
70  
V
DS  
- Drain-to-Source Voltage (V)  
I
- Drain Current (A)  
D
On-Resistance vs. Drain Current  
Capacitance  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
10  
8
I
= 20 A  
D
I
= 15 A  
D
V
= 10 V  
DS  
V
GS  
= 10 V  
V
= 15 V  
DS  
V
DS  
= 20 V  
6
V
= 4.5 V  
GS  
4
2
0
- 50 - 25  
0
25  
50  
75  
100 125 150  
0
30  
60  
90  
120  
150  
T
J
- Junction Temperature (°C)  
Q
- Total Gate Charge (nC)  
g
Gate Charge  
On-Resistance vs. Junction Temperature  
Document Number: 69979  
S11-1813-Rev. B, 12-Sep-11  
www.vishay.com  
3
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si4459ADY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
0.030  
0.024  
0.018  
0.012  
0.006  
0.000  
100  
10  
1
I
= 15 A  
D
T
= 150 °C  
T
= 25 °C  
J
J
0.1  
0.01  
T
= 125 °C  
J
T
= 25 °C  
J
0.001  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
0
2
4
6
8
10  
V
- Source-to-Drain Voltage (V)  
V
- Gate-to-Source Voltage (V)  
SD  
GS  
Source-Drain Diode Forward Voltage  
On-Resistance vs. Gate-to-Source Voltage  
0.8  
0.6  
200  
160  
120  
80  
I
= 250 µA  
D
0.4  
I
= 5 mA  
D
0.2  
0.0  
40  
- 0.2  
- 0.4  
0
- 50 - 25  
0
25  
50  
75  
100 125 150  
0.001  
0.01  
0.1  
1
10  
Time (s)  
T
J
- Temperature (°C)  
Threshold Voltage  
Single Pulse Power, Junction-to-Ambient  
100  
Limited by R  
*
DS(on)  
1 ms  
10  
10 ms  
1
100 ms  
1 s  
10 s  
0.1  
DC  
BVDSS  
T
A
= 25 °C  
Single Pulse  
0.01  
0.01  
0.1  
1
10  
100  
V
DS  
- Drain-to-Source Voltage (V)  
* V > minimum V at which R is specified  
DS(on)  
GS  
GS  
Safe Operating Area  
www.vishay.com  
4
Document Number: 69979  
S11-1813-Rev. B, 12-Sep-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si4459ADY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
35  
28  
21  
14  
7
0
0
25  
50  
75  
100  
125  
150  
T
C
- Case Temperature (°C)  
Current Derating*  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
10  
8
6
4
2
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
T
C
- Case Temperature (°C)  
T
C
- Case Temperature (°C)  
Power, Junction-to-Foot  
Power Derating, Junction-to-Ambient  
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper  
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package  
limit.  
Document Number: 69979  
S11-1813-Rev. B, 12-Sep-11  
www.vishay.com  
5
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Si4459ADY  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
1
Duty Cycle = 0.5  
0.2  
Notes:  
0.1  
0.1  
P
DM  
0.05  
t
1
t
2
t
t
1
2
1. Duty Cycle, D =  
0.02  
2. Per Unit Base = R  
= 80 °C/W  
thJA  
(t)  
3. T - T = P  
JM  
Z
A
DM thJA  
Single Pulse  
4. Surface Mounted  
0.01  
-3  
-2  
-1  
10  
10  
10  
1
10  
100  
1000  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Ambient  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
Single Pulse  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Foot  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see www.vishay.com/ppg?69979.  
www.vishay.com  
6
Document Number: 69979  
S11-1813-Rev. B, 12-Sep-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Package Information  
Vishay Siliconix  
SOIC (NARROW): 8-LEAD  
JEDEC Part Number: MS-012  
8
6
7
2
5
4
E
H
1
3
S
h x 45  
D
C
0.25 mm (Gage Plane)  
A
All Leads  
0.101 mm  
q
e
B
A
1
L
0.004"  
MILLIMETERS  
Max  
INCHES  
DIM  
A
Min  
Min  
Max  
1.35  
0.10  
0.35  
0.19  
4.80  
3.80  
1.75  
0.20  
0.51  
0.25  
5.00  
4.00  
0.053  
0.004  
0.014  
0.0075  
0.189  
0.150  
0.069  
0.008  
0.020  
0.010  
0.196  
0.157  
A1  
B
C
D
E
e
1.27 BSC  
0.050 BSC  
H
h
5.80  
0.25  
0.50  
0°  
6.20  
0.50  
0.93  
8°  
0.228  
0.010  
0.020  
0°  
0.244  
0.020  
0.037  
8°  
L
q
S
0.44  
0.64  
0.018  
0.026  
ECN: C-06527-Rev. I, 11-Sep-06  
DWG: 5498  
Document Number: 71192  
11-Sep-06  
www.vishay.com  
1
VISHAY SILICONIX  
TrenchFET® Power MOSFETs  
Application Note 808  
Mounting LITTLE FOOT®, SO-8 Power MOSFETs  
Wharton McDaniel  
0.288  
7.3  
Surface-mounted LITTLE FOOT power MOSFETs use  
integrated circuit and small-signal packages which have  
0.050  
1.27  
0.088  
2.25  
been been modified to provide the heat transfer capabilities  
required by power devices. Leadframe materials and  
design, molding compounds, and die attach materials have  
been changed, while the footprint of the packages remains  
the same.  
0.088  
2.25  
0.027  
0.69  
0.078  
1.98  
0.2  
5.07  
See Application Note 826, Recommended Minimum Pad  
Patterns With Outline Drawing Access for Vishay Siliconix  
MOSFETs, (http://www.vishay.com/ppg?72286), for the  
basis of the pad design for a LITTLE FOOT SO-8 power  
MOSFET. In converting this recommended minimum pad  
to the pad set for a power MOSFET, designers must make  
two connections: an electrical connection and a thermal  
connection, to draw heat away from the package.  
Figure 2. Dual MOSFET SO-8 Pad Pattern  
With Copper Spreading  
The minimum recommended pad patterns for the  
single-MOSFET SO-8 with copper spreading (Figure 1) and  
dual-MOSFET SO-8 with copper spreading (Figure 2) show  
the starting point for utilizing the board area available for the  
heat-spreading copper. To create this pattern, a plane of  
copper overlies the drain pins. The copper plane connects  
the drain pins electrically, but more importantly provides  
planar copper to draw heat from the drain leads and start the  
process of spreading the heat so it can be dissipated into the  
ambient air. These patterns use all the available area  
underneath the body for this purpose.  
In the case of the SO-8 package, the thermal connections  
are very simple. Pins 5, 6, 7, and 8 are the drain of the  
MOSFET for a single MOSFET package and are connected  
together. In a dual package, pins 5 and 6 are one drain, and  
pins 7 and 8 are the other drain. For a small-signal device or  
integrated circuit, typical connections would be made with  
traces that are 0.020 inches wide. Since the drain pins serve  
the additional function of providing the thermal connection  
to the package, this level of connection is inadequate. The  
total cross section of the copper may be adequate to carry  
the current required for the application, but it presents a  
large thermal impedance. Also, heat spreads in a circular  
fashion from the heat source. In this case the drain pins are  
the heat sources when looking at heat spread on the PC  
board.  
Since surface-mounted packages are small, and reflow  
soldering is the most common way in which these are  
affixed to the PC board, “thermal” connections from the  
planar copper to the pads have not been used. Even if  
additional planar copper area is used, there should be no  
problems in the soldering process. The actual solder  
connections are defined by the solder mask openings. By  
combining the basic footprint with the copper plane on the  
drain pins, the solder mask generation occurs automatically.  
0.288  
7.3  
0.050  
1.27  
0.196  
5.0  
A final item to keep in mind is the width of the power traces.  
The absolute minimum power trace width must be  
determined by the amount of current it has to carry. For  
thermal reasons, this minimum width should be at least  
0.020 inches. The use of wide traces connected to the drain  
plane provides a low impedance path for heat to move away  
from the device.  
0.027  
0.69  
0.078  
1.98  
0.2  
5.07  
Figure 1. Single MOSFET SO-8 Pad  
Pattern With Copper Spreading  
Document Number: 70740  
Revision: 18-Jun-07  
www.vishay.com  
1
Application Note 826  
Vishay Siliconix  
RECOMMENDED MINIMUM PADS FOR SO-8  
0.172  
(4.369)  
0.028  
(0.711)  
0.022  
0.050  
(0.559)  
(1.270)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
Return to Index  
www.vishay.com  
22  
Document Number: 72606  
Revision: 21-Jan-08  
Legal Disclaimer Notice  
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Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all  
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,  
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular  
purpose, non-infringement and merchantability.  
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical  
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements  
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular  
product with the properties described in the product specification is suitable for use in a particular application. Parameters  
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All  
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,  
including but not limited to the warranty expressed therein.  
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining  
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.  
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please  
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by  
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.  
Material Category Policy  
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the  
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council  
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment  
(EEE) - recast, unless otherwise specified as non-compliant.  
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that  
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.  
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free  
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference  
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21  
conform to JEDEC JS709A standards.  
Revision: 02-Oct-12  
Document Number: 91000  
1

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Si4461-B1B-FM

Version 1.2 of the Si4464-63-61-60 datasheet is now available
SILICON

Si4461-Bxx-FM

HIGH-PERFORMANCE, LOW-CURRENT TRANSCEIVER
SILICON

SI4462DY

N-Channel 200-V (D-S) MOSFET
VISHAY

SI4462DY-T1

TRANSISTOR 1150 mA, 200 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, SOP-8, FET General Purpose Small Signal
VISHAY

SI4462DY-T1-GE3

TRANSISTOR 1150 mA, 200 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, HALOGEN FREE AND ROHS COMPLIANT, SOP-8, FET General Purpose Small Signal
VISHAY