SI7738DP [VISHAY]
Dual N-Channel 150-V (D-S) MOSFET; 双N沟道150 -V （D -S ）的MOSFET
| 型号： | SI7738DP |
| 厂家： | 
VISHAY |
| 描述： | Dual N-Channel 150-V (D-S) MOSFET |
| 文件： | 总4页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SPICE Device Model Si7738DP
Vishay Siliconix
Dual N-Channel 150-V (D-S) MOSFET
CHARACTERISTICS
• N-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the −55 to 125°C
temperature ranges under the pulsed 0-V to 10-V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
www.vishay.com
Document Number: 68126
S-80743⎯Rev. A, 14-Apr-08
1
SPICE Device Model Si7738DP
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)
Simulated
Data
Measured
Data
Parameter
Symbol
Test Condition
Unit
Static
Gate Threshold Voltage
VGS(th)
rDS(on)
gfs
2.8
0.031
17
V
V
DS = VGS, ID = 250 μA
VGS = 10 V, ID = 7.7 A
VDS = 15 V, ID = 7.7 A
IS = 6.2 A
Drain-Source On-State Resistancea
Forward Transconductancea
Body Diode Voltage
0.031
22
Ω
S
V
VSD
0.90
0.80
Dynamicb
Input Capacitance
Ciss
Coss
Crss
Qg
2040
163
42
34
8
2100
160
45
35
8
V
DS = 75 V, VGS = 0 V, f = 1 MHz
pF
nC
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDS = 75 V, VGS = 10 V, ID = 7.7 A
Qgs
Qgd
9
9
Notes
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2%.
b. Guaranteed by design, not subject to production testing.
www.vishay.com
Document Number: 68126
2
S-80743⎯Rev. A, 14-Apr-08
SPICE Device Model Si7738DP
Vishay Siliconix
COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)
www.vishay.com
Document Number: 68126
3
S-80743⎯Rev. A, 14-Apr-08
Legal Disclaimer Notice
Vishay
Disclaimer
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Document Number: 91000
Revision: 18-Jul-08
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1
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