SI8901EDB [VISHAY]
Bi-Directional P-Channel 20-V (D-S) MOSFET; 双向P通道20 -V （D -S ）的MOSFET
| 型号： | SI8901EDB |
| 厂家： | 
VISHAY |
| 描述： | Bi-Directional P-Channel 20-V (D-S) MOSFET |
| 文件： | 总3页 (文件大小：217K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SPICE Device Model Si8901EDB
Vishay Siliconix
Bi-Directional P-Channel 20-V (D-S) MOSFET
CHARACTERISTICS
• P-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the p-channel vertical DMOS. The subcircuit
mode is extracted and optimized over the −55 to 125°C temperature
ranges under the pulsed 0-to-5V gate drive. The saturated output
impedance is best fit at the gate bias near the threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 72950
19-Apr-04
www.vishay.com
1
SPICE Device Model Si8901EDB
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)
Simulated Measured
Parameter
Symbol
Test Conditions
Unit
Data
Data
Static
Gate Threshold Voltage
On-State Drain Currentb
VGS(th)
ID(on)
0.49
42
V
A
V
SS = VGS, ID = − 250µA
VSS = − 5V, VGS = − 4.5V
0.046
0.060
0.075
6.2
0.048
0.062
0.081
7
VGS = − 4.5V, ISS = − 1A
VGS = − 2.5V, ISS = − 1A
VGS = − 1.8V, ISS = − 1A
Drain-Source On-State Resistanceb
rDS(on)
Ω
Forward Transconductanceb
gfs
S
VSS = −10V, ISS = − 1A
Dynamica
Turn-On Delay Time
td(on)
tr
td(off)
tf
2
2
2.3
2.2
1.3
9
Rise Time
V
SS = − 10V, RL = 10Ω
µs
I
SS ≅ − 1A, VGEN = − 4.5V, RG = 6Ω
Turn-Off Delay Time
Fall Time
2.1
7
Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%.
www.vishay.com
2
Document Number: 72950
19-Apr-04
SPICE Device Model Si8901EDB
Vishay Siliconix
COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)
Document Number: 72950
19-Apr-04
www.vishay.com
3
相关型号：
SI8901EDB-T2-E3
TRANSISTOR 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, MICRO FOOT, CSP-6, FET General Purpose Small Signal
VISHAY
SI8902B-A01-GSR
ADC, Successive Approximation, 10-Bit, 1 Func, 3 Channel, Serial Access, CMOS, PDSO16, SOIC-16
SILICON
SI8902D-A01-GSR
ADC, Successive Approximation, 10-Bit, 1 Func, 3 Channel, Serial Access, CMOS, PDSO16, SOIC-16
SILICON
SI8902EDB-T1
TRANSISTOR 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MICRO FOOT, CSP-6, FET General Purpose Small Signal
VISHAY
©2020 ICPDF网 联系我们和版权申明