SI9113DY [VISHAY]
Switching Regulator/Controller,;
| 型号： | SI9113DY |
| 厂家： | 
VISHAY |
| 描述： | Switching Regulator/Controller, 综合业务数字网 高压 控制器 |
| 文件： | 总10页 (文件大小：91K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si9113
New Product
Vishay Siliconix
High-Voltage Current Mode PWM Controller for
ISDN Power Supplies
FEATURES
D BiC/DMOS Technology
D Soft-Start
D Internal Start-Up Circuit
D Power_Good Output
D Current Mode Control
D 0.6-V Fast Over-Current Protection
D <5-mA Supply Current for +VIN <18 V
D 23.5-V to 200-V Input Voltage Range
D Programmable Start/Stop Capability
D Max 50% Duty Cycle Operation
D 1.3-MHz Error Amp
D Up to 500-kHz Internal Oscillator
DESCRIPTION
Si9113 is a current mode PWM controller for ISDN power
supplies. In a 14-pin SOIC package, it provides all necessary
functions to implement a single-switch PWM with a minimum
of external parts. To maximize the circuit integration, the
Si9113 is designed with a 200-V depletion mode MOSFET
capable of powering directly off the high input bus without an
external start-up circuit. The Start and Stop input voltage
thresholds can be programmed within the operating input
voltage range by means of a resistor divider, provided +VIN
(Start) > +VIN (Stop). The internal clock frequency is set with
a single external resistor and is capable of capacitor-coupled
external synchronization. In order to satisfy the stringent
ambient temperature requirements, the Si9113 is rated to
handle the industrial range of –40_C to 85_C.
FUNCTIONAL BLOCK DIAGRAM
V
IN
(23.5 V to 200 V)
V
OUT
Start-Up
Drive
Current
Stop/Start
Comparator
Power_Good
V
REF
= 1.3 V
Fast
Current
Limit
Comparator
For Detailed Block Diagram See Page 7
.
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
1
Si9113
New Product
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
IN
Power Dissipation (Package)a
V
CC
b
14-Pin SOIC (Y Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Logic Inputs (OSC IN, OSC OUT, PWR_GOOD) . . . –0.3 V to V + 0.3 V
CC
Thermal Impedance (Q
)
JA
or "10 mA
14-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
Linear Inputs (FB, V
, SENSE, SS) . . . . . . . . . . . . –0.3 V to V + 0.3 V
CC
REF
Notes
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 to 85_C
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.2 mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
ofthe device at these or any other conditions beyond those indicated in the operational sections ofthespecificationsisnotimplied. Exposuretoabsolutemaximumrating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23.5 V to 200 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 14 V
Linear Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V – 3 V
CC
IN
F
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 kHz to 500 kHz
CC
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
CC
a
SPECIFICATIONS
Limits
Test Conditions
Unless Otherwise Specified
–40 to 85_C
V
CC
= 10 V, +V = 48 V, R
= 390 kW
OSC
Parameter
Reference
Symbol
Tempb Minc
Typd
Maxc
Unit
IN
OSC = – V (OSC Disabled)
Room
Full
1.275
1.26
1.3
1.3
1.325
1.34
IN
IN
Output Voltage
V
REF
V
R
L
= 10 MW
Short Circuit Current
Load Regulation
Line Regulation
I
V
= –V
IN
Room
Full
–25
"10
"2
–10
40
5
mA
SREF
REF
I
= 0 to –0.5 mA
REF
DV
mV
REF
V
= 10 to 14 V
Full
CC
UVLO
V
Turn-On
Turn-Off
Full
8.10
8.10
8.8
8.8
9.50
9.50
0.05
0.05
9.5
UVSTART
Under Voltage Lockout
V
V
Full
UVSTOP
I
Room
Room
Room
Room
Room
START
Input Bias Current
V
STOP
= 8 V, V
= 8 V
mA
START
I
STOP
Pre-Regulated V
V
REG
8.5
7.9
0.3
9.0
8.4
0.6
CC
UVLO for V
V
CCUV
8.9
V
CC
V
REG
– V
VD
CCUV
PWR_Good Comparator
Rise Time
t
Room
Room
Room
35
25
mS
mS
V
rpg
C
= 100 nF
PWR_Good
Fall Time
t
fpg
Output Logic Low
I
= 2.5 mA
0.4
0.8
SINK
Soft-Start
SS Current
I
Room
Room
11
mA
SS
Output Inhibit Voltage
V
3.3
V
SS
Oscillator
e
Maximum Frequency
f
R
= 0
Room
Room
Room
Room
Full
500
80
MAX
OSC
R
= 390 k (Note f)
100
200
10
120
240
15
kHz
OSC
Initial Accuracy
f
OSC
)
R
OSC
= 180 k (Note f
160
Voltage Stability
Df/f
Df/f = (f [14 V] – f [10 V]) / f [10 V]
%
ppm/_C
%
e
Temperature Coefficient
T
450
50
650
OSC
Maximum Duty Cycle
D
MAX
f
= 100 kHz
Room
OSC
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
2
Si9113
New Product
Vishay Siliconix
a
SPECIFICATIONS
Limits
Test Conditions
Unless Otherwise Specified
–40 to 85_C
V
CC
= 10 V, +V = 48 V, R
= 390 kW
Parameter
Symbol
Tempb Minc
Typd
Maxc
Unit
IN
OSC
Error Amplifier
e
Open Loop Voltage Gain
A
OSC IN = – V
Room
Room
Full
50
–1
60
dB
mA
VOL
IN
Input BIAS Current
I
V
FB
= 1.3 V
1
1.32
2
BIAS
Feedback Input Voltage
V
FB Tied to COMP, OSC IN = – V
1.28
V
FB
IN
e
Dynamic Output Impedance
Z
OUT
Room
Room
Room
Room
Room
1
1.3
–5
kW
MHz
e
Unity Gain Bandwidth
BW
1
Source V = 0.8 V
–1
FB
Output Current
I
mA
dB
OUT
Sink V = 1.8 V
0.12
50
0.15
70
FB
e
Power Supply Rejection
PSRR
Current Limit Comparator
Threshold Voltage
V
V
= 0 V
Full
Full
0.5
0.6
0.7
V
SOURCE
FB
e
Delay to Output
t
d
V
= 0.85 V, See Figure 1
100
150
ns
SENSE
Output Drive
Room
Full
9.7
9.5
Output High Voltage
V
I
= –10 mA
= 10 mA
OH
OUT
V
Room
Full
0.3
0.5
Output Low Voltage
V
I
OUT
OL
Rise Time
Fall Time
t
Room
Room
40
40
75
75
r
C
= 500 pF
L
ns
(10% to 90%)
t
f
Supply
V
CC
V
= 10 V, R
= 390 kW
OSC
I
Full
1
1.4
mA
CC
vV v 200 V
UVUP
IN
Supply Current
Excluding I From Resistive Divider of
Stop and Start Pins
I
I
Room
Room
75
2
100
5
VIN
mA
Supply Current UVLO Mode
Notes
+V v 18 V, V
(Pin 14) < 8.8 V
START
VIN
IN
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Full = –40 to 85_C.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f.
C
STRAY
Pin 8 = v 5 pF.
TIMING WAVEFORMS
0.85 V –
50%
SENSE
t v 10 ns
r
0
t
d
V
CC
90%
OUTPUT
0 –
FIGURE 1. Delay Time for Current Sense
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
3
Si9113
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
V
vs. Temperature (V = 48 V)
V
/V
vs. Temperature
REF
IN
UVSTART UVSTOP
1.306
1.304
1.302
1.300
1.298
9.1
9.0
8.9
8.8
8.7
8.6
8.5
8.4
V
CC
= 14 V
V
CC
= 12 V
V
= 10 V
CC
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
Temperature (_C)
Temperature (_C)
Output Frequency vs. Oscillator Resistance
Supply Current vs. Output Frequency
2.0
1.6
1.2
0.8
0.4
0
300
100
V
CC
= 10 V
V
CC
= 14 V
V
CC
= 10 V
V
CC
= 12 V
10
0
50
100
150
(kHz)
200
250
300
10
100
1000 2000
F
OSC
(kW)
F
OUT
Output Frequency vs. Supply Voltage
Soft-Start Current vs. Temperature
24
22
20
18
16
14
13
12
11
10
9
R
OSC
= 1 MW
V
CC
= 10 V
85_C
25_C
–40_C
8
7
9
10
11
12
(V)
13
14
15
–40
–20
0
20
40
60
80
100
V
Temperature (_C)
CC
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
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Si9113
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
UVLO Supply Current vs. V
Output Rise Time vs. Load
IN
80
60
40
20
0
10
V
CC
= 10 V
85_C
1
25_C
–40_C
0.1
11
13
15
17
19
21
0
200
400
OUT
600
800
V
IN
(V)
C
(pF)
Efficiency vs. Output Power
90
80
70
60
50
40
30
20
10
V
IN
= 28 V
V
IN
= 48 V
V
IN
= 99 V
0
200
400
600
(mW)
800
1000
W
O
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
5
Si9113
New Product
Vishay Siliconix
PIN CONFIGURATION
SOIC-14
STOP
START
COMP
FB
1
2
3
4
5
6
7
14
13
12
11
10
9
ORDERING INFORMATION
V
IN
Part Number
Temperature Range
Package
SENSE
Si9113
PWR_GOOD
V
REF
Si9113DY
Bulk
–40 to 85_C
–V
IN
SS
Si9113DY-T1
Tape and Reel
DRIVER
OSC
OUT
V
CC
OSC
IN
8
Eval Kit
Temperature Range
Board Type
Top View
Si9113D1
Si9113D2
Surface Mount and
Thru-Hole
–10 to 70_C
PIN DESCRIPTION
Pin Number
Name
Function
1
2
STOP
+V
Set up the stop threshold of +V for V via resistive dividers
IN CC
Input voltage to UVLO and Start-Up circuitry
IN
3
SENSE
Current sense amplifier input for current mode control and OCP.
4
PWR_GOOD
Logic high PWR_Good signal indicates FB voltage is within regulation.
Ground pin
5
–V
IN
6
DRIVER
MOSFET gate drive signal.
7
V
CC
Supply voltage to internal circuitry and MOSFET gate drive.
8
OSC
R
OSC
R
OSC
terminal
IN
9
OSC
terminal, square waveform output
OUT
10
11
12
13
14
SS
Soft-Start, time programmed by capacitor value.
1.3-V reference. Decoupled with 0.1-mF capacitor.
Inverting input of an error amplifier.
V
REF
FB
COMP
START
Error amplifier output for external compensation network.
Set up the start threshold of +V for V via resistive dividers
IN
CC
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
6
Si9113
New Product
Vishay Siliconix
DETAILED BLOCK DIAGRAM
8
OSCIN
13
9
COMP
OSCOUT
V
CC
OSC
Clock ( /
1
4
f
)
2
OSC
PWR_GOOD
FB
Error
Amplifier
3.6 V
PWM
12
11
–
+
Comparator
–
+
–
R
V
REF
+
Q
MOS Driver
6
S
+
–
DRIVER
Ref
C/L
5
Gen
–V
IN
Comparator
10
0.6 V
SS
3
SENSE
7
2
V
CC
V
IN
Start-Up
Pre-Regulator
Enable
1
Programmable
Start/Stop
Circuit
STOP
14
START
DETAILED DESCRIPTION
Start-Up
the internal reference VUVSTOP). The user can program the
+VIN START and +VIN STOP voltage with the external resistor
divider R3–R5 (see Figure 2) as follows:
The Si9113 start-up circuit prevents the internal circuits from
turning on until the voltage on the +VIN pin, via the resistor
divider R3, R4, R5, is sufficiently positive such that the voltage
across R3 (VSTART) is >8.8 V (typical value for the internal
reference VUVSTART [see Figure 2]). When this occurs, the
internal 1.3-V reference, soft-start and oscillator circuits are
enabled. A constant current source provides the current to the
external soft-start capacitor, which allows the output voltage to
rise gradually without overshoot. The output drive circuit is
disabled until the soft-start voltage reaches 3.3 V. The
controller is continuously powered in the state until the VIN
voltage falls and VSTOP drops below 8.8 V (the typical value for
+ ǒR ) R ) R5Ǔ
4
3
(1)
(2)
VIN(START)
VUVSTART
R5
+ ǒR3 ) R5Ǔ
VIN(STOP)
VUVSTOP
R5
Since VUVSTART = VUVSTOP = 8.8 V (typical) the hysteresis
voltage can be expressed as:
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
7
Si9113
New Product
Vishay Siliconix
period eliminating any chance of undesirable noise frequency.
+ ǒR4Ǔ
(3)
DVIN
VUVSTART
When the output load current decreases to 0 A, the controller
is forced to enter the pulse skipping mode. This is a natural
phenomenal for all controllers since the duty cycle cannot
decrease linearly to 0%.
R5
VCC Circuit
The depletion MOSFET process allows the Si9113 controller
to power directly from the high input bus voltage. Once
Error Amplifier
V
UVSTART is met, the pre-regulator start-up circuit generates
the 9.0-V VCC voltage. The VCC voltage is used internally to
power the IC as well as providing the drive current for the
external MOSFET. An internal VCC circuit is disabled once a
higher external voltage (X10 V) is applied to this pin. If VCC is
below VCCUV, the Si9113 will inhibit the driver output switching.
The error amplifier gain-bandwidth product and slew rate are
critical parameters which determine the transient response of
converter. The transient response is the function of both small
and large signal responses. The small signal response is
determinedby the converter closed loop bandwidth and phase
margin while the large signal is determined by the error
amplifier dv/dt and the inductor di/dt slew rate. Besides the
inductance value, the error amplifier determines the converter
response time. In order to minimize the response time, the
Si9113 is designed with 1.3-MHz error amplifier
gain-bandwidth product to generate the widest converter
bandwidth.
REF
The reference voltage of Si9113 is set at 1.3 V. The reference
voltage is internally connected to the non-inverting input of
error amplifier. The reference is decoupled with 0.1-mF
capacitor.
Current Limit
Soft-Start
Over current protection circuit is provided by monitoring the
voltage on the Sense pin. Once the current sense voltage
reaches 0.6V peak, the output drive stage is disabled for the
remainder of the clock cycle.
The soft-start circuit provides a constant 10-mA current to
external capacitor attached to SS pin. A constant soft-start
current forces a gradual increase in duty cycle which in turn
ensuresgradualoutputvoltagerisewithoutovershooting. The
soft-start time is programmed by the capacitance value.
Power_Good Comparator
Oscillator
The PWR_Good signal indicates the status of output voltage.
If the output voltage and VCC are within regulation, the
PWR_Goodsignalgeneratesalogichighoutputbymonitoring
the voltage on COMP and VCC pins. If either one is out of
regulation, a logic low PWR_Good signal is generated. The
capacitor at the PWR_Good pin determines the rise time of the
power good signal, once all the conditions are met for power
good. The PWR_Good signal is an open collector output
capable of sinking 2.5 mA.
The oscillator consists of a ring of CMOS inverters, capacitors,
and a capacitor discharge switch. An external resistor, ROSC
betweenthe OSCIN and OSCOUT pins sets thefrequency. The
maximum frequency is obtained when ROSC = 0 W.
frequency divider in the logic section limits the switch duty
cycle to 50% by locking the switching frequency to one-half of
the oscillator frequency.
,
A
PWM Mode
MOSFET Gate Drive
As the load and line voltage vary, the switching frequency
remains constant. The switching frequency is programmed by
the ROSC value as shown by the oscillator curve. In the PWM
mode, a duty cycle pulse is generated for each switching
The DRIVER pin is designed to drive the low-side n-channel
MOSFET. Typically, thedriverstageissizedtosinkandsource
200-mA of peak current when VCC = 12 V.
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
8
Si9113
New Product
Vishay Siliconix
TYPICAL APPLICATION CIRCUITS
T1
28 – 99 V
XFMR_EPC17
+V
IN
40 V
D2
BR1
1
4
3
1
2
AC
AC
+
–
+
ESIG
C1
22 mF
160 V
3
1
+
C10
2.2 mF
50 V
D4*
BZX84C43
NS2
DF02S
–V
IN
D1
R13
6
3
7
2.7 W
ESIG
COM
2
C4
1 mF
NP
5
NS3
9
3.3 V
D3
B130LB
C10
220 mF
10 V
C12
0.1 mF
8
C5
0.1 mF
R9
20 kW
COM
1
8
7
R1
1, 2, 5, 6
OSC
V
CC
IN
R10
13 kW
9
6
5
3
1 MW
Q01 Si3420DV
OSC
SS
DR
OUT
10
C7
4
GND
0.001 mF
11
12
13
4
3
2
C6
V
REF
PWR_G
ICS
0.1 mF
R1
1
FB
1 kW
COMP
START
V
IN
C9
220 pF
R2
14
1
R2
C8
STOP
2 W
300 kW 0.01 mF
1
/
2
W
Si9113
R3
5.1 MW
C3
100 pF
R4
1 MW
R5
3.96 MW
*Optional
FIGURE 2. Dual Output Flyback Converter with 2% Regulation for 3.3 V
( As used on Demo Board—DB1)
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
9
Si9113
New Product
Vishay Siliconix
TYPICAL APPLICATION CIRCUITS
T1
28 – 99 V
XFMR_EPC17
+V
IN
40 V
D2
BR1
4
4
3
1
2
AC
AC
+
–
+
ESIG
C1
22 mF
160 V
3
1
+
C10
2.2 mF
50 V
D4*
NS2
BZX84C43
DF02S
–V
IN
D1
COM
R13
2.7 W
5
2
3
8
ESIG
D3
NP
9
3.3 V
2
R9
89 kW
C4
1 mF
B130LB
NS3
6
+
C11
220 mF
10 V
C12
0.1 mF
NS1
1
R10
COM
1
12.7 kW
8
7
C5
0.1 mF
R1
1, 2, 5, 6
OSC
V
CC
IN
9
6
5
3
1 MW
Q01 Si3420DV
OSC
SS
DR
OUT
10
C7
4
GND
PWR_G
ICS
0.001 mF
11
12
13
4
3
2
C6
V
REF
0.1 mF
R11
FB
1 kW
COMP
START
V
IN
C9
470 pF
R2
14
1
R2
C8
STOP
2 W
300 kW 0.01 mF
1
/
2
W
Si9113
R3
5.1 MW
C3
100 pF
R4
1 MW
R5
3.96 MW
*Optional
FIGURE 3. Dual Output Flyback Converter with Moderately Regulated Outputs
(As used on Demo Board DB-2)
Document Number: 71093
S-99453—Rev. A . 29-Nov-99
www.siliconix.com S FaxBack 408-970-5600
10
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