SI9185DMP-50-T1-E3 [VISHAY]
Regulator, 1 Output, CMOS, PDSO8,;
| 型号： | SI9185DMP-50-T1-E3 |
| 厂家： | 
VISHAY |
| 描述： | Regulator, 1 Output, CMOS, PDSO8, 光电二极管 |
| 文件： | 总13页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si9185
Vishay Siliconix
Micropower 500 mA CMOS LDO Regulator
with Error Flag/Power-On-Reset
DESCRIPTION
FEATURES
The Si9185 is a 500 mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si9185 offers line/load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO
regulators, and is designed to drive lower cost ceramic, as
well as tantalum, output capacitors. An external noise
bypass capacitor connected to the device’s CNOISE pin will
lower the LDO’s output noise for low noise applications. The
Si9185 also includes an out-of-regulation error flag. If a
capacitor is connected to the device’s delay pin, the error
flag output pin will generate a delayed power-on-reset
signal. The device is guaranteed stable from maximum load
current down to 0 mA load.
•
•
•
•
•
•
•
•
•
•
Input voltage 2 V to 6 V
Low 150 mV dropout at 500 mA load
Guaranteed 500 mA output current
Uses low ESR ceramic output capacitor
Fast load and line transient response
Only 100 µVRMS noise with noise bypass capacitor
1 µA maximum shutdown current
Built-in short circuit and thermal protection
Out-of-regulation error flag (power good or POR)
Fixed 1.215 V, 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V, 5.0 V, or
adjustable output voltage options
Other output voltages available by special order
1.1 W power dissipation
Thin, thermally enhanced MLP33 PowerPAK® package
Compliant to RoHS directive 2002/95/EC
•
•
•
•
The Si9185 is available in both standard and lead (Pb)-free
MLP33 PowerPAK packages and is specified to operate
over the industrial temperature range of - 40 °C to 85 °C.
MLP33 PowerPAK packaging allows enhanced heat transfer
to the PC board.
APPLICATIONS
•
•
•
•
Laptop and palm computers
Desktop computers
Cellular phones
PDA, digital still cameras
TYPICAL APPLICATIONS CIRCUITS
1
8
7
6
5
1
2
3
4
8
7
6
5
C
SD
ERROR
GND SENSE/ADJ
C
SD
NOISE
NOISE
2
DELAY
DELAY
ERROR
3
4
GND SENSE/ADJ
V
OUT
V
IN
V
OUT
V
IN
V
IN
V
OUT
V
OUT
V
IN
2.2 µF
GND
2.2 µF
2.2 µF
GND
2.2 µF
Si9185
Si9185
Figure 1. Fixed Output
Figure 2. Adjustable Output
1
2
3
4
8
7
6
5
SD
ON/OFF
POR
C
NOISE
DELAY
ERROR
0.1
F
0.1 µF
1 MΩ
GND SENSE/ADJ
V
OUT
V
IN
V
OUT
V
IN
2.2 µF
GND
2.2 µF
Si9185
Figure 3. Low Noise, Full Features Application
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
1
Si9185
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
6.5
Unit
Input Voltage, VIN
V
SD Input Voltage, VSD
- 0.3 to VIN
Output Current, IOUT
500 mA Continuous, Short Circuit Protected
- 0.3 to VO(nom) + 0.3
mA
V
Output Voltage, VOUT
Maximum Junction Temperature, TJ(max)
Storage Temperature, TSTG
ESD (Human Body Model)
Power Dissipationa
150
°C
- 55 to 150
2
2.5
50
4
kV
W
RΘJA
RΘJC
a
°C/W
Thermal Resistance (ΘJA
Notes:
)
a. Device Mounted with all leads soldered or welded to PC board. (PC board - 2" x 2", 4-layer, FR4, 0.25 square inch spreading copper).
b. Derate 20 mW/°C above TA = 25 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
V
Input Voltage, VIN
2 to 6
Output Voltage, VOUT (Adjustable Version)
1.215 to 5
25 to 150
- 40 to 85
- 40 to 125
R2
kΩ
°C
Operating Ambient Temperature, TA
Operating Junction Temperature, TJ
Notes:
C
C
IN = 2.2 µF, COUT = 2.2 µF (ceramic, X5R or X7R type), CNOISE = 0.1 µF (ceramic)
OUTRange = 1 µF to 10 µF ( 10 ꢀ, x5R or x7R type)
CIN ≥ COUT
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
IN = VOUT(nom) + 1 V, IOUT = 1 mA,
Limits
- 40 °C to 85 °C
V
Parameter
Symbol
Temp.a Min.b
Typ.c Max.b
Unit
CIN = 2.2 µF, COUT = 2.2 µF, VSD = 1.5 V
Output Voltage Range
Adjustable Version
Full
Room
Full
1.215
- 1.5
5
V
VOUT
1.5
2.5
Output Voltage Accuracy
(Fixed Versions)
1 mA ≤ IOUT ≤ 500 mA
ꢀ VO(nom)
- 2.5
Room
Full
1.191
1.179
1.215
1.239
1.251
Feedback Voltage
(ADJ Version)
VADJ
V
From VIN = VOUT + 1 V
to VOUT + 2 V
Line Regulation
(VADJ ≤ VOUT ≤ 4 V)
Full
- 0.18
- 0.18
0.18
ΔVOUT x 100
VIN x VOUT
ꢀ/V
Line Regulation
(4 V VOUT ≤ 5 V)
From VIN = 5.5 V to 6 V
IOUT = 10 mA
Full
0.18
20
Room
5
Dropout Voltaged
(at VOUT(nom) ≥ 2 V)
I
I
I
I
OUT = 200 mA
OUT = 500 mA
OUT = 200 mA
OUT = 500 mA
Room
Room
Full
145
320
215
480
600
175
400
480
VIN - VOUT
mV
Room
Room
Full
115
250
Dropout Voltaged
(at VOUT(nom) ≥ 2.5 V)
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
IN = VOUT(nom) + 1 V, IOUT = 1 mA,
Limits
- 40 °C to 85 °C
V
Parameter
Symbol
Temp.a Min.b Typ.c Max.b
Unit
CIN = 2.2 µF, COUT = 2.2 µF, VSD = 1.5 V
IOUT = 200 mA
IOUT = 500 mA
IOUT = 200 mA
Room
Room
Full
90
135
300
400
100
210
300
250
625
825
Dropout Voltaged
(at VOUT(nom) ≥ 3.3 V)
VIN - VOUT
200
Room
Room
Full
60
Dropout Voltaged
(at VOUT(nom) ≥ 5 V)
VIN - VOUT
mV
150
I
OUT = 500 mA
IOUT = 200 mA
Room
Room
Full
170
415
Dropout Voltaged
(at VOUT(nom) < 2 V, VIN ≥ 2 V)
VIN - VOUT
I
OUT = 500 mA
IOUT = 0 mA
Room
Room
Full
150
1000
I
I
OUT = 200 mA
IGND
Ground Pin Current
µA
1500
Room
Full
2500
OUT = 500 mA
4000
1
IIN(off)
IADJ
VSD = 0 V
Shutdown Supply Current
ADJ Pin Current
Room
0.1
5
µA
nA
ADJ = 1.2 V
Room
Room
Room
100
IO(peak)
VOUT ≥ 0.95 x VOUT(nom), tpw = 2 ms
Peak Output current
600
mA
w/o CNOISE
200
BW = 50 Hz to 100 kHz
eN
Output Noise Voltage
µV(rms)
I
OUT = 150 mA
CNOISE = 0.1 µF
Room
Room
Room
Room
100
60
f = 1 kHz
f = 10 kHz
f = 100 kHz
ΔVOUT/ΔVIN
IOUT = 150 mA
Ripple Rejection
60
dB
40
VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V
tR/tF = 5 µs, IOUT = 500 mA
ΔVO(line)
ΔVO(load)
Dynamic Line Regulation
Dynamic Load Regulation
Room
10
mV
IOUT : 1 mA to 150 mA, tR/tF = 2 µs
Room
Room
Room
30
5
w/o CNOISE Cap
VIN = 4.3 V
µs
VOUT Turn-On Time
tON
VOUT = 3.3 V
CNOISE = 0.1 µF
2
mS
Thermal Shutdown
Thermal Shutdown Junction
Temperature
tJ(s/d)
Room
165
°C
tHYST
ISC
Thermal Hysteresis
Short Circuit Current
Shutdown Input
Room
Room
20
VOUT = 0 V
800
mA
VIH
VIL
VIN
0.4
High = Regulator On (Rising)
Low = Regulator Off (Falling)
VSD = 0 V, Regulator OFF
VSD = 6 V, Regulator ON
Full
Full
1.5
SD Input Voltage
V
IIH
Room
Room
Full
0.01
1.0
SD Input Currente
µA
IIL
VHYST
Shutdown Hysteresis
100
mV
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
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Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
IN = VOUT(nom) + 1 V, IOUT = 1 mA,
Limits
- 40 °C to 85 °C
V
Parameter
Symbol
Temp.a Min.b Typ.c Max.b
Unit
CIN = 2.2 µF, COUT = 2.2 µF, VSD = 1.5 V
Error Output
IOFF
VOL
ERROR = VOUT(nom)
ISINK = 2 mA
Output High Leakage
Full
Full
0.01
2
µA
Output Low Voltageg
0.4
Out-of-Regulation Error Flag
Threshold Voltage (Rising)g
0.93 x 0.95 x 0.97 x
VOUT VOUT VOUT
VTH
Full
V
2 ꢀ x
VOUT
Hysteresisg
VHYST
IDELAY
Room
Room
Delay Pin Current Source
Notes:
1.2
2.2
3.0
µA
a. Room = 25 °C, Full = - 40 °C to 85 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT ≥ 2 V
are measured at VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 ꢀ below the output voltage measured
with a 1 V differential, provided that VIN does not drop below 2.0 V. When VOUT(nom) is less than 2.0 V, the output will be in regulation when
2.0 V - VOUT(nom) is greater than the dropout voltage specified.
e. The device’s shutdown pin includes a typical 6 MΩ internal pull-down resistor connected to ground.
f. VOUT is defined as the output voltage of the DUT at 1 mA.
g. The Error Output (Low) function is guaranteed for VIN ≥ 2.0 V.
TIMING WAVEFORMS
V
IN
t
ON
V
NOM
0.95 V
NOM
V
OUT
ERROR
t
DELAY
Figure 4. Timing Diagram for Power-Up
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
PIN CONFIGURATION
MLP33 PowerPAK
MLP33 PowerPAK
SD
ERROR
8
7
6
5
1
2
3
4
C
NOISE
C
1
2
3
4
8
SD
NOISE
DELAY
GND
DELAY
GND
7
6
5
ERROR
SENSE or ADJ
SENSE or ADJ
V
OUT
V
IN
V
IN
V
OUT
Exposed Pad
Bottom View
Top View
PIN DESCRIPTION
Pin Number
Name
Function
Noise bypass pin. For low noise applications, a 0.01 µF or larger ceramic capacitor should be connected
from this pin to ground.
CNOISE
1
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7)
output. Refer to Figure 4.
2
DELAY
Ground pin. Local ground for CNOISE and COUT
.
3
4
5
GND
VIN
Input supply pin. Bypass this pin with a 2.2 µF ceramic or tantalum capacitor to ground.
Output voltage. Connect COUT between this pin and ground.
VOUT
For fixed output voltage versions, this pin should be connected to VOUT (Pin 5). For adjustable output
voltage version, this voltage feedback pin sets the output voltage via an external resistor divider.
This open drain output is an error flag output which goes low when VOUT drops 5 ꢀ below its nominal
voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
6
SENSE or ADJ
ERROR
7
8
SD
Exposed Pad
The die substrate is attached to the exposed pad and must be electrically connected to GND.
ORDERING INFORMATION
Standard
Part Number
Lead (Pb)-free
Part Number
Marking
Voltage
Temperature
Package
Si9185DMP-12-T1
Si9185DMP-18-T1
Si9185DMP-25-T1
Si9185DMP-28-T1
Si9185DMP-30-T1
Si9185DMP-33-T1
Si9185DMP-50-T1
Si9185DMP-AD-T1
Si9185DMP-12-T1-E3
Si9185DMP-18-T1-E3
Si9185DMP-25-T1-E3
Si9185DMP-28-T1-E3
Si9185DMP-30-T1-E3
Si9185DMP-33-T1-E3
Si9185DMP-50-T1-E3
Si9185DMP-AD-T1-E3
8512
8518
8525
8528
8530
8533
8550
85AD
1.215 V
1.80 V
2.50 V
2.80 V
MLP33
PowerPak
- 40 °C to 85 °C
3.00 V
3.30 V
5.00 V
Adjustable
Additional voltage options are available.
Eval Kit
Temperature Range
Board Type
Surface Mount
Si9185DB
- 40 to 85 °C
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
5
Si9185
Vishay Siliconix
TYPICAL CHARACTERISTICS Internally Regulated, 25 °C, unless otherwise noted
300
250
200
150
100
50
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
OUT
= 3.0 V
R
LOAD
= 16.5 Ω
0
0
100
200
300
(mA)
400
500
600
0
1
2
3
4
5
6
I
V
(V)
LOAD
IN
Dropout Characteristic
Dropout Voltage vs. Load Current
300
250
200
150
100
50
400
350
300
250
200
150
100
50
I
= 500 mA
OUT
V
OUT
= 3.0 V
I
= 500 mA
OUT
I
= 200 mA
= 10 mA
OUT
I
= 200 mA
OUT
I
OUT
I
= 10 mA
OUT
0
0
I
= 0 mA
OUT
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
- 50 - 25
0
25
50
75
100 125 150
V
OUT
Junction Temperature (°C)
Dropout Voltage vs. Temperature
Dropout Voltage vs. VOUT
0.30
0.15
0.2
I
= 1 mA
OUT
0.0
- 0.2
- 0.4
- 0.6
- 0.8
- 1.0
0.00
- 0.15
- 0.30
- 0.45
- 0.60
- 0.75
I
= 200 mA
OUT
I
= 500 mA
OUT
0
50 100 150 200 250 300 350 400 450 500
- 40 - 20
0
20
Junction Temperature (°C)
Normalized VOUT vs. Temperature
40
60
80 100 120 140
Load Current (mA)
Normalized Output Voltage vs. Load Current
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
TYPICAL CHARACTERISTICS Internally Regulated, 25 °C, unless otherwise noted
300
250
200
150
100
50
0.0
- 0.5
- 1.0
- 1.5
- 2.0
- 2.5
V
OUT
= 5 V
85 °C
25 °C
25 °C
- 40 °C
0
0
1
2
3
4
5
6
7
0
50 100 150 200 250 300 350 400 450 500
Load Current (mA)
Input Voltage (V)
No Load GND Pin Current vs. Input Voltage
GND Current vs. Load Current
0
- 20
- 40
- 60
- 80
2500
2000
1500
1000
500
V
= 5 V
OUT
I
= 500 mA
C
= 10 µF
OUT
IN
C
= 2.2 µF
OUT
I
= 150 mA
LOAD
I
I
= 200 mA
= 0 mA
OUT
OUT
0
2
3
4
5
6
10
10
10
Frequency (Hz)
Power Supply Rejection
10
10
10
- 40 - 20
0
20
JunctionTemperature (°C)
GND Pin Current vs. Temperature and Load
40
60
80 100 120 140
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
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Si9185
Vishay Siliconix
TYPICAL WAVEFORMS
V
OUT
10 mV/div
V
OUT
10 mV/div
I
LOAD
100 mA/div
I
LOAD
100 mA/div
5.00 µs/div
5.00 µs/div
V
V
I
= 4.3 V, C = 2.2 µF
IN
V
V
I
= 4.3 V, C = 2.2 µF
IN
IN
IN
= 3.3 V, C
= 2.2 µF
= 3.3 V, C
= 2.2 µF
OUT
OUT
OUT
OUT
= 1 mA to 150 mA
= 1 mA to 150 mA
LOAD
LOAD
t
= 2 µs
t
= 2 µs
rise
rise
Load Transient Response-1
Load Transient Response-2
V
OUT
10 mV/div
V
OUT
10 mV/div
I
LOAD
100 mA/div
I
LOAD
100 mA/div
5.00 µs/div
5.00 µs/div
V
V
I
= 4.3 V, C = 2.2 µF
IN
V
V
I
= 4.3 V, C = 2.2 µF
IN
IN
IN
= 3.3 V, C
= 1.0 µF
= 3.3 V, C
= 1.0 µF
OUT
OUT
OUT
OUT
= 1 mA to 150 mA
= 1 mA to 150 mA
LOAD
LOAD
t
= 2 µs
t
= 2 µs
rise
rise
Load Transient Response-4
Load Transient Response-3
V
V
OUT
20 mV/div
OUT
20 mV/div
I
LOAD
200 mA/div
I
LOAD
200 mA/div
V
V
I
= 4.3 V, C = 10 µF
IN
IN
V
V
I
= 4.3 V, C = 10 µF
IN
10 µs/div
IN
10 µs/div
= 3.3 V, C
= 10 µF
OUT
LOAD
OUT
= 3.3 V, C
= 10 µF
OUT
LOAD
OUT
= 1 mA to 500 mA
= 1 mA to 500 mA
t
= 2 µs
rise
t
= 2 µs
rise
Load Transient Response-5
Load Transient Response-6
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
TYPICAL WAVEFORMS
V
OUT
1 V/div
V
IN
2 V/div
V
OUT
10 mV/div
5.00 µs/div
5.00 µs/div
V
V
= 4.3 V to 5.3 V
V
OUT
= 5.3 V to 4.3 V
INSTEP
INSTEP
= 3.3 V
V
= 3.3 V
OUT
C
IN
= 2.2 µF
C
IN
= 2.2 µF
OUT
OUT
C
= 10 µF
C
= 10 µF
I
t
= 500 mA
I
t
= 500 mA
LOAD
LOAD
= 5 µs
= 5 µs
rise
fall
Line Transient Response-2
Line Transient Response-1
V
IN
CH-3 2 V/div
V
2 V/div
IN
V
OUT
CH-1 2 V/div
V
2 V/div
OUT
C
C
delay
2 V/div
delay
CH-4 2 V/div
ERROR 2 V/div
ERROR
CH-2 2 V/div
10.00 ms/div
5.00 µs/div
V
V
= 4.2 V
OUT
V
V
= 4.2 V
OUT
IN
IN
= 3.3 V
= 3.3 V
C
NOISE
= 0.1 µF
C
NOISE
= 0.1 µF
delay
C
delay
C
= 0.1 µF
= 0.1 µF
I
= 350 mA
I
= 350 mA
LOAD
LOAD
Turn-On Sequence
Turn-Off Sequence
10.0
µV Hz
500 µV/div
0.01
100 Hz
1 MHz
V
V
C
= 4.1 V
1 ms/div
IN
OUT
V
V
= 4.2 V
IN
= 3.3 V/10 mA
= 0.1 µF
= 3.3 V
OUT
NOISE
I
= 150 mA
OUT
C
= 0.1 µF
NOISE
BW = 10 Hz to 1 MHz
Noise Spectrum
Output Noise
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
9
Si9185
Vishay Siliconix
BLOCK DIAGRAM
SENSE
C
1
NOISE
6
4
V
IN
8
SD
+
-
RFB2
To V
IN
5
V
OUT
60 mV
6 MΩ
2 µA
+
RFB1
2
7
+
-
DELAY
ERROR
+
-
-
1.215 V
+
V
REF
3
GND
Figure 5.
DETAILED DESCRIPTION
The Si9185 is a low drop out, low quiescent current, and very
linear regulator family with very fast transient response. It is
primarily designed for battery powered applications where
battery run time is at a premium. The low quiescent current
allows extended standby time while low drop out voltage
enables the system to fully utilize battery power before
recharge. The Si9185 is a very fast regulator with bandwidth
exceeding 50 kHz while maintaining low quiescent current at
light load conditions. With this bandwidth, the Si9185 is the
fastest LDO available today. The Si9185 is stable with any
output capacitor type from 1 µF to 10.0 µF. However, X5R or
X7R ceramic capacitors are recommended for best output
noise and transient performance.
unknown, it is recommended that an input bypass capacitor
be used of a value that is equal to or greater than the output
capacitor.
VOUT
VOUT is the output voltage of the regulator. Connect a bypass
capacitor from VOUT to ground. The output capacitor can be
any value from 1.0 µF to 10.0 µF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
GND
Ground is the common ground connection for VIN and VOUT
.
It is also the local ground connection for CNOISE, DELAY,
SENSE or ADJ, and SD.
VIN
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough
source impedance. For practical circuits, a 1.0 µF or larger
ceramic capacitor is recommended. When the source
impedance is not low enough and/or the source is several
inches from the Si9185, then a larger input bypass capacitor
is needed. It is required that the equivalent impedance
(source impedance, wire, and trace impedance in parallel
with input bypass capacitor impedance) must be smaller
than the input impedance of the Si9185 for stable operation.
When the source impedance, wire, and trace impedance are
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
SENSE or ADJ
Safe Operating Area
SENSE is used to sense the output voltage. Connect SENSE
to VOUT for the fixed voltage version. For the adjustable
output version, use a resistor divider R1 and R2, connect R1
from VOUT to ADJ and R2 from ADJ to ground. R2 should be
in the 25 kΩ to 150 kΩ range for low power consumption,
while maintaining adequate noise immunity.
The ability of the Si9185 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
PD = (VIN - VOUT) * IOUT
.
Junction temperature is defined as
VOUT VADJ R2
-
(1)
R1
TJ = TA + ((PD * (RθJC + RθCA)).
VADJ
To calculate the limits of performance, these equations must
be rewritten.
VADJ is nominally 1.215 V.
Allowable power dissipation is calculated using the equation
SHUTDOWN (SD)
SD controls the turning on and off of the Si9185. VOUT is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. VOUT is guaranteed to be off when the SD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9185 will draw less than 2 µA current from the
source. To automatically turn on VOUT whenever the input is
applied, tie the SD pin to VIN.
PD = (TJ - TA )/ (RθJC + RθCA
While allowable output current is calculated using the equation
OUT = (TJ - TA )/ (RθJC + RθCA) * (VIN - VOUT).
Ratings of the Si9185 that must be observed are
)
I
ERROR
T
Jmax = 125 °C, TAmax = 85 °C, (VIN - VOUT max
)
= 5.3 V,
RθJC = 4 °C/W.
ERROR is an open drain output that goes low when VOUT is
less than 5 ꢀ of its normal value. As with any open drain
output, an external pull up resistor is needed. When a
capacitor is connected from DELAY to GROUND, the error
signal transition from low to high is delayed (see Delay
section). This delayed error signal can be used as the power-
on reset signal for the application system. (Refer to Figure 4.)
The value of RθCA is dependent on the PC board used. The
value of RθCA for the board used in device characterization
is approximately 46 °C/W.
Figure 6 shows the performance limits graphically for the
Si9185 mounted on the circuit board used for thermal
characterization.
The ERROR pin is disconnected if not used.
0.6
DELAY
A capacitor from DELAY to GROUND sets the time delay for
ERROR going from low to high state. The time delay can be
calculated using the following formula:
0.5
T
= 0 °C
A
0.4
0.3
0.2
0.1
0.0
T
A
= 25 °C
VADJ Cdelay
Tdelay
(2)
Idelay
T
A
= 50 °C
T
A
= 70 °C
T
A
= 85 °C
The DELAY pin should be an open circuit if not used.
(V - V
IN
)
= 5.3 V
CNOISE
OUT MAX
For low noise application, connect a high frequency ceramic
capacitor from CNOISE to ground. A 0.01 µF or a 0.1 µF X5R
or X7R is recommended.
0
1
2
3
4
5
6
V
- V
OUT
(V)
IN
Figure 6.
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
11
Si9185
Vishay Siliconix
PCB Footprint and Layout Considerations
1.425
0.056
The Si9185 comes in the MLP33 PowerPAK package with
an exposed pad on the bottom to provide a low thermal
impedance path into the PC board. When the PC board
layout is designed, a copper plane, referred to as spreading
copper, is recommended to be placed under the package to
which the exposed pad is soldered. This spreading copper is
the path for the heat to move away from the package into the
PC board. With the Si9185 mounted on a four layer board
measuring 2" x 2", a spreading copper area of 0.25 square
inches will yield an Rθja of 50 °C/W. This allows for power
dissipation in excess of 1 watt in an 80 °C ambient
environment.
0.906
0.036
0.650
0.026
0.325
0.013
2.245
0.088
0.396
0.016
1.426
0.056
mm
inches
2.852
0.112
Figure 7. MLP33 PowerPAK Pad Pattern
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71765.
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
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Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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1
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