SIHFP17N50L-E3 [VISHAY]
Power MOSFET; 功率MOSFET型号: | SIHFP17N50L-E3 |
厂家: | VISHAY |
描述: | Power MOSFET |
文件: | 总8页 (文件大小:846K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
Power MOSFET
FEATURES
• SuperFast Body Diode Eliminates the Need
For External Diodes in ZVS Applications
PRODUCT SUMMARY
VDS (V)
500
Available
R
DS(on) (Ω)
VGS = 10 V
0.28
• Low Gate Charge Results in Simple Drive
Requirement
RoHS*
Qg (Max.) (nC)
130
33
COMPLIANT
Q
Q
gs (nC)
gd (nC)
• Enhanced dV/dt Capabilities Offer Improved
Ruggedness
59
Configuration
Single
• Higher Gate Voltage Threshold Offers Improved Noise
Immunity
D
TO-247
• Lead (Pb)-free Available
APPLICATIONS
G
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
• Uninterruptible Power Supply
• Motor Control applications
S
D
S
N-Channel MOSFET
G
ORDERING INFORMATION
Package
TO-247
IRFP17N50LPbF
SiHFP17N50L-E3
IRFP17N50L
Lead (Pb)-free
SnPb
SiHFP17N50L
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
500
30
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
V
VGS
TC = 25 °C
TC =100°C
16
Continuous Drain Current
VGS at 10 V
ID
11
A
Pulsed Drain Currenta
IDM
64
Linear Derating Factor
1.8
W/°C
mJ
A
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
EAS
IAR
390
16
EAR
22
mJ
W
Maximum Power Dissipation
T
C = 25 °C
PD
220
Peak Diode Recovery dV/dtc
dV/dt
TJ, Tstg
13
- 55 to + 150
300d
V/ns
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
°C
for 10 s
6-32 or M3 screw
10
lbf · in
N · m
Mounting Torque
1.1
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 3.0 mH, RG = 25 Ω, IAS = 16 A (see fig. 12).
c. ISD ≤ 16 A, dI/dt ≤ 347 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
www.vishay.com
1
WORK-IN-PROGRESS
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
RthJA
-
0.50
-
62
-
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
RthCS
°C/W
0.56
RthJC
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
VDS
ΔVDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 250 µA
Reference to 25 °C, ID = 1 mAd
VDS = VGS, ID = 250 µA
500
-
-
-
V
V/°C
-
3.0
-
0.60
-
5.0
100
50
2.0
0.32
-
V
VGS
VDS = 500 V, VGS = 0 V
VDS = 400 V, VGS = 0 V, TJ = 125 °C
VGS = 10 V
ID = 9.9 Ab
VDS = 50 V, ID = 9.9 Ab
=
30 V
-
nA
-
-
Zero Gate Voltage Drain Current
IDSS
µA
-
-
0.28
-
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
-
Ω
11
S
Input Capacitance
Ciss
Coss
Crss
-
-
-
-
-
-
2760
325
37
-
-
-
-
-
-
VGS = 0 V,
DS = 25 V,
f = 1.0 MHz, see fig. 5
Output Capacitance
V
Reverse Transfer Capacitance
V
V
DS = 1.0 V , f = 1.0 MHz
3690
84
pF
Output Capacitance
Coss
DS = 400 V , f = 1.0 MHz
V
GS = 0 V
Effective Output Capacitance
C
oss eff.
159
VDS = 0 V to 400 V
Effective Output Capacitance
(Energy Related)
Coss eff. (ER)
-
120
-
Internal Gate Resistance
Total Gate Charge
Rg
Qg
f = 1 MHz, open drain
-
-
1.4
-
-
Ω
130
ID = 16 A, VDS = 400 V
see fig. 7 and 15b
Gate-Source Charge
Gate-Drain Charge
Qgs
Qgd
VGS = 10 V
-
-
-
-
33
59
nC
Turn-On Delay Time
Rise Time
td(on)
tr
td(off)
tf
-
-
-
-
21
51
50
28
-
-
-
-
V
R
DD = 250 V, ID = 16 A
G = 7.5 Ω, VGS = 10 V
see fig. 14a & 14bb
ns
A
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
IS
-
-
-
-
16
64
G
Pulsed Diode Forward Currenta
Body Diode Voltage
ISM
S
VSD
TJ = 25 °C, IS = 16 A, VGS = 0 Vb
-
-
-
-
-
-
-
1.5
250
330
710
1210
11
V
TJ = 25 °C
170
220
470
810
7.3
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
trr
ns
TJ = 125 °C
TJ = 25 °C
TJ =1 25 °C
IF = 16 A,
dI/dt = 100 A/µsb
Qrr
µC
Reverse Recovery Current
Forward Turn-On Time
IRRM
ton
TJ = 25 °C
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. COSS eff. is a fixed capacitance that gives the same charging time as COSS while VDS is rising fom 0 to 80 % VDS
.
COSS eff. (ER) is a fixed capacitance that stores the same energy as COSS while VDS is rising fom 0 to 80 % VDS.
www.vishay.com
2
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100
VGS
°
T = 150 C
J
TOP
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
10
1
10
1
BOTTOM 5.0V
°
T = 25 C
J
5.0V
0.1
0.01
20µs PULSE WIDTH
Tj = 25°C
V
= 50V
DS
20µs PULSE WIDTH
0.1
4.0
5.0
6.0
7.0
8.0 9.0 10.0
0.1
1
10
100
V
, Gate-to-Source Voltage (V)
GS
V
, Drain-to-Source Voltage (V)
DS
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
16A
=
I
D
VGS
TOP
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
5.0V
20µs PULSE WIDTH
Tj = 150°C
V
=10V
GS
0.1
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
0.1
1
10
100
T , Junction Temperature ( C)
J
V
, Drain-to-Source Voltage (V)
DS
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
www.vishay.com
3
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
20
16
12
8
100000
I
D
=
16A
V
C
= 0V,
f = 1 MHZ
, C SHORTED
gd ds
GS
V
V
V
= 400V
= 250V
= 100V
= C + C
DS
DS
DS
iss
gs
C
= C
gd
rss
C
= C + C
oss
ds gd
10000
1000
100
Ciss
Coss
Crss
4
10
0
0
30
60
90
120
150
1
10
100
1000
Q
, Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
15
10
5
100
°
T = 150 C
J
10
1
°
T = 25 C
J
0
V
= 0 V
GS
0.1
0.2
0
100
V
200
300
400
500
600
0.6
0.9
1.3
1.6
V
,Source-to-Drain Voltage (V)
SD
Drain-to-Source Voltage (V)
DS,
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typ. Output Capacitance Stored Energy vs. VDS
www.vishay.com
4
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
RD
VDS
VGS
20
16
12
8
D.U.T.
RG
+
V
-
DD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
4
90 %
0
25
50
75
100
125
150
°
T , Case Temperature ( C)
C
10 %
VGS
td(on) tr
td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
SINGLE PULSE
0.01
(THERMAL RESPONSE)
0.01
P
2
DM
t
1
t
2
Notes:
1. Duty factor D =t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
www.vishay.com
5
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
1000
800
640
480
320
160
0
OPERATION IN THIS AREA LIMITED
I
D
BY R
DS(on)
TOP
7A
10A
BOTTOM 16A
100
10us
10
1
100us
1ms
10ms
°
T = 25 C
C
J
°
T = 150 C
Single Pulse
0.1
10
100
1000
10000
25
50
75
100
125
150
°
V
, Drain-to-Source Voltage (V)
Starting T , Junction Temperature ( C)
DS
J
Fig. 12 - Maximum Safe Operating Area
Fig. 13 - Maximum Avalanche Energy vs. Drain Current
VDS
15 V
tp
Driver
L
V
DS
D.U.T
AS
R
G
+
-
V
DD
I
A
20 V
IAS
0.01Ω
t
p
Fig. 14a - Unclamped Inductive Test Circuit
Fig. 14b - Unclamped Inductive Waveforms
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
-
VDS
D.U.T.
VG
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 15a - Basic Gate Charge Waveform
Fig. 15b - Gate Charge Test Circuit
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6
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
IRFP17N50L, SiHFP17N50L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
Circuit Layout Considerations
Low Stray Inductance
• Ground Plane
D.U.T
•
•
Low Leakage Inductance
Current Transformer
-
+
-
-
+
RG
• dV/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
dI/dt
D.U.T. V Waveform
DS
Diode Recovery
dV/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig. 16. For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91205.
Document Number: 91205
S-Pending-Rev. A, 16-Jun-08
www.vishay.com
7
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
1
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