SIHL520S [VISHAY]
Power MOSFET;
| 型号： | SIHL520S |
| 厂家： | 
VISHAY |
| 描述： | Power MOSFET 局域网 开关 脉冲 晶体管 |
| 文件： | 总8页 (文件大小：924K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRL520S, SiHL520S
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Surface Mount
100
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Logic-Level Gate Drive
• RDS (on) Specified at VGS = 4 V and 5 V
• 175°C Operating Temperature
R
DS(on) (Ω)
VGS = 5 V
0.27
Qg (Max.) (nC)
12
3.0
Q
Q
gs (nC)
gd (nC)
7.1
Configuration
Single
D
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
D2PAK (TO-263)
The D2PAK (TO-263) is a surface mount power package
capable of accommodating die size up to HEX-4. It provides
the highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK (TO-263) is suitable for high current applications
because of its low internal connection resistance and can
dissipate up to 2.0 W in a typical surface mount application.
G
D
G
S
N-Channel MOSFET
S
ORDERING INFORMATION
Package
D2PAK (TO-263)
IRL520S
SiHL520S
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
100
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
V
VGS
10
T
C = 25 °C
9.2
Continuous Drain Current
VGS at 5 V
ID
TC =100°C
6.5
A
Pulsed Drain Currenta
IDM
36
Linear Derating Factor
0.40
0.025
170
W/°C
Linear Derating Factor (PCB Mount)e
Single Pulse Avalanche Energyb
Avalanche Currenta
EAS
IAR
mJ
A
9.2
Repetiitive Avalanche Energya
EAR
6.0
mJ
Maximum Power Dissipation
T
C = 25 °C
60
PD
W
V/ns
°C
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
TA = 25 °C
3.7
dV/dt
5.5
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
TJ, Tstg
- 55 to + 175
300d
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 3.0 mH, RG = 25 Ω, IAS = 9.2 A (see fig. 12).
c. ISD ≤ 9.2 A, dI/dt ≤ 110 A/µs, VDD ≤ VDS, TJ ≤ 175 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
www.vishay.com
1
WORK-IN-PROGRESS
IRL520S, SiHL520S
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
RthJA
RthJA
RthJC
-
62
Maximum Junction-to-Ambient
(PCB Mount)a
-
-
40
°C/W
Maximum Junction-to-Case (Drain)
2.5
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS
ΔVDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 250 µA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 µA
100
-
-
V
V/°C
V
V
DS Temperature Coefficient
-
0.12
-
Gate-Source Threshold Voltage
Gate-Source Leakage
1.0
-
-
-
-
-
-
-
2.0
100
25
VGS
VDS = 100 V, VGS = 0 V
DS = 80 V, VGS = 0 V, TJ = 150 °C
=
10 V
-
nA
-
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
IDSS
µA
V
-
-
250
0.27
0.38
-
VGS = 5 V
VGS = 4 V
ID = 5.5 Ab
ID = 4.6 Ab
Ω
Ω
S
RDS(on)
gfs
-
Forward Transconductance
Dynamic
VDS = 50 V, ID = 5.5 Ab
3.2
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Ciss
Coss
Crss
Qg
-
-
-
-
-
-
-
-
-
-
490
150
30
-
-
VGS = 0 V,
DS = 25 V,
f = 1.0 MHz, see fig. 5
V
-
-
pF
nC
12
3.0
7.1
-
ID = 9.2 A, VDS = 80 V,
see fig. 6 and 13b
Qgs
Qgd
td(on)
tr
V
GS = 5 V
-
-
9.8
64
21
27
-
V
DD = 50 V, ID = 9.2 A,
ns
R
G = 9 Ω, RD = 5.2 Ω, see fig. 10b
Turn-Off Delay Time
Fall Time
td(off)
tf
-
-
Dynamic
D
Between lead,
Internal Drain Inductance
LD
LS
-
-
4.5
7.5
-
-
6 mm (0.25") from
package and center of die
contact
nH
A
G
Internal Source Inductance
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
D
MOSFET symbol
showing the
integral reverse
p - n junction diode
IS
-
-
-
-
9.2
36
G
Pulsed Diode Forward Currenta
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = 9.2 A, VGS = 0 Vb
-
-
-
-
2.5
190
1.0
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
130
0.83
ns
µC
TJ = 25 °C, IF = 9.2 A, dI/dt = 100 A/µsb
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
www.vishay.com
2
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
IRL520S, SiHL520S
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
www.vishay.com
3
IRL520S, SiHL520S
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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4
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
IRL520S, SiHL520S
Vishay Siliconix
RD
VDS
VGS
D.U.T.
RG
+
V
-
DD
5 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
www.vishay.com
5
IRL520S, SiHL520S
Vishay Siliconix
L
VDS
VDS
Vary tp to obtain
required IAS
tp
VDD
D.U.T
IAS
RG
+
-
VDD
VDS
5 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
5 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
-
VDS
D.U.T.
VG
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
Fig. 13a - Basic Gate Charge Waveform
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6
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
IRL520S, SiHL520S
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
Low stray inductance
D.U.T.
•
• Ground plane
• Low leakage inductance
current transformer
-
+
-
-
+
RG
+
-
VDD
• dV/dt controlled by RG
• ISD controlled by duty factor "D"
• D.U.T. - device under test
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
= 10 V*
GS
D.U.T. I waveform
SD
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. V waveform
DS
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Ripple ≤ 5 %
Inductor current
I
SD
* VGS = 5 V for logic level and 3 V drive devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?90382.
Document Number: 90382
S-Pending-Rev. A, 14-Jan-09
www.vishay.com
7
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
1
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