SQ3481EV-T1-GE3 [VISHAY]
SQ3481EV Automotive P-Channel 30 V (D-S) 175 °C MOSFET;型号: | SQ3481EV-T1-GE3 |
厂家: | VISHAY |
描述: | SQ3481EV Automotive P-Channel 30 V (D-S) 175 °C MOSFET 光电二极管 晶体管 |
文件: | 总12页 (文件大小:217K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SQ3481EV
Vishay Siliconix
www.vishay.com
Automotive P-Channel 30 V (D-S) 175 °C MOSFET
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• AEC-Q101 Qualifiedc
PRODUCT SUMMARY
VDS (V)
- 30
0.043
0.070
- 7.5
RDS(on) () at VGS = - 10 V
RDS(on) () at VGS = - 4.5 V
• 100 % Rg and UIS Tested
• Compliant to RoHS Directive 2002/95/EC
ID (A)
Configuration
Single
(4) S
TSOP-6
Top View
1
2
3
6
(3) G
3 mm
5
4
2.85 mm
Marking Code: 8Exxx
(1, 2, 5, 6) D
P-Channel MOSFET
ORDERING INFORMATION
Package
TSOP-6
Lead (Pb)-free and Halogen-free
SQ3481EV-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
- 30
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
V
VGS
20
TC = 25 °C
- 7.5
- 4.3
- 5.2
- 30
Continuous Drain Current
ID
T
C = 125 °C
Continuous Source Current
Pulsed Drain Currenta
IS
A
IDM
IAS
EAS
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
- 15
L = 0.1 mH
TC = 25 °C
11
mJ
W
4
Maximum Power Dissipationa
PD
T
C = 125 °C
1.3
Operating Junction and Storage Temperature Range
TJ, Tstg
- 55 to + 175
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
RthJA
LIMIT
110
36
UNIT
Junction-to-Ambient
PCB Mountb
°C/W
Junction-to-Foot (Drain)
RthJF
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %.
b. When mounted on 1" square PCB (FR-4 material).
c. Parametric verification ongoing.
S11-2124-Rev. B, 07-Nov-11
Document Number: 71508
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQ3481EV
Vishay Siliconix
www.vishay.com
SPECIFICATIONS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
Gate-Source Threshold Voltage
Gate-Source Leakage
VDS
VGS(th)
IGSS
VGS = 0 V, ID = - 250 μA
VDS = VGS, ID = - 250 μA
- 30
-
-
V
- 1.5
- 2.0
- 2.5
VDS = 0 V, VGS
=
20 V
-
-
100
- 1
nA
μA
VGS = 0 V
VGS = 0 V
VDS = - 30 V
VDS = - 30 V, TJ = 125 °C
VDS = - 30 V, TJ = 175 °C
VDS- 5 V
-
-
Zero Gate Voltage Drain Current
IDSS
-
-
-
- 50
- 150
-
VGS = 0 V
-
On-State Drain Currenta
ID(on)
RDS(on)
gfs
VGS = - 10 V
VGS = - 10 V
- 10
-
A
S
ID = - 5.3 A
-
-
-
0.035
0.055
13
0.043
0.070
-
Drain-Source On-State Resistancea
V
GS = - 4.5 V
ID = - 2 A
Forward Transconductanceb
Dynamicb
VDS = - 15 V, ID = - 5.3 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Chargec
Gate-Source Chargec
Gate-Drain Chargec
Gate Resistance
Turn-On Delay Timec
Rise Timec
Turn-Off Delay Timec
Fall Timec
Ciss
Coss
Crss
Qg
-
-
695
160
120
15.4
2.1
3.9
11.5
9
870
200
150
23.5
VGS = 0 V
VDS = - 15 V, f = 1 MHz
pF
-
-
Qgs
Qgd
Rg
VGS = - 10 V
VDS = - 15 V, ID = - 5.3 A
f = 1 MHz
-
nC
-
4.5
-
18.5
14
td(on)
tr
td(off)
tf
-
15
23
VDD = - 15 V, RL = 15
ID - 1 A, VGEN = - 10 V, Rg = 1
ns
-
28
42
-
12
18
Pulsed Currenta
Forward Voltage
ISM
-
-
-
- 30
A
V
VSD
IF = - 1.7 A, VGS = 0 V
- 0.8
- 1.2
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %.
b. Guaranteed by design, not subject to production testing.
c. Independent of operating temperature.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S11-2124-Rev. B, 07-Nov-11
Document Number: 71508
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQ3481EV
Vishay Siliconix
www.vishay.com
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
20
16
12
8
20
16
12
8
VGS = 10 V thru 5 V
VGS = 4 V
TC = 25 °C
4
4
VGS = 3 V
TC = 125 °C
2
TC = - 55 °C
0
0
0
0
0
1
2
3
4
5
0
0
0
1
3
4
5
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
20
16
12
8
0.20
0.16
0.12
0.08
0.04
0
TC = 25 °C
TC = - 55 °C
TC = 125 °C
VGS = 4.5 V
VGS = 10 V
4
0
2
4
6
8
10
4
8
12
16
20
ID - Drain Current (A)
ID - Drain Current (A)
On-Resistance vs. Drain Current
Transconductance
1200
1000
800
600
400
200
0
10
8
VDS = 15 V
ID = 5.3 A
Ciss
6
4
Coss
2
Crss
0
5
10
15
20
25
30
4
8
12
16
20
Qg - Total Gate Charge (nC)
VDS - Drain-to-Source Voltage (V)
Capacitance
Gate Charge
S11-2124-Rev. B, 07-Nov-11
Document Number: 71508
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQ3481EV
Vishay Siliconix
www.vishay.com
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
2.0
1.7
1.4
1.1
0.8
0.5
100
ID = 5.3 A
10
VGS = 10 V
TJ = 150 °C
1
VGS = 4.5 V
TJ = 25 °C
0.1
0.01
0.001
- 50 - 25
0
25
50
75 100 125 150 175
0.0
0.3
0.6
0.9
1.2
1.5
TJ - Junction Temperature (°C)
V
SD - Source-to-Drain Voltage (V)
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
0.25
0.20
0.15
0.10
0.05
0.00
1.0
0.7
ID = 250 μA
0.4
ID = 5 mA
0.1
TJ = 150 °C
- 0.2
- 0.5
TJ = 25 °C
0
2
4
6
8
10
- 50 - 25
0
25
50
75 100 125 150 175
V
- Gate-to-Source Voltage (V)
TJ - Junction Temperature (°C)
GS
On-Resistance vs. Gate-to-Source Voltage
Threshold Voltage
- 30
ID = 1 mA
- 32
- 34
- 36
- 38
- 40
- 50 - 25
0
25
TJ - Junction Temperature (°C)
Drain Source Breakdown vs. Junction Temperature
50
75 100 125 150 175
S11-2124-Rev. B, 07-Nov-11
Document Number: 71508
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQ3481EV
Vishay Siliconix
www.vishay.com
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)
IDM Limited
100 μs
10
Limited by RDS(on)
*
1 ms
1
0.1
10 ms
100 ms
1 s, 10 s, DC
TC = 25 °C
Single Pulse
BVDSS Limited
0.01
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area
2
1
Duty Cycle = 0.5
0.2
Notes:
0.1
P
DM
0.1
0.05
t
1
t
2
t
t
1
2
1. Duty Cycle, D =
0.02
2. Per Unit Base = R
= 110 °C/W
thJA
(t)
3. TJM - T = P
4. Surface Mounted
Z
A
DM thJA
Single Pulse
0.01
-4
10
-3
10
-2
10
-1
10
1
10
100
600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
S11-2124-Rev. B, 07-Nov-11
Document Number: 71508
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SQ3481EV
Vishay Siliconix
www.vishay.com
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10
-4
-3
-2
-1
10
10
10
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Note
•
The characteristics shown in the two graphs
- Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C)
- Normalized Transient Thermal Impedance Junction-to-Foot (25 °C)
are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single
pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part
mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities
can widely vary depending on actual application parameters and operating conditions.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71508.
S11-2124-Rev. B, 07-Nov-11
Document Number: 71508
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Ordering Information
www.vishay.com
Vishay Siliconix
TSOP-6
Ordering codes for the SQ rugged series power MOSFETs in the TSOP-6 package:
DATASHEET PART NUMBER
SQ3410EV
OLD ORDERING CODE a
NEW ORDERING CODE
SQ3410EV-T1_GE3
SQ3418EV-T1_GE3
SQ3419AEEV-T1_GE3
SQ3419EV-T1_GE3
SQ3426AEEV-T1_GE3
SQ3426EV-T1_GE3
SQ3427AEEV-T1_GE3
SQ3427EV-T1_GE3
SQ3456BEV-T1_GE3
SQ3457EV-T1_GE3
SQ3460EV-T1_GE3
SQ3461EV-T1_GE3
SQ3469EV-T1_GE3
SQ3481EV-T1_GE3
SQ3985EV-T1_GE3
SQ3410EV-T1-GE3
SQ3418EV
-
SQ3419AEEV
SQ3419EV
-
-
SQ3426AEEV
SQ3426EV
-
-
SQ3427AEEV
SQ3427EV
-
-
SQ3456BEV
SQ3457EV
SQ3456BEV-T1-GE3
SQ3457EV-T1-GE3
SQ3460EV-T1-GE3
-
SQ3460EV
SQ3461EV
SQ3469EV
SQ3469EV-T1-GE3
SQ3481EV-T1-GE3
-
SQ3481EV
SQ3985EV
Note
a. Old ordering code is obsolete and no longer valid for new orders
Revision: 08-Oct-15
Document Number: 65849
1
For technical questions, contact: automostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
5
4
3
6
1
4
E
1
E
E
1
E
1
2
2
3
-B-
-B-
e
e
b
b
M
M
C
0.15
C
B
A
0.15
B A
5-LEAD TSOP
6-LEAD TSOP
4x
1
-A-
D
0.17 Ref
c
R
R
A
2
A
L
2
Gauge Plane
Seating Plane
Seating Plane
L
0.08
C
A
1
-C-
(L )
1
4x
1
MILLIMETERS
INCHES
Dim
A
A1
A2
b
c
D
E
E1
e
Min
Nom
-
Max
Min
0.036
0.0004
0.035
0.012
0.004
0.116
0.106
0.061
Nom
-
Max
0.91
0.01
0.90
0.30
0.10
2.95
2.70
1.55
1.10
0.10
1.00
0.45
0.20
3.10
2.98
1.70
0.043
0.004
0.039
0.018
0.008
0.122
0.117
0.067
-
-
-
0.32
0.15
3.05
2.85
1.65
0.95 BSC
1.90
-
0.038
0.013
0.006
0.120
0.112
0.065
0.0374 BSC
0.075
-
1.80
2.00
0.50
0.071
0.012
0.079
0.020
e1
L
0.32
0.60 Ref
0.25 BSC
-
0.024 Ref
0.010 BSC
-
L1
L2
R
0.10
0
-
0.004
0
-
4
8
4
8
7
Nom
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
www.vishay.com
1
AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
Ramp-Up Rate
+6_C/Second Maximum
120 Seconds Maximum
70 − 180 Seconds
240 +5/−0_C
0.074
1.875
Temperature @ 155 " 15_C
Temperature Above 180_C
Maximum Temperature
Time at Maximum Temperature
Ramp-Down Rate
0.014
0.35
0.122
3.1
0.026
0.65
20 − 40 Seconds
+6_C/Second Maximum
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 2. Solder Reflow Temperature Profile
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
www.vishay.com
1
AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
3_C/s (max)
60-120 s (min)
Reflow Zone
Pre-Heating Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
On-Resistance vs. Junction Temperature
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.6
1.4
1.2
1.0
0.8
0.6
V
= 4.5 V
GS
I
D
= 6.1 A
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rq
30_C/W
jf
−50 −25
0
25
50
75
100 125 150
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
T
− Junction Temperature (_C)
J
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
Document Number: 71743
27-Feb-04
www.vishay.com
2
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
(2.510)
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
www.vishay.com
26
Document Number: 72610
Revision: 21-Jan-08
Legal Disclaimer Notice
www.vishay.com
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
Document Number: 91000
1
相关型号:
SQ3481EV-T1_GE3
Small Signal Field-Effect Transistor, 7.5A I(D), 30V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HALOGEN FREE AND ROHS COMPLIANT, TSOP-6
VISHAY
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