TFDU4202-TR1 [VISHAY]
Integrated Low Profile Transceiver Module for Telecom Applications - IrDA Standard; 综合薄型收发模块用于电信应用 - IrDA标准
| 型号： | TFDU4202-TR1 |
| 厂家： | 
VISHAY |
| 描述： | Integrated Low Profile Transceiver Module for Telecom Applications - IrDA Standard |
| 文件： | 总13页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TFDU4202
Vishay Semiconductors
Integrated Low Profile Transceiver Module for Telecom
Applications - IrDA Standard
Description
The miniaturized TFDU4202 is an ideal transceiver
for applications in telecommunications like mobile
phones and pagers. The device is mechanically
designed for lowest profile with a height of only
2.8 mm. The infrared transceiver is compatible to the
®
latest IrDA IrPHY specification up to a data rate of
115 kbit/s. At lower operating voltages up to 3.3 V the
transceiver can be operated without external current
limiting resistor to achieve a range > 1 m.
18170
The added feature is a split power supply for IRED
driver (V ) and ASIC (V ).
ccp
ccp
For operating only in the limited distance, low power
range (20 cm/ 30 cm), TFDU4201 with built-in current
control is recommended. For this device see the
appropriate data sheet.
Features
• Package dimension microFace
TFDU4202:
L 7.1 mm x W 4.7 mm x H 2.8 mm
• Compatible to latest IrDA IrPHY standard
• Operational down to 2.0 V
• Fewest external components
• Eye safety: Double safety
Measures:
e3
• CIR Remote Control operation:
Limited optical output oulse duration
Limited optical output intensity
IEC60825-1, 2001: Class 1
Typical transmission range 8 m using standard
RC-receivers. Receives RC-commands with
typical specified sensitivity.
• Push-pull output (RXD)
• High EMI immunity
• SMD Side View
• Lowest power consumption 65 µA, receive mode,
0.01 µA Shutdown
• Built-in current limitation
• Output intensity adjustable by external resistor
• Wide supply voltage range (2.4 V to 5.5 V)
• Split power supply
• Split power supply, transmitter and receiver can be
operated from two power supplies with relaxed
requirements saving costs, US Patent No.
6,157,476
• Lead (Pb)-free device
• Device in accordance to RoHS 2002/95/EC and
WEEE 2002/96/EC
Applications
• Mobile Phones
• Pagers
• Personal Digital Assistants (PDA)
• Handheld Battery Operated Equipment
Parts Table
Part
Description
Orientated in carrier tape for side view in mounting
Orientated in carrier tape for side view in mounting
Qty / Reel
TFDU4202-TR1
TFDU4202-TR3
750 pcs
2250 pcs
Document Number 82541
Rev. 1.8, 05-Dec-05
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1
TFDU4202
Vishay Semiconductors
Functional Block Diagram
Tri-State-Driver
RXD
Comparator
Amplifier
Control
Logic
Vccp
TXD
Control
Controlled Driver
GND
18190
VCC
Pin Description
Pin Number
Function
IRED GND
IRED GND
RXD
Description
I/O
O
Active
low
1
2
3
4
IRED cathode, ground
IRED cathode, ground
Output, received data, push-pull output
IRED supply voltage
VCCP
5
6
7
8
GND
GND
TXD
Ground
Ground
Input, transmit data
Power supply voltage
I
I
high
high
*)
VCC
*)
V
is allowed to be switched off for standby with Vccp applied.
CC
Pinout
TFDU4202
weight 100 mg
18228
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2
Document Number 82541
Rev. 1.8, 05-Dec-05
TFDU4202
Vishay Semiconductors
Absolute Maximum Ratings
Reference Point Pin 8, unless otherwise noted.
Parameter
Test Conditions
Symbol
VCC
Min
Typ.
Max
6
Unit
V
Supply voltage range
- 0.5
Vccp
- 0.5
6
V
Input current
all pins
10
25
mA
mA
mW
Output sink current
Power dissipation
Ptot
TJ
200
Junction temperature
125
85
°C
°C
Ambient temperature range
(operating)
Tamb
- 25
- 40
Storage temperature range
Soldering temperature
Tstg
100
260
°C
°C
see the chapter “Soldering
conditions” for lead-bearing and
Pb-free processing
Average IRED current
IIRED(DC)
IIRED(RP)
VTXD
125
500
6
mA
mA
V
Repetitive pulsed IRED current < 90µs, ton < 20 %
Transmitter data input voltage
- 0.5
- 0.5
Receiver data output voltage
VRXD
6
V
Eye safety information
Parameter
Test Conditions
Symbol
d
Min
Typ.
2
Max
Unit
mm
Virtual source size
Method: (1 - 1/e) encircled
energy
Compatible to Class 1 operation of IEC 60825 or EN60825 with worst case IrDA SIR pulse pattern, 115.2 kbit/s
Electrical Characteristics
Transceiver
Tested for the following parameters (VCC = 2.4 V to 5.5 V, - 25 °C to + 85 °C, unless otherwise stated).
Parameter
Supported data rates
Supply voltage range
Test Conditions
base band
operational down to 2.0 V
CC = 2.4 V to 5.5 V, Ee = 0,
Symbol
Min
9.6
2.4
Typ.
Max
115.2
5.5
Unit
kbit/s
V
VCC
IS
Supply current
V
65
70
1
100
µA
receive mode, full temperature
range
VCC = 2.4 V to 5.5 V, 10 klx
IS
100
µA
sunlight, receive mode, full
temperature range, no signal
VCC = 2.7 V, Vccp = 2.7 V,
IS
mA
115.2 kbit/s transmission,
receive mode,
nose to nose operation
Supply current at Vccp
shutdown mode, entire
temperature range 20 °C
ISshdown
ISshdown
0.02
1
µA
nA
VCC = 0 V, entire temperature
range 20 °C
10
IRED peak current transmitting Ie = 40 mW/sr, no external
IStr
360
1
mA
ms
resistor Vccp = 2.7 V, SIR
standard
Transceiver ‘power on‘ settling
time
time from switching on VCC to
established specified operation
Document Number 82541
Rev. 1.8, 05-Dec-05
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3
TFDU4202
Vishay Semiconductors
Optoelectronic Characteristics
Receiver
Tested for the following parameters (VCC = 2.4 V to 5.5 V, - 25 °C to + 85 °C, unless otherwise stated).
Parameter
Test Conditions
| α | ≤ 15 °,
CC = 2.4 V to 5.5 V
Symbol
Ee, min
Min
Typ.
Max
Unit
mW/m2
(µW/cm2)
Minimum detection threshold
irradiance (logic high receiver
input irradiance)
25
(2.5)
50
(5)
V
mW/m2
W/m2
(mW/cm2)
2.0 V, 25 °C tested
Ee, min
Ee, max
50
100
Maximum detection threshold
irradiance
| α | ≤ 90 °, VCC = 5 V
3300
(330)
5000
(500)
W/m2
(mW/cm2)
| α | ≤ 90 °, VCC = 3 V
Ee, max
8000
(800)
15000
(1500)
mW/m2
(µW/cm2)
Logic low receiver input
irradiance
Ee, max,low
4
(0.4)
µW/m2
V
Ee, max,low
VOL
Output voltage RXD
active, C = 15 pF
0
0.5
non active, C = 15 pF
VOH
VCC - 0.5
V
mA
ns
ns
µs
Output current RXD
Rise time at load
Fall time at load
V
OL < 0.5 V
4
C = 15 pF, R = 2.2 kΩ
C = 15 pF, R = 2.2 kΩ
tr
tf
20
20
70
70
20
RXD signal electrical output
pulse width
2.4 kbit/s, input pulse width
1.41 µs to 3/16 of bit duration
tp
1.41
115.2 kbit/s, input pulse width
1.41 µs to 3/16 of bit duration
tp
1.41
4.5
2
µs
µs
Output delay time (RXD),
leading edge optical input to
electrical output
output level =
tdl
1
0.5 x VCC @ 40 mW/m2
Jitter, leading edge of output
signal
over a period of 10 bit,
115.2 kbit/s
tj
400
6.5
ns
µs
Output delay time (RXD), trailing output level =
edge optical input to electrical
output
tdt
0.5 x VCC @ 40 mW/m2
Power on time, SD recovery
time
0.1
1
ms
µs
Latency
tL
100
200
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4
Document Number 82541
Rev. 1.8, 05-Dec-05
TFDU4202
Vishay Semiconductors
Transmitter
Parameter
Test Conditions
Symbol
VIL(TXD)
Min
Typ.
Max
Unit
V
Logic low transmitter input
voltage
- 0.5
0.15 x VCC
Logic high transmitter input
voltage
VIH(TXD)
Ie
0.8 x VCC
45
6
V
Output radiant intensity
IF1 = 320 mA, | α | ≤ 15 °,
mW/sr
current controlled by external
resistor, voltage range
2.7 V to 5.5 V
Peak emission wavelength
λp
850
1.5
900
200
nm
Spectral emission bandwidth
Optical rise/fall time
60
nm
ns
115.2 kHz square wave signal
(duty cycle 1 : 1)
Optical output pulse duration
input pulse duration 1.6 µs
1.6
1.7
25
µs
µs
input pulse duration > 25 µs,
safety protection
Output radiant intensity
Overshoot, optical
logic low level
0.04
25
µW/sr
%
Rising edge peak to peak jitter over a period of 10 bits,
tj
0.2
µs
independent of information
content
Truth table
Inputs
Outputs
Optical input Irradiance mW/m2
VCC
TXD
RXD
Transmitter
low
x
x
x
low
0
high
high
high
Ie
high ≥ 25 µs
x
high
high
x
0
0
0
low
low
< 4
> Min. detection threshold irradiance
< Max. detection threshold irradiance
low
> Max. detection threshold irradiance
undefined
0
Document Number 82541
Rev. 1.8, 05-Dec-05
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5
TFDU4202
Vishay Semiconductors
Application Hints
Latency
The TFDU4202 does not need any external compo- The receiver is in specified conditions after the
nent when operated with a "clean" power supply. In a defined latency. In a UART related application after
more noisy ambient it is recommended to add a that time (typically 50 µs) the receiver buffer of the
capacitor C1 and a resistor R1 for noise suppression. UART must be cleared. Therefore the transceiver has
A combination of a tantalum with a ceramics capacitor to wait at least the specified latency after receiving the
will be efficient to attenuate both, RF and LF. The last bit before starting the transmission to be sure that
power supply V
must be able to source up to the corresponding receiver is in a defined state.
ccp
550 mA current with a fast rise time. If that cannot be For more application circuits, see IrDC Design Guide
guaranteed an additional capacitor near pin 4 (V
)
and TOIM4232 data sheet.
ccp
should be included. The value is depended on the
power supply quality. A good choice between 4.7 µF
and 10 µF.
Recommended Circuit Diagram
Shut down
The TFDU4202 can be shut down (disabled) by set-
ting the V
pin 8 low. The RXD output is floating
R1
C1
PP
V
CC
/SD
8
V
CC
when the devices are in shut down mode. The TXD
input is high impedance in shut down mode.
GND
5, 6 GND
RXD
3
7
4
RXD
TXD
TXD
Vccp
V
CCP
R2
1, 2 IRED Cathode
18187
Table
Recommended Application Circuit Components
Component
Recommended Value
Vishay Part Number
293D 475X9 016B 2T
C1
R1
4.7 µF, 16 V
5 Ω ( 2 Ω to 47 Ω)
This is a recommendation for a combination to start with to exclude power supply effects.
Optimum, from a costs point of view, to work without both.
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6
Document Number 82541
Rev. 1.8, 05-Dec-05
TFDU4202
Vishay Semiconductors
The temperature derating diagram shows the maxi-
mum operating temperature when the device is oper-
ated without external current limiting resistor. A power
dissipating resistor of 2 Ω is recommended from the
cathode of the IRED to Ground for supply voltages
above 4 V. In that case the device can be operated up
to 85 °C, too.
Temperature Derating Diagram
90
85
80
75
70
65
60
55
50
4.5
Operating Voltage [V] at duty cycle 20 %
2.0
2.5
3.0
3.5
4.0
5.0
5.5
6.0
18097
Figure 1. Temperature Derating Diagram
Recommended Solder Profile
Solder Profile for Sn/Pb soldering
Lead-Free, Recommended Solder Profile
The TFDU4202 is a lead-free transceiver and quali-
fied for lead-free processing. For lead-free solder
paste like Sn-(3.0 - 4.0)Ag-(0.5 - 0.9)Cu, there are two
standard reflow profiles: Ramp-Soak-Spike (RSS)
and Ramp-To-Spike (RTS). The Ramp-Soak-Spike
profile was developed primarily for reflow ovens
heated by infrared radiation. With widespread use of
forced convection reflow ovens the Ramp-To-Spike
profile is used increasingly. Shown below in figure 2 is
Vishay’s recommended profile for use with the
TFDU4202 transceivers. For more details please
refer to Application note: SMD Assembly Instruction.
260
10 s max. at 230 °C
240 °C max.
240
220
200
180
160
140
120
100
80
2...4 °C/s
160 °C max.
120 s...180 s
90 s max.
2...4 °C/s
60
40
20
0
0
50
100
150
Time/s
200
250
300
350
19431_1
Figure 2. Recommended Solder Profile for Sn/Pb soldering
275
≥
T
255 °C for 10 s....30 s
Tpeak = 260 °C
250
225
200
175
150
125
100
75
≥
T
217 °C for 70 s max
30 s max.
90 s...120 s
70 s max.
2 °C...4 °C/s
2 °C...3 °C/s
50
25
0
0
50
100
150
200
250
300
350
19260
Time/s
Figure 3. Solder Profile, RSS Recommendation
Document Number 82541
Rev. 1.8, 05-Dec-05
www.vishay.com
7
TFDU4202
Vishay Semiconductors
280
260
240
220
200
180
160
140
120
100
80
T
= 260 °C max.
peak
<4 °C/s
1.3 °C/s
70 s
30 s
Time above 217 °C t ≤
Time above 255 °C t
Peak temperature T
<2 °C/s
≤
= 260 °C
peak
60
40
20
0
0
50
100
150
200
250
300
Time/s
Figure 4. RTS Recommendation
A ramp-up rate less than 0.9 °C/s is not recom-
mended. Ramp-up rates faster than 1.3 °C/s could
damage an optical part because the thermal conduc-
tivity is less than compared to a standard IC.
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8
Document Number 82541
Rev. 1.8, 05-Dec-05
TFDU4202
Vishay Semiconductors
Package Dimensions
19821
Drawing-No.: 6.550-5185.01-4
Issue: 5; 02.09.05
Figure 5. Package drawing, TFDU4202
Document Number 82541
Rev. 1.8, 05-Dec-05
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9
TFDU4202
Vishay Semiconductors
Reel Dimensions
14017
mm
mm
mm
N
mm
mm
mm
mm
Tape Width
A max.
W1 min.
W2 max.
W3 min.
W3 max.
16
16
180
330
60
50
16.4
16.4
22.4
22.4
15.9
15.9
19.4
19.4
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10
Document Number 82541
Rev. 1.8, 05-Dec-05
TFDU4202
Vishay Semiconductors
Tape Dimensions
19820
Drawing-No.: 9.700-5227.01-4
Issue: 3; 03.09.99
Figure 6. Tape drawing, TFDU4202 for side view mounting
Document Number 82541
Rev. 1.8, 05-Dec-05
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11
TFDU4202
Vishay Semiconductors
Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating
systems with respect to their impact on the health and safety of our employees and the public, as well as
their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are
known as ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs
and forbid their use within the next ten years. Various national and international initiatives are pressing for an
earlier ban on these substances.
Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use
of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments
respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design
and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each
customer application by the customer. Should the buyer use Vishay Semiconductors products for any
unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all
claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal
damage, injury or death associated with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
www.vishay.com
12
Document Number 82541
Rev. 1.8, 05-Dec-05
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
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1
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