TFDU4300-TR1 [VISHAY]
Infrared Transceiver Module (SIR, 115.2 kbit/s); 红外收发器模块（爵士， 115.2 kbit / s的）
| 型号： | TFDU4300-TR1 |
| 厂家： | 
VISHAY |
| 描述： | Infrared Transceiver Module (SIR, 115.2 kbit/s) |
| 文件： | 总15页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TFDU4300
Vishay Semiconductors
VISHAY
Infrared Transceiver Module (SIR, 115.2 kbit/s)
for IrDA® applications
Description
The TFDU4300 is a low profile (2.5 mm) infrared
transceiver module with independent logic reference
voltage (Vlogic) for low voltage IO interfacing. It is
compliant to the latest IrDA physical layer standard for
fast infrared data communication, supporting IrDA
speeds up to 115.2 kbit/s (SIR) and carrier based
remote control. The transceiver module consists of a
PIN photodiode, an infrared emitter (IRED), and a
low-power control IC to provide a total front-end solu-
tion in a single package. This device covers an
18065
extended IrDA low power range of close to 1 m. With
an external current control resistor the current can be
adjusted for shorter ranges.
• Low Profile (Universal) Package Capable of
Surface Mount Soldering to Side and Top View
Orientation
This Vishay SIR transceiver is built in a new smaller
package using the experiences of the lead frame
BabyFace technology.
The Rxd output pulse width is independent of the opti-
cal input pulse width and stays always at a fixed pulse
width thus making the device optimum for standard
Endecs. TFDU4300 has a tri-state output and is float-
ing in shut-down mode with a weak pull-up.
• Directly Interfaces with Various Super I/O and
Controller Devices as e.g. TOIM4232
• Tri-state-Receiver Output, floating in shut down
with a weak pull-up
• Compliant with IrDA Background Light
Specification
• EMI Immunity in GSM Bands > 300 V/m verified
Applications
• Ideal for Battery Operated Applications
Features
• Compliant to the latest IrDA physical layer
specification (9.6 kbit/s to 115.2 kbit/s) and TV
Remote Control, bi-directional operation included.
• Operates from 2.4 V to 5.5 V within specification
over full temperature range from - 30 °C to + 85 °C
• Telecommunication Products
(Cellular Phones, Pagers)
• Digital Still and Video Cameras
• Printers, Fax Machines, Photocopiers, Screen
• Projectors
• Logic voltage 1.5 V to 5.5 V is independent of
IRED driver and analog supply voltage
• Medical and Industrial Data Collection
• Diagnostic Systems
• Split power supply, transmitter and receiver can be
operated from two power supplies with relaxed
requirements saving costs, US Patent No.
6,157,476
• Extended IrDA Low Power Range to about 70 cm
• Typical Remote Control Range 12 m
• Notebook Computers, Desktop PCs,
Palmtop Computers (Win CE, Palm PC), PDAs
• Internet TV Boxes, Video Conferencing Systems
• External Infrared Adapters (Dongles)
• Data Loggers
• Low Power Consumption
(< 0.12 mA Supply Current)
• GPS
• Kiosks, POS, Point and Pay Devices including
IrFM - Applications
• Power Shutdown Mode (< 5 µA Shutdown Current
in Full Temperature Range, up to 85 °C)
• Surface Mount Package, low profile (2.5 mm)
- (L 8.5 mm × H 2.5 mm × W 2.9 mm)
• High Efficiency Emitter
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
1
TFDU4300
Vishay Semiconductors
VISHAY
Parts Table
Part
Description
Qty / Reel
TFDU4300-TR1
TFDU4300-TR3
TFDU4300-TT1
TFDU4300-TT3
Oriented in carrier tape for side view surface mounting
Oriented in carrier tape for side view surface mounting
Oriented in carrier tape for top view surface mounting
Oriented in carrier tape for top view surface mounting
750 pcs
2500 pcs
750 pcs
2500 pcs
Functional Block Diagram
Vlogic
Vcc1
Push-Pull
Driver
Rxd
Comparator
Amplifier
Vcc2
Logic
Controlled Driver
SD
&
Txd
Control
RED C
GND
18282
Pin Description
Pin Number
Function
Description
Connect IRED anode directly to the power supply (V
I/O
Active
1
V
). IRED
CC2
CC2
IRED Anode current can be decreased by adding a resistor in series between the
power supply and IRED anode. A separate unregulated power
supply can be used at this pin.
2
3
IRED Cathode
Txd
IRED Cathode, internally connected to the driver transistor
This Schmitt-Trigger input is used to transmit serial data when SD
is low. An on-chip protection circuit disables the LED driver if the
Txd pin is asserted for longer than 300 µs. The input threshold
voltage adapts to and follows the logic voltage swing defined by the
I
HIGH
LOW
HIGH
applied V
voltage.
logic
4
5
Rxd
SD
Received Data Output, push-pull CMOS driver output capable of
driving standard CMOS or TTL loads. During transmission the Rxd
output is inactive. No external pull-up or pull-down resistor is
required. Floating with a weak pull-up of 500 kΩ (typ.) in shutdown
O
mode. The voltage swing is defined by the applied V
voltage
logic
Shutdown. The input threshold voltage adapts to and follows the
I
I
logic voltage swing defined by the applied V
voltage.
logic
6
7
V
V
Supply Voltage
CC1
V
defines the logic voltage level of the I/O ports to adap the logic
logic
logic
voltage swing to the IR controller. The Rxd output range is from 0 V
to V , for optimum noise suppression the inputs- logic decision
logic
level is 0.5 x V
Ground
logic
8
GND
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2
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Pinout
Definitions:
TFDU4300
weight 75 mg
In the Vishay transceiver data sheets the following nomenclature is
used for defining the IrDA operating modes:
SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared
standard with the physical layer version IrPhy 1.0
MIR: 576 kbit/s to 1152 kbit/s
FIR: 4 Mbit/s
VFIR: 16 Mbit/s
MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy
1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the
Low Power Option to MIR and FIR and VFIR was added with IrPhy
1.4.A new version of the standard in any case obsoletes the former
version.
5
6
1
2
3
4
8
GND
7
IRED A IRED C
Txd Rxd SD Vcc
Vlog
18101
With introducing the updated versions the old versions are obso-
lete. Therefore the only valid IrDA standard is the actual version
IrPhy 1.4 (in Oct. 2002).
Absolute Maximum Ratings
Reference point Ground (pin 8) unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Test Conditions
Symbol
Min
Typ.
Max
Unit
V
Supply voltage range,
transceiver
- 0.3 V < V
- 0.5 V < V
< 6 V
< 6 V
V
V
V
- 0.5
+ 6.0
CC2
logic
CC1
CC2
logic
Supply voltage range,
transmitter
- 0.5 V < V
- 0.5 V < V
< 6 V
< 6 V
- 0.5
- 0.5
- 0.5
- 0.5
+ 6.0
+ 6.0
V
V
V
CC1
logic
Supply voltage range, V
- 0.5 V < V
- 0.3 V < V
< 6 V
< 6 V
logic
CC1
CC2
Rxd output voltage
- 0.5 V < V
- 0.3 V < V
< 6 V
< 6 V
V
V
+ 0.5
logic
CC1
logic
Rxd
Voltage at all inputs
Input current
Note: V ≥ V
is allowed
V
IN
+ 6.0
10
V
in
CC1
for all pins, except IRED anode
pin
mA
Output sinking current
Power dissipation
25
mA
see derating curve
P
250
mW
D
Junction temperature
T
125
°C
°C
J
Ambient temperature range
(operating)
T
- 30
- 40
+ 85
amb
Storage temperature range
T
+ 100
°C
stg
Soldering temperature
see recommended solder profile
240
125
°C
Average output current, pin 1
I
mA
IRED(DC)
Repetitive pulsed output
current, pin 1 to pin 2
t < 90 µs, t < 20 %
I
600
mA
on
IRED(RP)
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
3
TFDU4300
Vishay Semiconductors
VISHAY
Eye safety information
Parameter
Test Conditions
Symbol
d
Min
1.3
Typ.
1.8
Max
Unit
mm
Virtual source size
Method: (1-1/e) encircled
energy
*)
Maximum intensity for class 1
IEC60825-1 or EN60825-1,
edition Jan. 2001, operating
below the absolute maximum
ratings
I
mW/sr
e
**)
(500)
*)
Due to the internal limitation measures the device is a "class 1" device under all conditions.
**)
IrDA specifies the max. intensity with 500 mW/sr.
www.vishay.com
4
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Electrical Characteristics
Transceiver
Tested @ T
= 25 °C, V
= V
= 2.7 V to 5.5 V unless otherwise noted.
amb
CC1
CC2
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Supply voltage
Test Conditions
Remark: For 2.4 V < V
Symbol
Min
2.4
Typ.
Max
5.5
Unit
V
<
V
CC1
CC1
2.6 V @ T
< - 25 °C a minor
amb
reduction of the receiver
sensitivity may occur
*)
Idle supply current @ V
I
90
75
130
µA
µA
CC1
CC1
CC1
SD = Low, E = 1 klx ,
e
(receive mode, no signal)
T
= - 25 °C to + 85 °C,
amb
V
= V
= 2.7 V to 5.5 V
CC2
CC1
*)
I
SD = Low, E = 1 klx ,
e
T
= 25 °C,
amb
V
= V
= 2.7 V to 5.5 V
CC2
CC1
*)
Idle supply current @ V
I
1
µA
logic
SD = Low, E = 1 klx , V
,
log
e
log
(receive mode, no signal)
pin 7, no signal, no load @ Rxd
= 300 mA, 20 % Duty
Average dynamic supply
current, transmitting
I
I
65
mA
IRED
CC
Cycle
Standby supply current
SD = High, T = 25 °C, E = 0 klx
I
I
I
0.1
µA
µA
µA
µA
°C
V
e
SD
SD
SD
SD = High, T = 70 °C
SD = High, T = 85 °C
no signal, no load
2
3
Standby supply current, V
I
1
logic
log
Operating temperature range
Output voltage low, Rxd
Output voltage high, Rxd
T
- 30
- 0.5
+ 85
0.15 x V
logic
A
C
I
= 15 pF
V
V
Load
OL
= - 500 µA
0.8 x V
V
V
+ 0.5
+ 0.5
V
OH
OH
OH
logic
logic
logic
I
= - 250 µA, C
= 15 pF
V
R
0.9 x V
logic
V
OH
Load
Rxd to V
impedance
400
500
600
kΩ
V
CC1
Rxd
Input voltage low (Txd, SD)
Input voltage high (Txd, SD)
Input leakage current (Txd, SD)
Controlled pull down current
V
- 0.5
0.5
6
IL
**)
V
V - 0.5
logic
V
CMOS level
IH
V
= 0.9 x V
I
ICH
- 2
+ 2
µA
µA
IN
logic
SD, Txd = "0" to "1",
< 0.15 V
I
+ 150
IRTx
V
IN
logic
SD, Txd = "0" to "1",
> 0.7 V
I
- 1
0
1
5
µA
IRTx
V
IN
logic
Input capacitance (Txd, SD)
C
pF
IN
*)
Standard illuminant A
**)
To provide an improved immunity with increasing V
the typical threshold level is increasing with V
and set to 0.5 x V
. It is
logic
logic
logic
recommended to use the specified min/max values to avoid increased operating current.
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
5
TFDU4300
Vishay Semiconductors
VISHAY
Optoelectronic Characteristics
Receiver
Tested @ T
= 25 °C, V
= V
= 2.7 V to 5.5 V unless otherwise noted.
amb
CC1
CC2
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Test Conditions
Symbol
Min
Typ.
Max
Unit
2
Minimum detection threshold
irradiance, SIR Mode
9.6 kbit/s to 115.2 kbit/s
λ = 850 nm - 900 nm
α = 0 °, 15 °
E
40
(4)
80
(8)
e
mW/m
2)
(µW/cm
2
Maximum detection threshold
irradiance
λ = 850 nm - 900 nm
E
E
5
e
e
kW/m
(500)
2
(mW/cm )
2
Receiver input irradiance for low λ = 850 nm - 900 nm
4
(0.4)
mW/m
*)
t , t < 40 ns,
2)
signal suppression
No Rxd signal
r
f
(µW/cm
t
= 1.6 µs @ f = 115 kHz,
po
no output signal allowed
10 % to 90 %, C = 15 pF
Rise time of output signal
Fall time of output signal
t
10
10
100
100
3.0
ns
ns
µs
ns
L
r(Rxd)
90 % to 10 %, C = 15 pF
t
f(Rxd)
L
Rxd pulse width of output signal input pulse length > 1.2 µs
t
1.65
2.0
PW
2
Stochastic jitter, leading edge
250
input irradiance = 100 mW/m ,
≤ 115.2 kbit/s
Standby /Shutdown delay,
receiver startup time
after shutdown active or
power-on
150
µs
µs
**)
Latency
t
100
L
150
*)
Equivalent to IrDA Background Light and Electromagnetic Field Test: Fluorescent Lighting Immunity
**)
Compliment to IrDA® SIR
www.vishay.com
6
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Transmitter
Tested @ T
= 25 °C, V
= V
= 2.7 V to 5.5 V unless otherwise noted.
CC2
amb
CC1
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Test Conditions
Symbol
Min
250
Typ.
300
Max
350
Unit
mA
IRED operating current
limitation
No external resistor for current
I
D
*)
limitation
Forward voltage of built-in IRED I = 300 mA
V
1.4
- 1
30
1.8
65
1.9
1
V
f
f
Output leakage IRED current
Output radiant intensity
Txd = 0 V, 0 < V
< 5.5 V
I
µA
CC1
IRED
α = 0 °, 15 °
Txd = High, SD = Low
= 5.0 V, α = 0 °, 15 °
I
mW/sr
e
V
I
0.04
mW/sr
CC1
e
Txd = Low or SD = High
(Receiver is inactive as long as
SD = High)
Output radiant intensity, angle of
half intensity
α
24
°
**)
λ
880
900
nm
p
Peak - emission wavelength
Spectral bandwidth
∆λ
45
nm
ns
Optical rise time, fall time
t
, t
10
100
1.8
ropt fopt
Optical output pulse duration
input pulse width 1.63 µs,
t
1.6
1.63
µs
opt
115.2 kbit/s
input pulse width t
input pulse width t
< 20 µs
≥ 20 µs
t
t
t + 0.15
Txd
µs
µs
%
Txd
Txd
opt
Txd
t
20
300
25
opt
Optical overshoot
*)
Using an external current limiting resistor is allowed and recommended to reduce IRED intensity and operating current when current
reduction is intended to operate at the IrDA low power conditions. E.g. for V
= 3.3 V a current limiting resistor of R = 56 Ω
CC2
S
will allow a power minimized operation at IrDA low power conditions.
**)
Note: Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for
®
the standard Remote Control applications with codes as e.g. Phillips RC5/RC6 or RECS 80.
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
7
TFDU4300
Vishay Semiconductors
VISHAY
In addition, when connecting the described circuit to
the power supply, low impedance wiring should be
used.
When extended wiring is used the inductance of the
power supply can cause dynamically a voltage drop
at VCC2. Often some power supplies are not apply to
follow the fast current rise time. In that case another
4.7 µF (type, see table under C1) at VCC2 will be help-
ful.
Recommended Circuit Diagram
Operated with a clean low impedance power supply
the TFDU4300 needs no additional external compo-
nents. However, depending on the entire system
design and board layout, additional components may
be required (see figure 1).
Under extreme EMI conditions as placing an RF-
transmitter antenna on top of the transceiver, we rec-
ommend to protect all inputs by a low-pass filter, as a
minimum a 12 pF capacitor, especially at the Rxd
port. The transceiver itself withstands EMI at GSM
frequencies above 300 V/m. When interference is
observed, it is picked up by the wiring to the inputs. It
is verified by DPI (direct power injection) measure-
ments that as long as the interfering RF - voltage is
below the logic threshold levels of the inputs and
equivalent levels at the outputs no interference is
expected.
VCC
2
R1
R2
IRED Anode
Vcc
VCC
1
C1
C2
Ground
Vlogic
GND
Mode
SD
SD
Txd
Txd
Rxd
Rxd
IRED Cathode
18096
Figure 2 and figure 3 show examples for circuit dia-
grams to work with low voltage logic and using the
transceiver when VCC1 = Vlogic, just connecting the
responsible pins to each other.
Figure 1. Recommended Application Circuit
Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and
eliminates the inductance of the power supply line.
This one should be a Tantalum or other fast capacitor
to guarantee the fast rise time of the IRED current.
The resistor R1 is the current limiting resistor, which
may be used to reduce the operating current to levels
below the specified controlled values for saving bat-
tery power.
Vishay’s transceivers integrate a sensitive receiver
and a built-in power driver. The combination of both
needs a careful circuit board layout. The use of thin,
long, resistive and inductive wiring should be avoided.
The inputs (Txd, SD) and the output Rxd should be
directly connected (DC - coupled) to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage. R2,
C1 and C2 are optional and dependent on the quality
of the supply voltages VCC1 and injected noise. An
unstable power supply with dropping voltage during
transmission may reduce the sensitivity (and trans-
mission range) of the transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to
the transceiver power supply pins. An Tantalum
capacitor should be used for C1 while a ceramic
capacitor is used for C2.
www.vishay.com
8
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Block Diagram of Transceiver with a Separate
V
Power Supply (I/O voltage follows V voltage swing)
logic
DD
VCC = 3.3 V
VDD = 1.8 V
IR Controller
TFDU4300
Vdd
Vcc2 IREDA(1)
IREDC (2)
TxD (3)
RxD (4)
SD (5)
IRTX
IRRX
IRMODE
R1
47Ω
Vcc1 (6)
Vlogic (7)
(8)
GND
C1
GND
C3
C2
C4
18454
Figure 2.
Block Diagram of Transceiver with a Common Power Supply
for V and V
(I/O voltage follows V voltage swing)
logic
CC
CC
VCC = 3.3 V
IR Controller
TFDU4300
Vdd
Vcc2 IREDA(1)
IREDC (2)
TxD (3)
IRTX
IRRX
RxD (4)
SD (5)
IRMODE
Vcc1 (6)
R1
47Ω
Vlogic (7)
(8)
GND
C4
C3
C2
C1
GND
18455
Figure 3.
One should keep in mind that basic RF - design rules termination. See e.g. "The Art of Electronics" Paul
for circuit design should be taken into account. Espe- Horowitz, Winfield Hill, 1989, Cambridge University
cially longer signal lines should not be used without Press, ISBN: 0521370957.
Table 1.
Recommended Application Circuit Components
Component
C1, C3
C2, C4
R1
Recommended Value
Vishay Part Number
293D 475X9 016B
4.7 µF, 16 V
0.1 µF, Ceramic
depends on current to be adjusted
47 Ω, 0.125 W
VJ 1206 Y 104 J XXMT
R2
CRCW-1206-47R0-F-RT1
I/O manual, the Vishay application notes, or contact
directly Vishay Sales, Marketing or Application.
For operating at RS232 ports the ENDEC TOIM4232
is recommended.
I/O and Software
In the description, already different I/Os are men-
tioned. Different combinations are tested and the
function verified with the special drivers available
from the I/O suppliers. In special cases refer to the
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
9
TFDU4300
Vishay Semiconductors
VISHAY
Truth table
Inputs
Outputs
Remark
2
SD
Txd
x
Rxd
Transmitter
0
Operation
Shutdown
Optical input Irradiance mW/m
x
high
weakly pulled
> 1 ms
(500 kΩ) to V
CC1
low
low
high
x
x
high inactive
high inactive
I
Transmitting
e
high
0
Protection is active
> 50 µs
low
low
low
< 4
high inactive
low (active)
0
Ignoring low signals below the
IrDA defined threshold for noise
immunity
low
> Min. Detection Threshold
Irradiance
< Max. Detection Threshold
Irradiance
0
0
Response to an IrDA compliant
optical input signal
low
low
> Max. Detection Threshold
Irradiance
undefined
Overload conditions can cause
unexpected outputs
Recommended Solder Profile
Current Derating Diagram
90
85
80
75
70
65
240
220
200
180
160
140
120
100
80
10 s max.
@ 230°C
2°C - 4°C/s
120 s - 180 s
2°C - 4°C/s
90 s max
60
60
40
55
50
20
0
4.5
Operating Voltage [V] @ duty cycle 20%
2.0
2.5
3.0
3.5
4.0
5.0
5.5
6.0
0
50
100 150 200 250 300 350
Time ( s )
14874
18097
Figure 4. Recommended Solder Profile
Figure 5. Temperature Derating Diagram
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10
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Package Dimensions in mm
18100
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
11
TFDU4300
Vishay Semiconductors
VISHAY
Reel Dimensions
W
1
Reel Hub
W
2
14017
Tape Width
A max.
N
W min.
W max.
W min.
W max.
1
2
3
3
mm
16
mm
180
330
mm
60
mm
16.4
16.4
mm
22.4
22.4
mm
15.9
15.9
mm
19.4
19.4
16
50
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12
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Tape Dimensions in mm
18306
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
13
TFDU4300
Vishay Semiconductors
VISHAY
18307
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14
Document Number 82614
Rev. 1.4, 26-Jan-04
TFDU4300
Vishay Semiconductors
VISHAY
Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and
operatingsystems with respect to their impact on the health and safety of our employees and the public, as
well as their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are
known as ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs
and forbid their use within the next ten years. Various national and international initiatives are pressing for an
earlier ban on these substances.
Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the
use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments
respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design
and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each
customer application by the customer. Should the buyer use Vishay Semiconductors products for any
unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all
claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal
damage, injury or death associated with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
Document Number 82614
Rev. 1.4, 26-Jan-04
www.vishay.com
15
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