VS-VSKH71/12 [VISHAY]

MODULE THYRISTOR 75A ADD-A-PAK;
VS-VSKH71/12
型号: VS-VSKH71/12
厂家: VISHAY    VISHAY
描述:

MODULE THYRISTOR 75A ADD-A-PAK

文件: 总9页 (文件大小:320K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
Vishay Semiconductors  
AAP Gen 7 (TO-240AA) Power Modules  
Thyristor/Diode and Thyristor/Thyristor, 75 A  
FEATURES  
• High voltage  
• Industrial standard package  
• Low thermal resistance  
• UL approved file E78996  
• Designed and qualified for industrial level  
• Material categorization: for definitions of compliance  
please see www.vishay.com/doc?99912  
BENEFITS  
ADD-A-PAK  
• Excellent thermal performances obtained by the usage of  
exposed direct bonded copper substrate  
PRIMARY CHARACTERISTICS  
• Up to 1600 V  
IT(AV) or IF(AV)  
75 A  
Type  
Modules - thyristor, standard  
AAP Gen 7 (TO-240AA)  
• High surge capability  
• Easy mounting on heatsink  
Package  
MECHANICAL DESCRIPTION  
ELECTRICAL DESCRIPTION  
The AAP Gen 7 (TO-240AA), new generation of AAP module,  
combines the excellent thermal performances obtained by  
the usage of exposed direct bonded copper substrate, with  
advanced compact simple package solution and simplified  
internal structure with minimized number of interfaces.  
These modules are intended for general purpose high  
voltage applications such as high voltage regulated power  
supplies, lighting circuits, temperature and motor speed  
control circuits, UPS and battery charger.  
MAJOR RATINGS AND CHARACTERISTICS  
SYMBOL  
IT(AV) or IF(AV)  
IO(RMS)  
CHARACTERISTICS  
VALUES  
75  
UNITS  
85 °C  
As AC switch  
50 Hz  
165  
A
1300  
ITSM,  
IFSM  
60 Hz  
1360  
50 Hz  
8.45  
I2t  
kA2s  
60 Hz  
7.68  
I2t  
VRRM  
TStg  
TJ  
84.5  
kA2s  
V
Range  
400 to 1600  
-40 to +125  
-40 to +125  
°C  
°C  
Revision: 26-Jul-2018  
Document Number: 94631  
1
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
Vishay Semiconductors  
ELECTRICAL SPECIFICATIONS  
VOLTAGE RATINGS  
VRRM, MAXIMUM  
REPETITIVE PEAK  
REVERSE VOLTAGE  
V
V
RSM, MAXIMUM  
VDRM, MAXIMUM REPETITIVE  
I
RRM, IDRM  
VOLTAGE  
TYPE NUMBER  
CODE  
NON-REPETITIVE PEAK  
PEAK OFF-STATE VOLTAGE,  
AT 125 °C  
mA  
REVERSE VOLTAGE  
V
GATE OPEN CIRCUIT  
V
04  
06  
08  
400  
600  
500  
700  
400  
600  
800  
900  
800  
VS-VSK.71  
10  
12  
14  
16  
1000  
1200  
1400  
1600  
1100  
1300  
1500  
1700  
1000  
1200  
1400  
1600  
15  
ON-STATE CONDUCTION  
PARAMETER  
SYMBOL  
IT(AV)  
TEST CONDITIONS  
VALUES  
UNITS  
Maximum average on-state current (thyristors)  
Maximum average forward current (diodes)  
180° conduction, half sine wave,  
75  
TC = 85 °C  
IF(AV)  
Maximum continuous RMS on-state current,  
as AC switch  
or  
IO(RMS)  
165  
I(RMS)  
I(RMS)  
A
t = 10 ms  
t = 8.3 ms  
t = 10 ms  
t = 8.3 ms  
t = 10 ms  
t = 8.3 ms  
t = 10 ms  
t = 8.3 ms  
1300  
1360  
1093  
1140  
8.45  
7.68  
5.97  
5.45  
No voltage  
reapplied  
ITSM  
or  
IFSM  
Sinusoidal  
half wave,  
initial TJ = TJ maximum  
Maximum peak, one-cycle non-repetitive  
on-state or forward current  
100 % VRRM  
reapplied  
No voltage  
reapplied  
Maximum I2t for fusing  
I2t  
Initial TJ = TJ maximum  
kA2s  
100 % VRRM  
reapplied  
t = 0.1 ms to 10 ms, no voltage reapplied   
TJ = TJ maximum  
Maximum I2t for fusing  
I2t (1)  
84.5  
kA2s  
Low level (3)  
0.96  
1.08  
3.28  
2.86  
(2)  
Maximum value or threshold voltage  
VT(TO)  
TJ = TJ maximum  
V
High level (4)  
Low level (3)  
Maximum value of on-state   
slope resistance  
(2)  
rt  
TJ = TJ maximum  
m  
High level (4)  
VTM  
VFM  
ITM = x IT(AV)  
TJ = 25 °C  
Maximum peak on-state or forward voltage  
1.72  
150  
V
IFM = x IF(AV)  
Maximum non-repetitive rate of rise of  
turned on current  
TJ = 25 °C, from 0.67 VDRM,  
ITM = x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs  
dI/dt  
A/μs  
TJ = 25 °C, anode supply = 6 V,  
resistive load, gate open circuit  
Maximum holding current  
Maximum latching current  
IH  
IL  
250  
400  
mA  
TJ = 25 °C, anode supply = 6 V, resistive load  
Notes  
(1)  
(2)  
(3)  
(4)  
I2t for time tx = I2t x tx  
Average power = VT(TO) x IT(AV) + rt x (IT(RMS)  
16.7 % x x IAV < I < x IAV  
2
)
I > x IAV  
Revision: 26-Jul-2018  
Document Number: 94631  
2
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
Vishay Semiconductors  
TRIGGERING  
PARAMETER  
SYMBOL  
PGM  
TEST CONDITIONS  
VALUES  
12  
UNITS  
Maximum peak gate power  
Maximum average gate power  
Maximum peak gate current  
Maximum peak negative gate voltage  
W
A
PG(AV)  
IGM  
3.0  
3.0  
- VGM  
10  
TJ = -40 °C  
TJ = 25 °C  
TJ = 125 °C  
TJ = -40 °C  
TJ = 25 °C  
TJ = 125 °C  
4.0  
V
Anode supply = 6 V  
resistive load  
Maximum gate voltage required to trigger  
Maximum gate current required to trigger  
VGT  
2.5  
1.7  
270  
150  
80  
Anode supply = 6 V  
resistive load  
IGT  
mA  
Maximum gate voltage that will not trigger  
Maximum gate current that will not trigger  
VGD  
IGD  
TJ = 125 °C, rated VDRM applied  
TJ = 125 °C, rated VDRM applied  
0.25  
6
V
mA  
BLOCKING  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
VALUES  
UNITS  
Maximum peak reverse and off-state   
leakage current at VRRM, VDRM  
IRRM,  
IDRM  
TJ = 125 °C, gate open circuit  
15  
mA  
3000 (1 min)  
3600 (1 s)  
Maximum RMS insulation voltage  
VINS  
50 Hz  
V
Maximum critical rate of rise of off-state voltage  
dV/dt  
TJ = 125 °C, linear to 0.67 VDRM  
1000  
V/μs  
THERMAL AND MECHANICAL SPECIFICATIONS  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
VALUES  
UNITS  
Junction operating and storage  
temperature range  
TJ, TStg  
-40 to +125  
°C  
Maximum internal thermal resistance,  
junction to case per leg  
RthJC  
RthCS  
DC operation  
0.29  
0.1  
°C/W  
Nm  
Typical thermal resistance,  
case to heatsink per module  
Mounting surface flat, smooth and greased  
A mounting compound is recommended and the  
torque should be rechecked after a period of  
3 hours to allow for the spread of the compound.  
to heatsink  
busbar  
4
3
Mounting torque 10 %  
75  
g
Approximate weight  
Case style  
2.7  
oz.  
JEDEC®  
AAP Gen 7 (TO-240AA)  
R CONDUCTION PER JUNCTION  
SINE HALF WAVE CONDUCTION  
RECTANGULAR WAVE CONDUCTION  
DEVICES  
UNITS  
180°  
120°  
90°  
60°  
30°  
180°  
120°  
90°  
60°  
30°  
VSK.71..  
0.052  
0.062  
0.079  
0.116  
0.197  
0.037  
0.064  
0.085  
0.121  
0.200  
°C/W  
Note  
Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC  
Revision: 26-Jul-2018  
Document Number: 94631  
3
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
Vishay Semiconductors  
130  
120  
110  
100  
90  
180  
180°  
120°  
90°  
RthJC (DC) = 0.29°C/W  
160  
140  
120  
100  
80  
60°  
30°  
DC  
RMS limit  
180°  
120°  
90°  
60  
40  
80  
60°  
20  
Per leg, Tj = 125°C  
30°  
70  
0
0
10 20 30 40 50 60 70 80  
Average on-state current (A)  
0
20  
Average on-state current (A)  
Fig. 4 - On-State Power Loss Characteristics  
40  
60  
80  
100 120  
Fig. 1 - Current Ratings Characteristics  
1200  
130  
120  
110  
100  
90  
At any rated load condition and with  
rated Vrrm applied following surge  
RthJC (DC) = 0.29°C/W  
1100  
1000  
900  
800  
700  
600  
500  
Initial Tj = Tj max  
@ 60 Hz 0.0083 s  
@ 50 Hz 0.0100s  
DC  
180°  
120°  
90°  
60°  
30°  
80  
Per leg  
70  
0
20  
40  
60  
80  
100 120  
1
10  
100  
Number of equal amplitude half cycle current pulses (N)  
Average on-state current (A)  
Fig. 2 - Current Ratings Characteristics  
Fig. 5 - Maximum Non-Repetitive Surge Current  
140  
120  
100  
80  
1400  
180°  
120°  
90°  
Maximum Non-repetitive Surge Current  
Versus Pulse Train Duration. Control  
of conduction may not be maintained.  
Initial Tj = 125°C  
1200  
1000  
800  
60°  
30°  
No Voltage Reapplied  
Rated Vrrm reapplied  
RMS limit  
60  
40  
600  
20  
Per leg  
Per leg, Tj = 125°C  
0
400  
0
10 20 30 40 50 60 70 80  
Average on-state current (A)  
0.01  
0.1  
1
Pulse train duration (s)  
Fig. 3 - On-State Power Loss Characteristics  
Fig. 6 - Maximum Non-Repetitive Surge Current  
Revision: 26-Jul-2018  
Document Number: 94631  
4
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
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300  
RthSA = 0.1 °C/W  
0.2 °C/W  
0.3 °C/W  
180°  
250  
120°  
90°  
60°  
30°  
0.4 °C/W  
0.5 °C/W  
0.7 °C/W  
1 °C/W  
1.5 °C/W  
3 °C/W  
200  
150  
100  
50  
VSK.71 Series  
Per module  
Tj = 125°C  
0
0
0
0
20 40 60 80 100 120 140 160 180  
0
20 40 60 80 100 120 140  
Maximum allowable ambient temperature (°C)  
Total RMS output current (A)  
Fig. 7 - On-State Power Loss Characteristics  
700  
600  
500  
400  
300  
200  
100  
0
RthSA = 0.1 °C/W  
0.2 °C/W  
0.3 °C/W  
0.5 °C/W  
1 °C/W  
180°  
(sine)  
180°  
(rect)  
2 °C/W  
2 x VSK.71 Series  
single phase bridge connected  
Tj = 125°C  
0
20 40 60 80 100 120 140  
20 40 60 80 100 120 140 160 180  
Maximum allowable ambient temperature (°C)  
Total output current (A)  
Fig. 8 - On-State Power Loss Characteristics  
800  
700  
600  
500  
400  
300  
200  
100  
0
RthSA = 0.1 °C/W  
0.2 °C/W  
0.3 °C/W  
0.5 °C/W  
1 °C/W  
120°  
(rect)  
3 x VSK.71 Series  
three phase bridge connected  
Tj = 125°C  
40  
Total output current (A)  
Fig. 9 - On-State Power Loss Characteristics  
80  
120  
160  
200  
0
20 40 60 80 100 120 140  
Maximum allowable ambient temperature (°C)  
Revision: 26-Jul-2018  
Document Number: 94631  
5
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
Vishay Semiconductors  
1000  
Per leg  
100  
10  
Tj = 125°C  
Tj = 25°C  
1
0.5  
1.0  
Instantaneous on-state voltage (V)  
Fig. 10 - On-State Voltage Drop Characteristics  
1.5  
2.0  
2.5  
3.0  
3.5  
1
Steady state value  
RthJC = 0.29 °C/W  
(DC operation)  
0.1  
Per leg  
0.01  
0.001  
0.01  
0.1  
Square wave pulse duration (s)  
Fig. 11 - Thermal Impedance ZthJC Characteristics  
1
10  
100  
10  
1
Rectangular gate pulse  
(1) PGM = 200 W, tp = 300 µs  
(2) PGM = 60 W, tp = 1 ms  
(3) PGM = 30 W, tp = 2 ms  
(4) PGM = 12 W, tp = 5 ms  
a)Recommended load line for  
rated di/dt: 20 V, 20ohms  
tr = 0.5 µs, tp >= 6 µs  
b)Recommended load line for  
<= 30%rated di/ dt: 15 V, 40 ohms  
tr = 1 µs, tp >= 6 µs  
(a)  
(b)  
(4) (3) (2)  
(1)  
VGD  
IGD  
I
V
S
K
.7  
1
Series Fre q ue n c y Lim it e d b y PG ( A V )  
0.1  
0.001  
0.01  
0.1  
1
10 100  
1000  
Instantaneous gate current (A)  
Fig. 12 - Gate Characteristics  
Revision: 26-Jul-2018  
Document Number: 94631  
6
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
VS-VSKT71.., VS-VSKH71.., VS-VSKL71.., VS-VSKN71.. Series  
www.vishay.com  
Vishay Semiconductors  
ORDERING INFORMATION TABLE  
Device code  
VS-VS  
K
T
71  
/
16  
1
2
3
4
5
1
2
3
4
5
-
Vishay Semiconductors product  
Module type  
-
-
-
-
Circuit configuration (see Circuit Configuration table)  
Current code (75 A)  
Voltage code (see Voltage Ratings table)  
Note  
To order the optional hardware go to www.vishay.com/doc?95172  
CIRCUIT CONFIGURATION  
CIRCUIT  
CIRCUIT DESCRIPTION  
CIRCUIT DRAWING  
CONFIGURATION CODE  
(1)  
~
1
VSKT  
+
2
(2)  
Two SCRs doubler circuit  
T
H
L
3
4
5
7
6
-
(3)  
G1 K1 K2 G2  
(4) (5) (7) (6)  
(1)  
~
1
VSKH  
VSKL  
VSKN  
+
2
3
(2)  
SCR/diode doubler circuit, positive control  
4
5
-
(3)  
G1 K1  
(4) (5)  
(1)  
~
1
+
2
(2)  
SCR/diode doubler circuit, negative control  
3
6
7
-
(3)  
K2 G2  
(7) (6)  
(1)  
-
1
+
2
(2)  
SCR/diode common anodes  
N
3
4
5
+
(3)  
G1 K1  
(4) (5)  
LINKS TO RELATED DOCUMENTS  
7
Dimensions  
Revision: 26-Jul-2018  
www.vishay.com/doc?95368  
Document Number: 94631  
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Outline Dimensions  
Vishay Semiconductors  
ADD-A-PAK Generation VII - Thyristor  
DIMENSIONS in millimeters (inches)  
Fast-on tab ꢀ.8 x 0.8 (0.110 x 0.03ꢁ  
Viti M5 x 0.8  
Screws M5 x 0.8  
15.5 0.5  
(0.6 0.0ꢀ0ꢁ  
18 (0.7ꢁ REF.  
80 0.3 (3.15 0.01ꢀꢁ  
15 0.5 (0.59 0.0ꢀ0ꢁ  
ꢀ0 0.5 (0.79 0.0ꢀ0ꢁ  
ꢀ0 0.5 (0.79 0.0ꢀ0ꢁ  
9ꢀ 0.75 (3.6 0.030ꢁ  
Document Number: 95368  
Revision: 11-Nov-08  
For technical questions, contact: indmodules@vishay.com  
www.vishay.com  
1
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© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED  
Revision: 09-Jul-2021  
Document Number: 91000  
1

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