8R128SEA0402C15 [WEDC]
SRAM Card, 8KX8, 150ns, CMOS, CARD-68;
| 型号： | 8R128SEA0402C15 |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | SRAM Card, 8KX8, 150ns, CMOS, CARD-68 静态存储器 |
| 文件： | 总11页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEA01-SEA04
White Electronic Designs
PCMCIA SRAM MEMORY CARD — SEA SERIES
SRAM Memory Card 128KB Through 512KB
FEATURES
GENERAL DESCRIPTION
High Performance SRAM Memory Card
The WEDC SEA SRAM Series memory cards offer a high
performance nonvolatile storage solution for code and
data storage, disk caching, and write intensive mobile and
embedded applications.
Single 5 Volt Supply
Fast Access Times: 150ns
x8 Interface (subset of PCMCIA standard)
Packaged in PCMCIA type I housing the WEDC SRAM
SEA series is based on 1 or 4Mbit SRAM memories,
providing densities from 128 Kbytes to 512 Kbytes.
Low Power CMOS technology provides very low
power and reliable data retention characteristics
• Operating current 80mA maximum
The SEA series of SRAM memory cards requires a 5V
power supply and operates at speeds to 150ns. The cards
are based on advanced CMOS technology providing very
low power and reliable data retention characteristics.
WEDC’s SRAM cards contain a rechargeable lithium
battery and recharge circuitry, eliminating the need for
replaceable batteries found in many SRAM cards.
• Standby current < 100μA typical
Rechargeable Lithium battery with recharge
circuitry
• Eliminates the need for replaceable batteries
• Standby current during recharge typically < 2mA
• Battery backup time
WEDC’s standard cards are shipped with WEDC’s SRAM
Logo. Cards are also available with blank housings
(no Logo). The blank housings are available in both a
recessed (for label) and flat housing. Please contact
WEDC sales representative for further information on
Custom artwork.
18 months - typical typical based on 512kB (lower
densities will have greater storage times)
Unlimited write cycles, no endurance issues
2KB EEPROM attribute memory containing CIS
(optional)
Optional Hardware Write Protect Switch
PC Card Standard Type I Form Factor
February 2007
Rev. 4
1
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BLOCK DIAGRAM
ADDREsS BUS
[A0..A18]
512KB SRAM Card Shown
+
+
+ +
+
decoder
and
CS#
CS#-A
SRAM
512K x 8
CE1#
CE2#
WE#
OE#
control
logic
RD#
WR#
RD#
REG#
A0
WR#
CTRL
[A1..A11]
ATTRIBUTE
MEMORY
optional
CS#-A
S1
RD#
Vcc
WP
WR#
Write Prot
Switch
VS1
NC
NC
VS2
CTRL
I/O BUFFER
GND
[DO..D7]
[DO..D7]
Notes:
1. pull down resistor (min 100k)
+
Vcc
+
Power Management
and
2. pull up resistor (min 10k)
BVD1
BVD2
Battery Control
to internal
power
supply
Lithium Bat.
February 2007
Rev. 4
2
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PINOUT
Pin
1
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
I/O
Function
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal name
GND
CD1#
NC
I/O
Function
Ground
Active
2
I/O
Data bit 3
O
I/O
I/O
I/O
I/O
I
Card Detect 1
Data bit 11
LOW
3
I/O
Data bit 4
4
I/O
Data bit 5
NC
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
5
I/O
Data bit 6
NC
6
I/O
Data bit 7
NC
7
I
I
I
I
I
I
I
I
I
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
LOW
LOW
NC
8
NC
I
LOW
N.C.
9
VS1
NC
O
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
NC
A8
A17
A18
NC
I
I
I
I
I
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
A13
A14
WE#
NC
512KB(2)
LOW
NC
NC
Vcc
Supply Voltage
Vcc
NC
NC
.
A16
A15
A12
A7
I
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
128KB(2)
NC
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
I
NC
I
NC
I
NC
A6
I
VS2
NC
O
O
N.C.
Low
Low
(3)
A5
I
A4
I
I
Wait#
NC
Extended Bus Cycle
A3
A2
I
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
I
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
A1
I
O
A0
I
O
DQ0
DQ1
DQ2
WP
I/O
I/O
I/O
O
I/O
I/O
O
Data bit 1
Data bit 9
Data bit 2
Data bit 10
Write Potect
Ground
HIGH
O
Card Detect 2
Ground
LOW
GND
Notes:
1. CD1# and CD2# are grounded internal to PC Card.
2. Shows density for which specified address bit is MSB. Higher order address bits are
no connects (i.e., 512kB A18 is MSB, A19 - A21 are NC).
3. BVD1 is an open drain output with a 10K ohm internal pull-up resistor.
February 2007
Rev. 4
3
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PACKAGE DIMENSIONS
Type I
Interconnect area
3.0mm MIN
10.0mm MIN
1.6mm
(0.400”)
0.05
1.0mm 0.05
(0.039”)
(0.063”)
Substrate area
54.0mm 0.10
(2.126”)
85.6mm 0.20
1.0mm 0.05
(0.039”)
(3.370”)
10.0mm MIN
(0.400”)
3.3mm T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
February 2007
Rev. 4
4
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CARD SIGNAL DESCRIPTION
Symbol
Type
Name and Function
A0 - A25
INPUT
ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not
used in word access mode. A25 is the most significant bit. (address pins used are based on card density,see pinout
for highest used address pin)
DQ0 – DQ7
DQ8 – DQ15
INPUT/OUTPUT
INPUT
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ0 - DQ7 constitute the lower
(even) byte and DQ8 - DQ15 the upper (odd) byte. Upper byte is Not Connected on this card.
CE1#, CE2#
CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# control signal in PCMCIA standard, to access
high byte, - not used on this card
OE#
INPUT
OUTPUT ENABLE: Active low signal enabling read data from the memory card.
WRITE ENABLE: Active low signal gating write data to the memory card.
READY/BUSY OUTPUT: Not used for SRAM cards
WE#
INPUT
RDY/BSY #
CD1#, CD2#
OUTPUT
OUTPUT
CARD DETECT 1 and 2: Provide card insertion detection. These signals are connected to ground internally on the
memory card. The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these signal pins.
WP
OUTPUT
N.C.
WRITE PROTECT: Follows hardware Write Protect Switch. When Switch is placed in on position, signal is pulled high
(10K ohm). When switch is off signal is pulled low.
VPP1, VPP2
VCC
PROGRAM/ERASE POWER SUPPLY: Not used for SRAM cards.
CARD POW ER SUPPLY: 5.0V for all internal circuitry.
GND
GROUND: for all internal circuitry.
REG #
INPUT
ATTRIBUTE MEMORY SELECT: only used with cards built with optional attribute memory.
RESET: Not used for SRAM cards
RST
INPUT
WAIT #
BVD1, BVD2
OUTPUT
OUTPUT
WAIT: This signal is pulled high internally for compatibility. No wait states are generated.
BATTERY VOLTAGE DETECT: Provides status of Battery voltage.
BVD2 = BVD1 = VOH (battery voltage is guaranteed to retain data)
BVD2 = VOL, BVD1 = VOH (data is valid, battery recharge required)
BVD2 = BVD1 = VOL (data may no longer be valid, battery requires extended recharge)
VS1, VS2
OUTPUT
VOLTAGE SENSE: Notifies the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V,
16 bit card has been inserted.
RFU
N.C.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD: pin may be driven or left floating
FUNCTIONAL TRUTH TABLE
READ function
Function Mode
Standby Mode
Common Memory
D15-D8
Attribute Memory
D15-D8
CE2# CE1# OE# WE#
REG#
D7-D0
High-Z
REG#
D7-D0
High-Z
X
X
H
L
X
L
X
H
X
H
High-Z
X
L
High-Z
Byte Access (8 bits)
High-Z
Data Out
High-Z
Data Out
WRITE function
Standby Mode
X
X
H
L
X
H
X
L
X
H
X
X
X
X
L
X
X
X
Byte Access (8 bits)
Data In
Data In
February 2007
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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ABSOLUTE MAXIMUM RATINGS2
Notes:
Operating Temperature TA (ambient)
1. During transitions, inputs may undershoot to -2.0V or overshoot to VCC +2.0V for
periods less than 20ns.
Commercial
Industrial
0°C to +60 °C
2. Stress greater than those listed under “Absolute Maximum ratings” may cause
permanent damage to the device. This is a stress rating only and functional operation
at these or any other conditions greater than those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
-40°C to +85 °C
Storage Temperature
Commercial
0°C to +60 °C
Industrial
-40°C to +85 °C
-0.5V to VCC+0.5V (1)
-0.5V to +7.0V
Voltage on any pin relative to VSS
V
CC supply Voltage relative to VSS
DC CHARACTERISTICS1
CMOS Test Conditions: VIL = VSS ± 0.2V, VIH = VCC ± 0.2V
Sym
ICC
Parameter
VCC Active Current
Density
128KB
256KB
All
Notes
1
Min
Typ(3)
40
40
Max
80
80
Units
mA
Test Conditions
VCC = 5.25V
tcycle = 150ns
ICCS
ILI
VCC Standby Current
Input Leakage Current
Output Leakage Current
2,4
5,6
6
< 0.1
< 1
10
mA
μA
μA
VCC = 5.25V
Control Signals = VCC
VCC = VCC MAX
VIN =VCC or VSS
VCC = VCC MAX
All
All
±20
±20
ILO
VOUT =VCC or VSS
VIL
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
All
All
All
All
6
6
6
6
0
3.85
0.8
VCC +0.5
0.4
V
V
V
V
VIH
VOL
VOH
IOL = 3.2mA
IOH = -2.0mA
VCC- 0.4
VCC
Notes:
1. All currents are for x8 mode and are RMS values unless otherwise specified.
2. Control Signals: CE1#, CE2#, OE#, WE#, REG#.
3. Typical: VCC = 5V, T = +25C.
4. ICCS includes battery recharge current. Value depends on battery discharge level. ICCS min is specified for fully charged battery.
CCS typical value is specified for battery discharge to 2.7V. ICCS max is specified for a fully discharged battery (0V). Battery will recharge to 1.5V in 20 sec.
I
5. Values are the same for byte and word wide modes for all card densities.
6. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 μA when VIN = GND due to internal pull-up resistors
BATTERY CHARACTERISTICS
Parameter
Battery Life
Density
All
128KB
512KB
Notes
(1)
(2)
Type I
10
24
Units
years
Conditions
Normal operation, T=25C
T=25C
Battery backup time is a calculated value and is not guaranteed. This should not be used
to schedule battery recharging.
Battery
Backup Time
months
(typical)
18
Notes:
1. Battery Life refers to functional lifetime of battery.
2. Battery backup time is density and temperature dependent.
February 2007
Rev. 4
6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
SEA01-SEA04
White Electronic Designs
AC CHARACTERISTICS
Read Timing Parameters
150ns
SYM (PCMCIA)
tRC
Parameter
Min
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
150
ta(A)
Address Access Time
150
150
75
ta(CE)
ta(OE)
tsu(A)
Card Enable Access Time
Output Enable Access Time
Address Setup Time
20
0
tsu(CE)
th(A)
Card Enable Setup Time
Address Hold Time
20
20
0
th(CE)
tv(A)
Card Enable Hold Time
Output Hold from Address Change
Output Disable Time from CE#
Output Disable Time from OE#
Output Enable Time from CE#
Output Enable Time from OE#
tdis(CE)
tdis(OE)
75
75
t
dis(CE)
5
5
tdis(CE)
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
Read Timing Diagram
tc(R)
ta(A)
th(A)
A[25::0], REG#
CE1#, CE2#
tv(A)
ta(CE)
tsu(CE)
NOTE 1
NOTE 1
th(CE)
ta(OE)
tsu(A)
tdis(CE)
OE#
tdis(OE)
ten(OE)
D[15::0]
DATA VALID
Note: Signal may be high or low in this area.
February 2007
Rev. 4
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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AC CHARACTERISTICS
Write Timing Parameters
150ns
SYM (PCMCIA)
tCW
Parameter
Min
150
80
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle Time
tw(WE)
Write Pulse Width
tsu(A)
Address Setup Time
20
tsu(A-WEH)
tsu(CE-WEH)
tsu(D-WEH)
th(D)
Address Setup Time for WE#
Card Enable Setup Time for WE#
Data Setup Time for WE#
Data Hold Time
100
100
50
20
trec(WE)
tdis(WE)
tdis(OE)
Write Recover Time
20
Output Disable Time from WE#
Output Disable Time from OE#
Output Enable Time from WE#
Output Enable Time from OE#
Output Enable Setup from WE#
Output Enable Hold from WE#
Card Enable Setup Time from OE#
Card Enable Hold Time
75
75
ten(WE)
5
5
tdis(OE)
tsu(OE-WE)
th(OE-WE)
tsu(CE)
10
10
0
th(CE)
20
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
Write Timing Diagram
tc(W)
A [25::0], REG#
tsu(A-WEH)
trec(WE)
th(CE)
tsu(CE-WEH)
tsu(CE)
CE1#, CE2#
OE#
NOTE 1
NOTE 1
th(OE-WE)
th(D)
tw(WE)
tsu(A)
WE#
tsu(OE-WE)
NOTE 2
tsu(D-WEH)
D[15::0](Din)
DATA INPUT
tdis(WE)
tdis(OE)
ten(OE)
ten(WE)
NOTE 2
D[15::0](Dout)
Note:
1. Signal may be high or low in this area.
2. When the data I/O pins are in the output state, no signals shall be
applied to the data pins (D15 -D0) by the host system.
February 2007
Rev. 4
8
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
SEA01-SEA04
White Electronic Designs
PRODUCT MARKING
WED 8P512SEA0100C15 C995 9915
EDI
Date code
Lot code / trace number
Part number
Company Name
Note:
Some products are currently marked with our pre-merger company name/
acronym (EDI). During our transition period, some products will also be marked
with our new company name/acronym (WED). Starting October 2001 all
PCMCIA products will be marked only with the WED prefix.
PRODUCT NUMBERING
8 P 512 SEA01 00 C 15
Card access time
15
25
150ns
250ns
Temperature range
C
I
Commercial
Industrial
0°C to +70°C
-40°C to +85°C
Packaging option
00 Standard, type 1
Card family and version
– See Card Family and Version Info. for
details (next page)
Card capacity
512 512KB
PC card
P
R
Standard PCMCIA
Ruggedized PCMCIA
Card technology
7
8
FLASH
SRAM
February 2007
Rev. 4
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ORDERING INFORMATION
8P XXX SEA YY SS T ZZ
where
XXX: 128
128KB
512KB
512
YY:
SS:
01
02
03
04
no attribute memory, no Write Protect Switch
with attribute memory, no Write Protect Switch
with Write Protect Switch, no attribute memory
with attribute memory, with Write Protect Switch
00
01
02
WEDC SRAM Logo Type I
Blank Housing,
Blank Housing,
Type I
Type I Recessed
T:
C
I
Commercial
Industrial
ZZ:
15
150ns
February 2007
Rev. 4
10
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SEA01-SEA04
White Electronic Designs
Document Title
PCMCIA SRAM Memory Card — SEA Series
SRAM Memory Card 128kB through 512kB
Revision History
Rev #
History
Release Date Status
Rev 1
Rev 2
Rev 3
Rev 4
1.0 Initial release
6-1-98
5-27-99
6-1-00
2.0 Company/logo change
3.0 Added page 8, changed page header
4.0 Updated data sheet title from "Flash Memory Card" to
"SRAM Memory Card".
February 2007
Final
February 2007
Rev. 4
11
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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