EDI88130LP85NC [WEDC]

Standard SRAM, 128KX8, 85ns, CMOS, CDSO32,;


型号：	EDI88130LP85NC
厂家：	WHITE ELECTRONIC DESIGNS CORPORATION
描述：	Standard SRAM, 128KX8, 85ns, CMOS, CDSO32, CD 静态存储器内存集成电路
文件：	总8页 (文件大小：387K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

EDI88128C

White Electronic Designs

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance,

Monolithic CMOS Static RAM organized as 128Kx8.

FEATURES

ꢀ

Access Times of 70, 85, 100ns

The device is also available as EDI88130C with an

additional chip select line (CS2) which will automatically

power down the device when proper logic levels are

applied.

ꢀ

Available with Single Chip Selects (EDI88128) or

Dual Chip Selects (EDI88130)

ꢀ

2V Data Retention (LP Versions)

CS# and OE# Functions for Bus Control

TTL Compatible Inputs and Outputs

Fully Static, No Clocks

The second chip select line (CS2) can be used to provide

system memory security during power down in non-battery

backed up systems and simpliﬁy decoding schemes in

memory banking where large multiple pages of memory

are required.

Organized as 128Kx8

Industrial, Military and Commercial Temperature

Ranges

The EDI88128C and the EDI88130C have eight bi-

directional input-output lines to provide simultaneous

access to all bits in a word. An automatic power down

feature permits the on-chip circuitry to enter a very low

standby mode and be brought back into operation at a

speed equal to the address access time.

ꢀ

Thru-hole and Surface Mount Packages JEDEC

Pinout

• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)

• 32 lead Ceramic SOJ (Package 140)

Single +5V ( 10ꢀ) Supply Operation

Low power versions, EDI88128LP and EDI88130LP, offer

a 2V data retention function for battery back-up opperation.

Military product is available compliant to Appendix A of

MIL-PRF-38535.

ꢀ

FIGURE 1 – PIN CONFIGURATION

PIN DESCRIPTION

I/O0-7

A0-16

WE#

Data Inputs/Outputs

Address Inputs

Write Enable

32 DIP

32 SOJ

CS1#, CS2

OE#

V_CC

V_SS

Chip Selects

Top View

Output Enable

Power (+5V 10ꢀ%

Ground

A16

A14

A12

32 VCC

31 A15

30 NC/CS2*

29 WE#

28 A13

27 A8

Not Connected

26 A9

BLOCK DIAGRAM

25 A11

24 OE#

23 A10

22 CS1#

21 I/O7

20 I/O6

19 I/O5

18 I/O4

17 I/O3

A2 10

A1 11

AØ 12

I/OØ 13

I/O1 14

I/O2 15

VSS 16

WE#

CS1#

CS2

OE#

* Pin 30 is NC for 88128 or CS2 for 88130.

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

ABSOLUTE MAXIMUM RATINGS

TRUTH TABLE

Parameter

Voltage on any pin relative to V_SS

Unit

OE# CS1# CS2# WE#

Mode

Standby

Output

High Z

Data Out

Data In

Power

Icc2, Icc3

Icc1

-0.5 to 7.0

Operating Temperature T_A(Ambient)

Commercial

Industrial

Output Deselect

Read

0 to +70

-40 to +85

-55 to +125

-65 to +150

°C

Military

Write

Icc1

Storage Temperature, Plastic

Power Dissipation

Output Current

175

°C

Junction Temperature, T_J

NOTE:

Stress greater than those listed under "Absolute Maximum Ratings" may cause

Recommended Operating Conditions

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions greater than those indicated in the

operational sections of this speciﬁcation is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

Parameter

Symbol

V_CC

V_SS

Min

4.5

Typ

5.0

Max

5.5

Unit

Supply Voltage

Input High Voltage

Input Low Voltage

V_IH

V_IL

2.2

-0.3

—

V_CC+0.5

+0.8

CAPACITANCE

T_A= +25°C

Parameter

Address Lines

Input/Output Lines

Symbol

C_I

C_O

Condition

V_IN= V_CCor V_SS, f = 1.0MHz

V_OUT= V_CCor V_SS, f = 1.0MHz 14 pF

Max Unit

12 pF

These parameters are sampled, not 100ꢀ tested.

DC CHARACTERISTICS

V_CC= 5V, -55°C ≤ T_A≤ +125°C

Parameter

Input Leakage Current

Output Leakage Current

Symbol Conditions

Min

Typ

—

Max

+10

120

110

0.4

—

Units

µA

I_LI

V_IN= 0V to V_CC

-5

-10

—

2.4

I_LO

V_I/O= 0V to V_CC, CS1# ≥ V_IHand/or CS2# ≤ V_IL

WE#, CS1# = V_IL, I_I/O= 0mA, Min Cycle

CS2# = V_IH

CS1# ≥ V_IHand/or CS2# ≤ V_IL, V_IN≥ V_IHor ≤ V_IL

CS1# ≥ V_CC-0.2V and/or CS2# ≤ V_CC+0.2V

V_IN≥ V_CC-0.2V or V_IN≤ 0.2V

I_OL= 2.1mA

(70-85ns%

(100ns%

Operating Power Supply Current

Standby (TTL% Power Supply Current

Full Standby Power Supply Current

I_CC1

I_CC2

I_CC3

—

Output Low Voltage

Output High Voltage

V_OL

V_OH

I_OH= -1.0mA

NOTE: DC test conditions : V_IL= 0.3V, V_IH= V_CC-0.3V

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

AC Characteristics – Read Cycle

V_CC= 5V, V_SS= 0V, -55°C ≤ T_A≤ +125°C

Symbol 70ns

85ns

100ns

Units

Max

Parameter

JEDEC

t_AVAV

Alt.

t_RC

Min

Max

Min

Max

Min

100

Read Cycle Time

Address Access Time

Chip Select Access Time

t_AVQV

t_ELQV

t_SHQV

t_ELQX

t_SHQX

t_EHQZ

t_SLQZ

t_AVQX

t_GLQV

t_GLQX

t_GHQZ

t_AA

100

t_ACS

t_CLZ

t_CHZ

t_OH

t_OE

t_OLZ

t_OHZ

Chip Select to Output in Low Z (1%

Chip Disable to Output in High Z (1%

Output Hold from Address Change

Output Enable to Output Valid

Output Enable to Output in Low Z (1%

Output Disable to Output in High Z (1%

1. This parameter is guaranteed by design but not tested.

AC Test Conditions

Figure 1

Figure 2

Input Pulse Levels

V_SSto 3.0V

5ns

1.5V

Figure 1

Vcc

Input Rise and Fall Times

Input and Output Timing Levels

Output Load

480Ω

30pF

480Ω

5pF

NOTE: For t_EHQZ, t_GHQZand t_WLQZ, CL = 5pF Figure 2

255Ω

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

AC CHARACTERISTICS – WRITE CYCLE

V_CC= 5V, V_SS= 0V, -55°C ≤ T_A≤ +125°C

Symbol 70ns

85ns

100ns

Units

Max

Parameter

JEDEC

Alt.

Min

Max

Min

Max

Min

Write Cycle Time

t_AVAV

t_WC

100

Chip Select to End of Write

t_ELWH

t_ELEH

t_SHWH

t_SHSL

t_CW

Address Setup Time

t_AVWL

t_AVEL

t_AVSH

t_AS

Address Valid to End of Write

Write Pulse Width

t_AVWH

t_AW

t_WLWH

t_WLEH

t_WLSL

t_WP

Write Recovery Time

Data Hold Time

t_WHAX

t_EHAX

t_SLAX

t_WR

t_WHDX

t_EHDX

t_SLDX

t_DH

Write to Output in High Z (1%

Data to Write Time

t_WLQZ

t_WHZ

t_DVWH

t_DVEH

t_DVSL

t_DW

Output Active from End of Write (1%

t_WHQX

t_WLZ

1. This parameter is guaranteed by design but not tested.

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

FIGURE 2 – TIMING WAVEFORM — READ CYCLE

t_AVAV

ADDRESS

CS1#

t_AVQV

t_ELQV

t_ELQX

t_AVAV

t_EHQZ

t_SLQZ

t_GHQZ

ADDRESS

DATA I/O

CS2

ADDRESS 1

ADDRESS 2

t_SHQV

t_SHQX

t_AVQV

t_AVQX

OE#

DATA 1

DATA 2

t_GLQV

t_GLQX

DATA I/O

READ CYCLE 1 (WE# HIGH; OE#, CS# LOW)

READ CYCLE 2 (WE# HIGH)

FIGURE 3 – WRITE CYCLE 1

t_AVAV

ADDRESS

t_AVWH

t_AVWL

t_WHAX

t_WLWH

WE#

CS1#

t_ELWH

t_WHQX

t_WHDX

t_SHWH

t_DVWH

DATA IN

DATA VALID

t_WLQZ

HIGH Z

DATA OUT

WRITE CYCLE 1 - LATE WRITE, WE# CONTROLLED

FIGURE 4 – WRITE CYCLE 2

WRITE CYCLE 3

t_AVAV

ADDRESS

WE#

ADDRESS

WE#

t_EHAX

t_AVEL

t_SLAX

t_AVSH

t_WLEH

t_WLSL

t_ELEH

t_SHSL

CS1#

CS2

t_DVEH

t_EHDX

t_DVSL

t_SLDX

DATA IN

DATA VALID

WRITE CYCLE 2 - EARLY WRITE, CS1# CONTROLLED

DATA IN

DATA VALID

WRITE CYCLE 3 - EARLY WRITE, CS CONTROLLED

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

DATA RETENTION CHARACTERISTICS (EDI88128LP & EDI88130LP ONLY)

-55°C ≤ T_A≤ +125°C

Characteristic

Low Power Version only

Symbol

Conditions

Min

Typ

Max

Units

Data Retention Voltage

V_DD

I_CCDR

T_CDR

T_R

V_DD= 2.0V

CS1# ≥ V_DD-0.2V

V_IN≥ V_DD-0.2V

or V_IN≤ 0.2V

–

400

–

Data Retention Quiescent Current

Chip Disable to Data Retention Time (1%

Operation Recovery Time (1%

µA

T_AVAV*

–

NOTE:

1. Parameter guaranteed by design, but not tested.

* Read Cycle Time

FIGURE 5 – DATA RETENTION – CS1# CONTROLLED

Data Retention Mode

4.5V

Vcc

VDD

t_CDR

t_R

CS1#

CS1# VDD -0.2V

DATA RETENTION, CS

# CONTROLLED

FIGURE 6 – DATA RETENTION — CS2 CONTROLLED

Data Retention Mode

4.5V

Vcc

VDD

t_CDR

t_R

CS2 ≤ 0.2V

DATA RETENTION, CS

CONTROLLED

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600MILS WIDE)

1.616

1.584

0.620

0.600

0.060

0.040

Pin 1 Indicator

0.200

0.125

0.155

0.115

0.600

NOM

0.020

0.016

0.100

TYP

0.061

0.017

15 x 0.100 = 1.500

ALL DIMENSIONS ARE IN INCHES

PACKAGE 140: 32 LEAD CERAMIC SOJ

0.010

0.006

0.019

0.015

0.840

0.820

0.050

TYP

0.444

0.430

0.379

0.155

0.106

ALL DIMENSIONS ARE IN INCHES

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88128C

White Electronic Designs

ORDERING INFORMATION

EDI 8 8 128 C X X X

WHITE ELECTRONIC DESIGNS

SRAM

ORGANIZATION, 128Kx8

8 130 = Dual Chip Select

TECHNOLOGY:

C = CMOS Standard Power

LP = Low Power

ACCESS TIME (ns)

PACKAGE TYPE:

C = 32 lead Sidebrazed DIP, 600 mil (Package 9)

N = 32 lead Ceramic SOJ (Package 140)

DEVICE GRADE:

B = MIL-STD-883 Compliant

M = Military Screened

I = Industrial

-55°C to +125°C

-40°C to +85°C

0°C to +70°C

C = Commercial

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

EDI88130LP85NC [WEDC]

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