WT7527V-SG160WT-T1 [WELTREND]
PC POWER SUPPLY SUPERVISOR;
| 型号： | WT7527V-SG160WT-T1 |
| 厂家： | 
WELTREND SEMICONDUCTOR |
| 描述： | PC POWER SUPPLY SUPERVISOR PC |
| 文件： | 总13页 (文件大小：357K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
偉詮電子股份有限公司
Weltrend Semiconductor, Inc.
WT7527V
PC POWER SUPPLY SUPERVISOR
Data Sheet
Version 1.01
July 9, 2010
The information in this document is subject to change without notice.
Weltrend Semiconductor, Inc. All Rights Reserved.
新竹市科學工業園區工業東九路24號2樓
2F, No. 24, Industry E. 9th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan
TEL:886-3-5780241 FAX:886-3-5794278.5770419
Email:support@weltrend.com.tw
WT7527V
Rev. 1.01
GENERAL DESCRIPTION
The WT7527V provides protection circuits, power good output (PGO), fault protection latch (FPOB),
and a protection detector function (PSONB) control. It can minimize external components of switching
power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors VX, V33, V5, V12A and V12B input voltage level. The
Under Voltage Detector (UVD) monitors V33, V5, V12A and V12B input voltage level. The Over Current
Detector (OCD) monitor I33&V33, I5&V5, I12A&V12A and I12B&V12B input current sense. The pin VX
provides an extra protection function. When OVD or UVD or OCD or VX detect the fault voltage level,
the FPOB is latched HIGH and PGO go low. The latch can be reset by PSONB go HIGH. There is 4 ms
delay time for PSONB turn off FPOB.
When OVD and UVD and OCD detect the right voltage level, the power good output (PGO) will be
issue.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
The Over Voltage Detector (OVD) monitors VX, V33, V5, V12A and V12B input voltage.
The Under Voltage Detector (UVD) monitors V33, V5, V12A and V12B input voltage.
The Over Current Detector (OCD) monitors I33&33, I5&V5, I12A&V12A and I12B&V12B input pins.
The VX > 1.2V provide an extra protection.
Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output.
75 / 600 ms time delay for UVD / OCD / VX .
300 ms time delay for PGO.
38 ms for PSONB input signal De–bounce.
14 us for OVD internal signal De–bounce.
60 us for UVD / VX internal signal De–bounce.
20 ms for OCD internal signal De–bounce.
73 us for PGI internal signal De–bounce.
4 ms for PSONB turn-off FPOB.
PIN ASSIGNMENT AND PACKAGE TYPE
Pin assignment
WT7527V
PGI
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PGO
VCC
V5
GND
FPOB
PSONB
I12A
V33
V12A
I33
RI
I12B
I5
V12B
VX
Weltrend Semiconductor, Inc.
Page 2
WT7527V
Rev. 1.01
ORDERING INFORMATION
Part Number
Package Type
Note
WT7527V–NG160WT-T1 16-Pin Plastic DIP, Halogen-free
WT7527V–SG160WT-T1 16-Pin Plastic SOP, Halogen-free
Green Package
Green Package
PIN DESCRIPTION
Pin Name I/O
Description
PGI
I
P
O
I
Power good input signal pin
Ground
GND
FPOB
PSONB
I12A
RI
Fault protection output pin, open drain output
On/Off switch input
I
12VA over current protection sense input
Current sense adjust input
I
I12B
V12B
VX
I
12VB over current protection sense input
I
12VB over voltage & under voltage & over current sense input pin
Extra protection sense input
I
I5
I
5V over current protection sense input
I33
I
3.3V over current protection sense input
V12A
V33
V5
I
12VA over voltage & under voltage & over current sense input pin
3.3V over voltage & under voltage & over current sense input pin
5V over voltage & under voltage & over current sense input pin
Power supply
I
I
VCC
PGO
I
O
Power good output signal pin, open drain output
Weltrend Semiconductor, Inc.
Page 3
WT7527V
Rev. 1.01
BLOCK DIAGRAM
WT7527V
VCC
Power On Reset
PWR
PWR
VCCI
38ms
4ms
clr
delay
PSONB
debounce
1.2V ~ 1.8V
Bandgap
VREF = 1.2V
Reference
75ms / 600ms
delay
clr
VREF = 1.2V
-
UN
V33
+
Internal
VCCI = 3.6V
Power
-
OV
+
-
UN
V5
V12A
V12B
+
PWR
-
OV
+
OSC
CLK
-
UN
+
-
OV
clr
+
60us
-
debounce
UN
+
-
OV
+
R
S
FPOB
clr
14us
Q
debounce
-
OV
VX
+
PGO
clr
73us
300ms
delay
-
clr
PGI
+
debounce
V12A
-
I33
+
V12A
IREF * 8
V12A
VREF = 1.2V
+
V12A
IREF=VREF / RI
-
-
+
RI
I5
IREF * 8
V12A
-
I12A
+
IREF * 8
clr
20ms
V12A
debounce
-
I12B
+
IREF * 8
Weltrend Semiconductor, Inc.
Page 4
WT7527V
Rev. 1.01
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply voltage, VCC, V12A
PGI, PSONB
Min.
Max.
Unit
V
–0.3
15
VCC + 0.3（Max. 7V）
V
Input voltage
–0.3
V12A + 0.3（Max. 7V）
V5, I5, V33, I33
I12A, V12B, I12B
PGO
V
V12A + 0.3（Max. 15V）
V
VCC + 0.3（Max. 7V）
–0.3
–0.3
-20
V
Output voltage
FPOB
15
85
V
℃
℃
Operating temperature
Storage temperature
-55
150
*Note: Stresses above those listed may cause permanent damage to the devices
RECOMMENDED OPERATING CONDITIONS
Parameter
Conditions
Min.
Typ. Max. Unit
Supply voltage, VCC
Input voltage
3.8
5
15
7
V
V
PGI, PSONB, V5, V33
V12A, V12B
PGO
15
7
V
Output voltage
V
FPOB
15
10
10
V
Output sink current
FPOB
PGO
0.3V
0.3V
mA
mA
mS
uA
℃
Supply voltage rising time
Output current for RI
Operating free-air Temp. Ta
1
RI
10
-20
65
85
ELECTRICAL CHARACTERISTICS, at Ta=25°C and VCC=5V.
Over Voltage Detection
Parameter
Condition
Min.
Typ.
Max.
Unit
V33
V5
3.8
5.6
3.9
5.8
4.0
6.0
V
V
Over voltage threshold
V12AB
VX
13.5
1.176
13.85
1.20
5
14.2
1.224
V
Use UVD timing
V(FPOB) = 5V
Isink =10mA
V
ILEAKAGE Leakage current (FPOB)
VOL Low level output voltage (FPOB)
uA
V
0.3
PGI and PGO
Parameter
V33
Condition
Min.
Typ.
Max.
Unit
2.8
4.2
2.9
4.4
10
3.0
4.6
V
V
Under voltage threshold
V5
V12AB
9.5
1.176
10.5
1.224
V
Input threshold voltage(PGI)
ILEAKAGE Leakage current(PGO)
1.20
5
V
PGO = 5V
Isink =10mA
uA
V
VOL Low level output voltage(PGO)
Offset Voltage of OCP comparators
0.3
3
–3
mV
Weltrend Semiconductor, Inc.
Page 5
WT7527V
Rev. 1.01
PSONB
Parameter
Condition
PSONB= 0V
Min.
Typ.
Max.
Unit
uA
V
Input pull-up current
High-level input voltage
Low-level input voltage
160
1.8
1.2
V
TOTAL DEVICE
Parameter
Condition
PSONB= 5V
Min.
Typ.
Max.
1
Unit
mA
V
Icc Supply current
Vcc operation start up voltage
Vcc under lockout voltage
Supply voltage rising time
3.2
2.8
1
3.4
3.0
3.6
3.2
V
mS
SWITCHING CHARACTERISTICS, at Ta=-20℃~85℃
Parameter Condition
PGI to PGO Delay Time
Internal UVD/OCD delay time at Td2
power on mode (Note1)
Min.
Typ.
300
75
Max.
400
100
800
100
Unit
mS
mS
mS
mS
Td1
200
49
PGI > 1.2V
PGI < 1.2V
PGI > 1.2V
PGI < 1.2V
Td2-1
392
49
600
75
Internal UVD/OCD delay time at Td2
normal mode (Note1)
Disable UVD/OCD check
PGO to FPOB Delay Time
Under Voltage Delay Time
Over Current Delay Time
Over Voltage Delay Time
VX Delay Time
Td3
Td4
Td5
Td6
Td7
Tb1
Tb2
2
4
6
81
27
19
81
52
100
mS
µS
mS
uS
µS
40
13
9
60
20
14
60
38
73
40
24
47
PSONB De-bounce Time
PGI De-bounce Time
mS
µS
NOTE1:
When FPOB go low, the WT7527V enter the power on mode at first. And then jump to
normal mode when the UVD and OCD are right.
Weltrend Semiconductor, Inc.
Page 6
WT7527V
Rev. 1.01
APPLICATION CIRCUIT
+5V
+5VSB
D1
1K
R4=100
+5VSB
WT7527S
PGO
D2
D3
PGI
PGI
PGO
VCC
V5
+5VSB
+12V
0.1uF
22uF
+5VSB
10K
GND
FPOB
+3.3V
+5V
R5=300
PSONB
PSONB
I12A
RI
V33
V12A
I33
0.01uF
22uF
R12, 1%
30K, 1%
22uF
R10, 1%
I12B
V12B
I5
VX
+12VA
22uF
R14, 1%
+12VB
22uF
R16, 1%
NOTE1:
NOTE2:
The series resistor R5 at PSONB can not be omitted.（R5 = 300Ω is suggested）
The series resistor R4 = 100Ω and diode D1 at PGO is suggested. If not, should add on
testing-board or burning-board at least.
NOTE3:
NOTE4:
Supply and signal must pass through the capacitor first before into IC.
The capacitor 0.1uF & 22uF at VCC is suggested. And diode D2 & D3 at VCC can not be
omitted
When VCC use single power, diode D2 at VCC can not be omitted.
NOTE5:
Weltrend Semiconductor, Inc.
Page 7
WT7527V
Rev. 1.01
APPLICATION NOTE
IL
V12A
+
VL
-
V12A
RL
R
VS
IS
-
OCP
+
V12A
IREF
+
VR
-
VREF = 1.2V
+
-
IR=8*IREF=8* ( VREF/RI )
IR
RI
IREF=VREF / RI
RI
When the load current increased, the voltage (VL) cross the inductor is increased.
And when inductor voltage exceeds the resistor voltage (VR), the OCP is active.
Sometimes power-on or load dynamics will cause false output of over-current detection. It can be
solved by connecting a capacitor between VS pin and IS pin. In typical case, C ≥ 1uF is suggested.
OCP point can be calculated by the following equation:
Let VR = VL
R × IR = RL × IL
VREF
Q IR = 8× IREF = 8×
RI
RL× IL
∴R =
VREF
8×
RI
For example：
Assume RI=30KΩ, RL=5mΩ, OCP IL=20A.
Sol：R = ( IL * RL ) / ( 8 * IREF )
= ( 20A * 5mΩ) / { 8 * ( 1.2V / 30KΩ)}
= 312.5Ω
Weltrend Semiconductor, Inc.
Page 8
WT7527V
Rev. 1.01
APPLICATION TIMMING
1.) PGI (UNDER_VOLTAGE)：
PSONB
td3
FPOB
tb1
td1+tb2
td1+tb2
PGO
PGI
tb1
tb2
Weltrend Semiconductor, Inc.
Page 9
WT7527V
Rev. 1.01
2.) V33, V5, V12 (UNDER_VOLTAGE) or I33, I5, I12 (OVER_CURRENT) or
VX (OVER_VOLTAGE)：
PSONB
td3
FPOB
tb1
td1+tb2
PGO
tb1
V33/V5/V12
I33/I5/I12/VX
td2=75mS
PSONB
td2+td4 / td5 / td7
td3
FPOB
PGO
PGI
tb1
tb1
td1+tb2
tb1
V33/V5/V12
I33/I5/I12/VX
td2-1=600mS
PSONB
FPOB
PGO
td3
td2-1+td4 / td5 / td7
tb1
tb1
td1+tb2
tb1
PGI
V33/V5/V12
I33/I5/I12/VX
Weltrend Semiconductor, Inc.
Page 10
WT7527V
Rev. 1.01
3.) V33, V5, V12 (OVER_VOLTAGE)：
PSONB
td3
FPOB
tb1
td1+tb2
PGO
tb1
V33/V5/V12
PSONB
td6
td3
FPOB
tb1
tb1
td1+tb2
PGO
tb1
V33/V5/V12
Weltrend Semiconductor, Inc.
Page 11
WT7527V
Rev. 1.01
MECHANICAL INFORMATION
PLASTIC DUAL–IN–LINE PACKAGE
Weltrend Semiconductor, Inc.
Page 12
WT7527V
Rev. 1.01
PLASTIC SMALL–OUTLINE PACKAGE
Weltrend Semiconductor, Inc.
Page 13
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