ESD5641D12-3/TR [WILLSEMI]

1-Line, Uni-directional, Transient Voltage Suppressor;
ESD5641D12-3/TR
型号: ESD5641D12-3/TR
厂家: WILLSEMI    WILLSEMI
描述:

1-Line, Uni-directional, Transient Voltage Suppressor

文件: 总6页 (文件大小:369K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ESD5641DXX  
ESD5641DXX  
1-Line, Uni-directional, Transient Voltage Suppressor  
http//:www.sh-willsemi.com  
Descriptions  
3
1 and 2  
The ESD5641DXX is a transient voltage suppressor  
designed to protect power interfaces. It is suitable to replace  
multiple discrete components in portable electronics.  
The ESD5641DXX is specifically designed to protect USB  
port. TVS diode with higher surge capability is used to protect  
USB voltage bus pin.  
Circuit diagram  
The ESD5641DXX is available in DFN2×2-3L package.  
Standard products are Pb-free and Halogen-free.  
PIN3  
3
Features  
Reverse stand-off voltage: 7.5V ~ 15V  
Surge protection according to IEC61000-4-5  
8/20μs waveform: IPPM see Table 4  
Surge protection according to IEC61643-321  
1
2
10/1000μs waveform:  
IPPM see Table 4  
PIN1  
PIN2  
Low clamping voltage  
Solid-state silicon technology  
Pin configuration (Top View)  
Applications  
Power supply protection  
Power management  
Order information  
5641  
**YW  
Table 1.  
Device  
code  
07  
Device  
Package  
Shipping  
ESD5641D07-3/TR  
ESD5641D10-3/TR  
ESD5641D12-3/TR  
ESD5641D15-3/TR  
DFN2×2-3L 3000/Tape&Reel  
DFN2×2-3L 3000/Tape&Reel  
DFN2×2-3L 3000/Tape&Reel  
DFN2×2-3L 3000/Tape&Reel  
Pin1  
Indicator  
10  
12  
15  
5641 = Series code  
**  
= Device code  
YW = Date code  
Marking  
Will Semiconductor Ltd.  
1
Revision 1.5, 2017/12/11  
ESD5641DXX  
Absolute maximum ratings  
Table 2.  
Parameter  
Peak pulse power (tp=8/20μs)1)3)  
Peak pulse power (tp=10/1000μs)2)3)  
ESD according to IEC61000-4-2 air discharge  
ESD according to IEC61000-4-2 contact discharge  
Junction temperature  
Symbol  
PPK  
Rating  
Unit  
W
4000  
350  
PPK  
W
±30  
VESD  
kV  
±30  
TJ  
TOP  
TL  
125  
oC  
oC  
oC  
oC  
Operating temperature  
-40~85  
260  
Lead temperature  
Storage temperature  
TSTG  
-55~150  
Notes:  
1) Non-repetitive current pulse, according to IEC61000-4-5.8/20μs current waveform)  
2) Non-repetitive current pulse, according to IEC61643-321.10/1000μs current waveform)  
3) Measured from pin 3 to pin 1 and pin 2.  
Electrical characteristics (TA = 25oC, unless otherwise noted)  
I
IPP  
VRWM Reverse stand-off voltage  
IR Reverse leakage current  
VBR Reverse breakdown voltage  
VF  
IF  
Forward voltage  
Forward current  
VFC  
IPP  
Forward clamping voltage  
Peak pulse current  
VCL  
IPP  
Clamping voltage  
Peak pulse current  
IBR  
IR  
VFC VF  
VRWM VBR VCL  
V
IF  
IPP  
Definitions of electrical characteristics  
Will Semiconductor Ltd.  
2
Revision 1.5, 2017/12/11  
ESD5641DXX  
Electrical characteristics (TA = 25oC, unless otherwise noted)  
Table 3.  
Reverse  
Reverse  
Junction  
Standoff  
Voltage  
VRWM (V)  
Max.  
Breakdown voltage  
VBR(V) IBR = 1mA  
Forward voltage  
VF(V) IF = 20mA  
capacitance  
F=1MHz,  
leakage current  
IRM(nA) at VRWM  
Type number  
VR=0V (pF)  
Min.  
8.0  
Typ.  
9.0  
Max.  
10.0  
15.5  
17.0  
19.0  
Typ.  
10  
1
Max.  
1000  
500  
Min.  
0.45  
0.45  
0.45  
0.45  
Max.  
1.25  
1.25  
1.25  
1.25  
Typ.  
2200  
1500  
1200  
1000  
Max.  
3000  
2000  
1800  
1500  
ESD5641D07  
ESD5641D10  
ESD5641D12  
ESD5641D15  
7.5  
10.0  
12.0  
15.0  
11.5  
13.0  
16.0  
13.5  
15.0  
17.5  
1
100  
1
100  
Table 4.  
Rated peak pulse  
current IPP A1)3) VCL(V) at IPPA1)3)  
Clamping voltage  
Rated peak pulse  
current IPPA2)3)  
Clamping voltage  
VCL(V) at IPPA2)3)  
Type number  
Max.  
190  
170  
150  
130  
Max.  
18  
Max.  
28  
Max.  
13  
ESD5641D07  
ESD5641D10  
ESD5641D12  
ESD5641D15  
23  
22  
18  
27  
16  
20  
30  
13  
25  
Notes:  
1) Non-repetitive current pulse, according to IEC61000-4-5. (8/20μs current waveform)  
2) Non-repetitive current pulse, according to IEC61643-321. (10/1000μs current waveform)  
3) Measured from pin 3 to pin 1 and pin 2.  
Will Semiconductor Ltd.  
3
Revision 1.5, 2017/12/11  
ESD5641DXX  
Typical characteristics (TA = 25oC, unless otherwise noted)  
Front time: T1= 1.25 T = 8s  
Front time: T1= 1.25 T = 10s  
Time to half-value: T2= 1000s  
100  
90  
100  
90  
Time to half-value: T2= 20s  
50  
50  
T2  
T2  
10  
0
10  
0
T
20  
1000  
0
0
T
T1  
Time (s)  
Time (s)  
T1  
8/20μs waveform per IEC61000-4-5  
10/1000μs waveform per IEC61643-321  
30  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
ESD5641D07  
Pulse waveform:tp=8/20μs  
ESD5641D10  
Pulse waveform:tp=10/1000μs  
ESD5641D07  
ESD5641D10  
ESD5641D12  
ESD5641D15  
ESD5641D12  
ESD5641D15  
0
50  
100  
150  
200  
0
5
10  
15  
20  
25  
30  
Ipp-Peak Pulse Current (A)  
Ipp-Peak Pulse Current (A)  
Clamping voltage vs. Peak pulse current  
Clamping voltage vs. Peak pulse current  
100  
80  
60  
40  
20  
0
10000  
1000  
100  
1
10  
100  
1000  
0
25  
50  
75  
100  
125  
150  
Pulse time (s)  
TA - Ambient temperature (oC)  
Non-repetitive peak pulse power vs. Pulse time  
Power derating vs. Ambient temperature  
Will Semiconductor Ltd.  
4
Revision 1.5, 2017/12/11  
ESD5641DXX  
Package outline dimensions  
DFN2×2-3L  
Dimensions In Millimeters  
Symbol  
Min.  
0.50  
0.00  
Typ.  
0.58  
0.02  
0.10 REF.  
0.30  
2.00  
2.00  
1.05  
1.50  
1.30  
0.25  
0.30  
0.39  
-
Max.  
0.65  
0.05  
A
A1  
A3  
b
0.25  
1.90  
1.90  
0.95  
1.40  
1.20  
0.20  
0.20  
0.33  
0.13  
0.35  
2.10  
2.10  
1.15  
1.60  
1.40  
0.30  
0.40  
0.45  
-
Recommended land pattern (Unit: mm)  
D
E
1.30  
D2  
E2  
e
0.40  
H
K
L
R
Notes:  
This recommended land pattern is for reference  
purposes only. Please consult your manufacturing  
group to ensure your PCB design guidelines are met.  
0.40  
1.60  
Will Semiconductor Ltd.  
5
Revision 1.5, 2017/12/11  
ESD5641DXX  
TAPE AND REEL INFORMATION  
Reel Dimensions  
Tape Dimensions  
P1  
Quadrant Assignments For PIN1 Orientation In Tape  
Q1 Q2  
Q3  
Q1 Q2  
Q3  
Q4  
Q4  
User Direction of Feed  
RD Reel Dimension  
7inch  
8mm  
2mm  
Q1  
13inch  
W
P
Overall width of the carrier tape  
Pitch between successive cavity centers  
12mm  
4mm  
Q2  
8mm  
Q3  
Pin1 Pin1 Quadrant  
Q4  
Will Semiconductor Ltd.  
6
Revision 1.5, 2017/12/11  

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