W24010ACJ-12 [WINBOND]
Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, 0.300 INCH, SOJ-32;
| 型号： | W24010ACJ-12 |
| 厂家： | 
WINBOND |
| 描述： | Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, 0.300 INCH, SOJ-32 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总10页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
W24010AC
128K ´ 8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W24010AC is a high speed, low power CMOS static RAM organized as 131072 ´ 8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology, which can meet the industrial grade requirement.
FEATURES
· High speed access time: 12/15 nS (max.)
· Low power consumption:
- Active: 600 mW (typ.)
· All inputs and outputs directly TTL compatible
· Three-state outputs
· Available packages: 32-pin 300 mil SOJ, 400
mil SOJ, skinny DIP and standard type one
TSOP (8 mm ´ 20 mm)
· Single +5V power supply
· Fully static operation
PIN CONFIGURATIONS
BLOCK DIAGRAM
V
DD
32
31
V
DD
NC
A16
A14
1
V
SS
A15
CS2
2
30
3
A0
.
A12
A7
4
29
28
27
26
25
24
23
22
21
20
19
18
17
WE
A13
A8
DECODER
CONTROL
CORE
ARRAY
.
5
A16
A6
6
A5
A9
7
A11
A4
A3
A2
A1
A0
8
CS2
CS1
OE
I/O1
.
.
9
OE
DATA I/O
10
11
12
13
14
15
16
A10
I/O8
WE
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
I/O1
I/O2
PIN DESCRIPTION
I/O3
VSS
SYMBOL
DESCRIPTION
Address Inputs
A0- A16
Data Inputs/Outputs
Chip Select Inputs
A11
A9
A8
1
2
3
4
5
6
7
I/O1- I/O8
OE
32
31
30
29
28
27
26
25
24
23
22
21
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
DQ3
DQ2
DQ1
A0
A13
CS1, CS2
WE
WE
CS2
A15
VDD
Write Enable Input
Output Enable Input
Power Supply
Ground
8
9
32-pin
TSOP
NC
A16
A14
A12
A7
A6
A5
10
11
12
13
14
15
16
OE
VDD
VSS
NC
20
19
18
17
A1
A2
A3
A4
No Connection
Publication Release Date: November 1998
Revision A1
- 1 -
W24010AC
TRUTH TABLE
CS2
CS1
MODE
Not Selected
Not Selected
Output Disable
Read
VDD CURRENT
ISB, ISB1
ISB, ISB1
IDD
I/O1-I/O8
OE
X
WE
X
H
X
L
L
L
X
L
High Z
High Z
High Z
X
X
H
H
H
H
L
H
H
Data Out
Data In
IDD
X
L
Write
IDD
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
Supply Voltage to VSS Potential
Input/Output to VSS Potential
Allowable Power Dissipation
Storage Temperature
RATING
UNIT
V
-0.5 to +7.0
-0.5 to VDD +0.5
1.5
V
W
-65 to +150
0 to +70
°C
°C
Operating Temperature
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
Operating Characteristics
(VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C)
PARAMETER
Input Low Voltage
Input High Voltage
Input Leakage Current
SYM.
VIL
TEST CONDITIONS
MIN. TYP.
MAX.
+0.8
UNIT
V
-
-
-0.5
+2.2
-10
-
-
-
VIH
ILI
VDD +0.5
+10
V
VIN = VSS to VDD
mA
Output Leakage
Current
ILO
VI/O = VSS to VDD
-10
-
+10
mA
CS1 = VIH (min.) or CS2 = VIL
(max.) or OE = VIH (min.)
or WE = VIL (max.)
IOL = +8.0 mA
Output Low Voltage
Output High Voltage
Operating Power
Supply Current
VOL
VOH
IDD
-
-
-
0.4
-
V
V
IOH = -4.0 mA
2.4
CS1 = VIL (max.),
CS2 = VIH (min.)
-
-
-
-
-
-
200
30
mA
mA
mA
I/O = 0 mA, Cycle = min.
Duty = 100%
Standby Power
Supply Current
ISB
CS1 = VIH (min.),
or CS2 = VIL (max.)
ISB1
10
CS1 ³ VDD -0.2V or
CS2 £ 0.2V
Note: Typical characteristics are at VDD = 5V, TA = 25° C.
- 2 -
W24010AC
CAPACITANCE
(VDD = 5V, TA = 25° C, f = 1 MHz)
PARAMETER
SYM.
CIN
CONDITIONS
VIN = 0V
MAX.
UNIT
pF
Input Capacitance
8
Input/Output Capacitance
CI/O
VOUT = 0V
10
pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
CONDITIONS
0V to 3V
5 nS
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
1.5V
CL = 30 pF, IOH/IOL = -4 mA/8 mA
AC Test Loads and Waveform
R1 480 ohm
5V
R1 480 ohm
5V
OUTPUT
5pF
OUTPUT
R2
255 ohm
Including
Jig and
Scope
R2
255 ohm
30 pF
Including
Jig and
Scope
)
TCHZ2, TOHZ, TWHZ, TOW
TCHZ1,
(For T
T
CLZ2, TOLZ,
CLZ1,
3.0V
90%
90%
10%
10%
0V
5 nS
5 nS
Publication Release Date: November 1998
Revision A1
- 3 -
W24010AC
AC Characteristics, continued
(VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C)
Read Cycle
PARAMETER
SYM.
W24010AC-12
W24010AC-15
UNIT
MIN.
MAX.
-
MIN.
MAX.
-
Read Cycle Time
TRC
12
-
15
-
nS
nS
nS
Address Access Time
Chip Select Access Time
TAA
12
15
TACS1
-
12
-
15
CS1
CS2
TACS2
TAOE
-
-
12
6
-
-
15
7
nS
nS
nS
Output Enable to Output Valid
Chip Selection to Output in Low Z
TCLZ1*
3
-
3
-
CS1
CS2
TCLZ2*
TOLZ*
3
0
-
-
-
3
0
-
-
-
nS
nS
nS
Output Enable to Output in Low Z
Chip Deselection to Output in
TCHZ1*
6
7
CS1
CS2
High Z
TCHZ2*
TOHZ*
TOH
-
-
6
6
-
-
-
7
7
-
nS
nS
nS
Output Disable to Output in High Z
Output Hold from Address Change
3
3
* These parameters are sampled but not 100% tested.
Write Cycle
PARAMETER
SYM.
W24010AC-12
W24010AC-15
UNIT
MIN.
12
MAX.
MIN.
15
MAX.
Write Cycle Time
TWC
-
-
-
-
nS
nS
Chip Selection to End of Write
CS1
TCW1
10
13
CS2
Address Valid to End of Write
Address Setup Time
TCW2
TAW
TAS
10
10
0
-
-
-
-
-
13
13
0
-
-
-
-
-
nS
nS
nS
nS
nS
Write Pulse Width
TWP
TWR1
10
0
10
0
Write Recovery Time
CS1, WE
CS2
Data Valid to End of Write
TWR2
TDW
0
7
0
-
-
-
0
9
0
-
-
-
nS
nS
nS
nS
nS
nS
Data Hold from End of Write
TDH
-
-
Write to Output in High Z
TWHZ*
TOHZ*
TOW
7
7
-
8
8
-
Output Disable to Output in High Z
Output Active from End of Write
* These parameters are sampled but not 100% tested.
-
-
0
0
- 4 -
W24010AC
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
T
RC
Address
T
AA
TOH
TOH
D
OUT
Read Cycle 2
(Chip Select Controlled)
CS1
CS2
T
T
ACS1
CHZ1
T
ACS2
T
CHZ2
T
CLZ1
D
OUT
T
CLZ2
Read Cycle 3
(Output Enable Controlled)
T
RC
Address
T
AA
OE
CS1
CS2
T
T
OH
AOE
T
OLZ
ACS1
T
T
CHZ1
T
CLZ1
T
ACS2
T
OHZ
T
CLZ2
TCHZ2
D
OUT
Publication Release Date: November 1998
Revision A1
- 5 -
W24010AC
Timing Waveforms, continued
Write Cycle 1
(OE Clock)
TWC
Address
OE
WR1
T
T
CW1
CS1
CS2
WE
T
CW2
T
AW
WR2
T
T
WP
T
AS
T
OHZ
(1, 4)
D
OUT
T
DW
T
DH
D
IN
Write Cycle 2
(OE = VIL Fixed)
T
WC
Address
CS1
T
T
WR1
CW1
T
CW2
CS2
WE
T
AW
T
WR2
TWP
T
OH
T
AS
(3)
(2)
T
WHZ (1, 4)
T
OW
D
OUT
T
DH
T
DW
D
IN
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. Dout provides the read data for the next address.
4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
- 6 -
W24010AC
ORDERING INFORMATION
PART NO.
ACCESS OPERATING
STANDBY
CURRENT
MAX. (mA)
PACKAGE
TIME
(nS)
CURRENT
MAX. (mA)
W24010ACK-12
W24010ACK-15
W24010ACJ-12
W24010ACJ-15
W24010ACI-12
W24010ACI-15
W24010ACT-12
W24010ACT-15
12
15
12
15
12
15
12
15
200
200
200
200
200
200
200
200
10
10
10
10
10
10
10
10
300 mil skinny DIP
300 mil skinny DIP
300 mil SOJ
300 mil SOJ
400 mil SOJ
400 mil SOJ
Standard type one TSOP
Standard type one TSOP
Notes:
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications
where personal injury might occur as a consequence of product failure.
Publication Release Date: November 1998
- 7 -
Revision A1
W24010AC
PACKAGE DIMENSIONS
32-pin P-DIP Skinny (300 mil)
Dimension in mm
Min. Nom. Max. Min. Nom. Max.
Dimension in Inches
Symbol
A
5.08
0.200
0.015
0.145
0.38
3.68
0.41
1.47
0.20
1
A
0.150 0.155
3.81
0.46
1.52
0.25
3.94
0.56
1.63
0.36
2
A
0.016 0.018
0.022
0.064
B
D
0.060
0.058
0.008
B
c
1
32
17
0.010 0.014
1.60
1.62
0.335
0.294
0.110
0.140
15
40.64 41.15
D
0.295
0.286
7.49
7.26
2.29
3.05
8.50
7.46
2.79
3.56
0.315
0.290
8.00
7.36
2.54
3.30
1
E
E
E
e
1
1
0.090 0.100
0.120 0.130
0
1
16
L
a
°
°
15
0
0.430
0.470 10.92
0.065
11.94
1.65
0.450
11.43
A
e
S
Notes:
E
S
1. Dimension D Max. & S include mold flash or
tie bar burrs.
2. Dimension E1 does not include interlead flash.
c
Base Plane
1
A
A A2
L
3. Dimension D & E1 include mold mismatch and
are determined at the mold parting line.
4. Dimension B1 does not include dambar
protrusion/intrusion.
Mounting Plane
1
e
B 1
B
eA
5. Controlling dimension: Inches.
6. General appearance spec. should be based on
final visual inspection spec.
a
32-pin SOJ (300 mil)
Dimension in Inches
Dimension in mm
17
Symbol
A
32
Min.
Min. Nom.
Max.
Nom. Max.
__
__
__
__
0.140
3.556
__
__
__
__
0.020
0.095
0.026
0.016
0.008
0.815
0.295
0.044
0.247
0.325
0.508
2.413
0.660
0.406
0.203
A 1
A 2
B
0.100
0.028
0.018
0.010
0.825
0.300
0.050
0.267
0.105
0.032
0.022
0.014
0.835
0.305
0.056
0.287
2.540
0.711
0.457
0.254
2.667
0.813
0.559
0.356
E
H
e
b
c
20.701 20.955 21.209
D
7.493
1.118
6.274
8.255
7.620
1.270
6.782
7.747
1.422
7.290
E
e
1
e
e
1
16
0.335
__
H
0.345
__
8.509
__
8.763
__
0.080
__
2.032
__
L
S
Y
q
__
__
__
__
__
__
0.045
0.004
10
1.143
0.102
__
0
__
°
0
°
10
D
c
A
2
A
L
e1
B
e
S
A
1
b
q
Y
Seating Plane
- 8 -
W24010AC
Package Dimensions, continued
32-pin SOJ (400 mil)
Dimension in inches Dimension in mm
Symbol
A
Min.
0.131
0.025
Max. Min. Nom.
Max.
Nom.
32
17
3.51
3.68
0.138 0.145 3.33
0.635
1
A
0.105 0.110 0.115
2.67
0.66
2.79
0.71
2.91
0.81
2
A
0.026 0.028
0.016 0.018
0.032
0.020
b
b
c
1
HE
E
0.41
0.46
0.51
0.28
0.006 0.008 0.011
0.15 0.20
0.825 0.830
0.820
20.96
10.16
20.83
10.03
21.08
10.29
1.42
D
E
e
0.400
0.405
0.395
1
16
1.12
9.15
0.050 0.056
1.27
9.40
0.044
0.360
0.37
9.65
0.380
0.445
1
e
0.435 0.440
0.082
11.05 11.18 11.31
E
H
L
2.08
1.14
0.10
0.045
0.004
6
S
y
q
D
2
-5
2
6
-5
c
2
A
Notes:
A
y
L
1. Dimension D Max & S include mold flash
or tie bar burrs.
2. Dimension b does not include dambar
protrusion/intrusion.
b
b1
s
e1
e
1
A
Seating Plane
3. Dimension D & E include mold mismatch
and are determined at the mold parting line.
4. Controlling dimension: Inches
5. General appearance spec. should be based
on final visual inspection spec.
32-pin Standard Type One TSOP
HD
D
Dimension in Inches
Min. Nom. Max.
Dimension in mm
Symbol
A
Min.
Max.
Nom.
__
__
__
__
1.20
0.15
1.05
0.23
0.047
c
__
__
0.002
0.037
0.006 0.05
1
A
0.95
0.041
0.009
1.00
2
0.039
A
M
e
0.007 0.008
0.17 0.20
0.12 0.15
b
c
E
0.005 0.006
0.720 0.724
0.17
0.007
0.728
0.10(0.004)
18.30 18.40 18.50
D
E
b
0.311 0.315
0.780 0.787
7.90 8.00
8.10
0.319
19.80
__
20.00 20.20
0.795
__
D
H
__
__
e
0.020
0.50
0.016 0.020
0.40 0.50
0.60
__
0.024
__
L
__
__
0.031
0.80
L1
A
__
__
0.000
0.004
5
0.10
5
0.00
Y
2
A
1
3
1
3
q
q
L
1
A
Y
1
L
Note:
Controlling dimension: Millimeter
Publication Release Date: November 1998
Revision A1
- 9 -
W24010AC
VERSION HISTORY
VERSION
DATE
Nov. 1998
PAGE
DESCRIPTION
A1
-
Initial Issued
Winbond Electronics (H.K.) Ltd.
Winbond Electronics North America Corp.
Headquarters
Rm. 803, World Trade Square, Tower II, Winbond Memory Lab.
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5792647
123 Hoi Bun Rd., Kwun Tong,
Winbond Microelectronics Corp.
Winbond Systems Lab.
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
2730 Orchard Parkway, San Jose,
CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-9436668
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-7197006
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-7190505
FAX: 886-2-7197502
Note: All data and specifications are subject to change without notice.
- 10 -
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