W83L351 [WINBOND]
ExpressCard⑩ Power Interface Switch; 的ExpressCard ™电源接口开关
| 型号： | W83L351 |
| 厂家： | 
WINBOND |
| 描述： | ExpressCard⑩ Power Interface Switch |
| 文件： | 总33页 (文件大小：1133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Winbond
ExpressCard™
Power Interface Switch
W83L351 Series
W83L351 Series
W83L351 Series
Data Sheet Revision History
VERSION
ON WEB
NO PAGES
DATES
VERSION
MAIN CONTENTS
All versions before 1.0 are preliminary
versions.
Update the ordering information and add
the taping spec.
1.
All
28
Apr. /07
1.0
1.1
N.A
2
3
4
5
6
7
July 5, 2007
Publication Date: July 5, 2007
Revision 1.10
-I-
W83L351 Series
Table of Contents-
1.
FEATURES................................................................................................................................. 1
PIN CONFIGURATION AND DESCRIPTION ............................................................................ 2
APPLICATION CIRCUIT............................................................................................................. 5
INTERNAL BLOCK DIAGRAM ................................................................................................... 6
ABSOLUTE MAXIMUM RATINGS ............................................................................................. 7
RECOMMENDED OPERATING CONDITIONS......................................................................... 8
ELECTRICAL CHARACTERISTICS........................................................................................... 9
SWITCHING CHARACTERISTICS .......................................................................................... 12
FUNCTIONAL TRUTH TABLES............................................................................................... 13
TYPICAL OPERATING WAVEFORMS .................................................................................... 15
EXPRESSCARD TIMING DIAGRAMS..................................................................................... 20
PACKAGE DIMENSION ........................................................................................................... 24
ORDERING INFORMATION .................................................................................................... 28
TOP MARKING SPECIFICATION ............................................................................................ 29
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
-II-
W83L351 Series
1. FEATURES
•
•
•
•
•
•
•
•
•
Meets the ExpressCard™ Standard (ExpressCard|34 or ExpressCard|54)
Compliant with the ExpressCard™ Compliance Checklists
ExpressCard Compliance ID: EC100098 (W83L351G), EC100115 (W83L351YG/YCG)
Fully Satisfies the ExpressCard™ Implementation Guidelines
Supports System with WAKE Function
TTL-Logic Compatible Inputs
Short Circuit and Thermal Protection
0℃ to 70℃ Ambient Operating Temperature Range
Available in a 20-pin TSSOP or a 20-pin QFN
Publication Date: July 5, 2007
Revision 1.10
-1-
W83L351 Series
2. PIN CONFIGURATION AND DESCRIPTION
SYSRST#
SHDN#
STBY#
20 OC#
1
2
19 RCLKEN
18 AUXIN
17 AUXOUT
16 1.5VIN
15 1.5VIN
14 1.5VOUT
13 1.5VOUT
12 CPPE#
11 CPUSB#
3
4
1
STBY#
3.3VIN
15
3.3VIN
AUXOUT
3.3VIN
5
6
2
3
4
14 NC
3.3VOUT
3.3VOUT
NC
13
12
11
NC
3.3VOUT
PERST#
NC
7
1.5VIN
8
NC
5
1.5VOUT
9
GND
10
W83L351G
(Top View)
W83L351YG
W83L351YCG
PIN
YG
YCG
SYMBOL
I/O
FUNCTION
G
System Reset input – active low, logic level signal. Internally pulled
up to AUXIN. This input is driven by the host system and directly
affects PERST#. Asserting SYSRST# (logic low) forces PERST# to
assert. RCLKEN is not affected by the assertion of SYSRST#.
SYSRST#
1
6
I(*)
Shutdown input – active low, logic level signal. Internally pulled up
to AUXIN. When asserted (logic low), this input instructs the power
switch to turn off all voltage outputs and the discharge FETs are
activated.
SHDN#
2
20
I(*)
-2-
W83L351 Series
Continued
PIN
YG
SYMBOL
I/O
FUNCTION
G
YCG
Standby input – active low, logic level signal. Internally pulled up to
AUXIN. When asserted (logic low) after the card is inserted, this
input places the power switch in standby mode by turning off the
3.3V and 1.5V power switches and keeping the AUX switch on. If
the signal is asserted prior to the card being present, STBY#
places the power switch in OFF Mode by turning off the AUX, 3.3V,
and 1.5V power switches.
STBY#
3
1
I(*)
A logic level power good (with delay). When powered up, this
output remains asserted (logic level low) until all power rails are
within the tolerance. Once all power rails are within the tolerance
and RCLKEN has been released (logic high), PERST# is de-
asserted (logic high) after a time delay, as shown in the parametric
table. When powered down, this output is asserted whenever any
of the power rails drops below their voltage tolerance.
The PERST# signal is an output from the host system and an input
to the ExpressCard module. This signal is only used by PCI
Express-based modules and its function is to place the
ExpressCard module in a reset state.
During power up, power down, or whenever power to the
ExpressCard module is not stable or not within voltage tolerance
limits, the ExpressCard standard requires that PERST# be
asserted. As a result, this signal also serves as a power-good
indicator to the ExpressCard module, and the relationship between
the power rails and PERST# are explicitly defined in the
ExpressCard standard.
PERST#
8
8
O
The host can also place the ExpressCard module in a reset state
by asserting a system reset SYSRST#. This system reset
generates a PERST# signal to the ExpressCard module without
disrupting the voltage rails. This is normally called a warm reset.
However, in a cold start situation, the system reset can also be
used to prolong the assertion time of PERST#.
Card Present input for USB cards. Internally pulled up to AUXIN. A
logic low level on this input indicates that the card present supports
the USB functions. When a card is inserted, CPUSB# is physically
connected to ground if the card supports USB functions.
CPUSB#
CPPE#
11
12
9
I(*)
Card Present input for PCI Express cards. Internally pulled up to
AUXIN. A logic low level on this input indicates that the card
present supports the PCI Express functions. When a card is
inserted, CPPE# is physically connected to ground if the card
supports PCI Express functions.
10
I(*)
Publication Date: July 5, 2007
-3-
Revision 1.10
W83L351 Series
Continued
PIN
YG
YCG
SYMBOL
I/O
FUNCTION
G
Reference Clock Enable signal. As an output, it is a logic level
power good to the host (no delay – open drain). As an input, if the
signal is kept inactive (low) by the host, PERST# will be prevented
from being de-asserted. Internally pulled up to AUXIN. This pin
serves both as an input and an output. When powered up, a
discharge FET keeps this signal at a low state as long as any of the
output power rails is out of their tolerance range. Once all output
power rails are within the tolerance, the switch releases RCLKEN,
allowing it to transit to a high state (internally pulled up to AUXIN).
RCLKEN
19
18 I(*)/O
The transition of RCLKEN from a low to a high state starts an
internal timer for the purpose of de-asserting PERST#. As an input,
RCLKEN can be kept low to delay the start of the PERST# internal
timer. Because RCLKEN is internally connected to a discharge
FET, this pin can only be driven low and should never be driven
high as a logic input. When an external circuit drives this pin low,
RCLKEN becomes an input; otherwise, this pin is an output.
Over current status output (open drain). This pin is an open-drain
output. When any of the three power switches (AUX, 3.3V, and
1.5V) is in an over current condition, OC# is asserted (logic low) by
an internal discharge FET with a deglitch delay. Otherwise, the
discharge FET is open, and the pin can be pulled up to a power
supply through an external resistor.
Primary voltage source, 3.3V input for 3.3VOUT
Secondary voltage source, 1.5V input for 1.5VOUT
Auxiliary voltage source, AUX input for AUXOUT and chip power.
OC#
20
19
2
OD
3.3VIN
1.5VIN
AUXIN
4, 5
15,16 12
18
I
I
I
17
Switched output that delivers 0V, 3.3V or high impedance to the
card.
Switched output that delivers 0V, 1.5V or high impedance to the
card.
Switched output that delivers 0V, AUX or high impedance to the
card.
Ground
3.3VOUT
1.5VOUT
6, 7
3
O
O
O
13,
14
11
AUXOUT
GND
17
10
15
7
4, 5,
13,
14,
16
NC
9
No connection
Notice: (*) Be aware that no input pins can be driven HIGH before the Auxiliary voltage is VALID.
-4-
W83L351 Series
3. APPLICATION CIRCUIT
AUXIN
AUXOUT
C1
C2
C3
C4
0.1U
4.7U
0.1U
22U
U1
R1
20
1
2
SYSRST#
SHDN#
STBY#
AUXIN
SYSRST#
SHDN#
STBY#
3.3VIN
3.3VIN
3.3VOUT
3.3VOUT
PERST#
NC
OC#
RCLKEN
AUXIN
3.3VIN
3.3VOUT
19
18
17
16
15
14
13
12
11
2K
RCLKEN
3
AUXIN
4
3.3VIN
AUXOUT
1.5VIN
AUXOUT
1.5VIN
5
C5
C6
C7
C8
6
3.3VOUT
PERST#
1.5VIN
0.1U
4.7U
0.1U
22U
7
1.5VOUT
1.5VOUT
1.5VOUT
CPPE#
8
9
CPPE#
10
CPUSB#
GND
CPUSB#
1.5VIN
1.5VOUT
W83L351G
C9
C10
C11
C12
22U
0.1U
4.7U
0.1U
AUXIN
R1
2K
AUXIN
3.3VIN
AUXOUT
RCLKEN
SHDN#
C1
C2
C3
0.1U
C4
0.1U
4.7U
22U
U1
3.3VOUT
1
15
STBY#
AUXOUT
STBY#
AUXOUT
C5
C6
C7
C8
2
3
4
5
14
13
12
11
3.3VIN
3.3VOUT
3.3VIN
3.3VOUT
NC
NC
NC
0.1U
4.7U
0.1U
22U
W83L351YG/YCG
1.5VIN
1.5VIN
1.5VOUT
1.5VIN
1.5VOUT
1.5VOUT
NC
C9
C10
C11
C12
22U
0.1U
4.7U
0.1U
CPPE#
SYSRST#
CPUSB#
PERST#
Publication Date: July 5, 2007
Revision 1.10
-5-
W83L351 Series
4. INTERNAL BLOCK DIAGRAM
1.5VI N
1.5VOUT
3.3VOUT
AUXOUT
SW1
SW4
SW5
SW6
3.3VIN
SW2
AUXIN
SW3
Detctor
CPUSB #
CPPE #
Current Limit
Thermal protection
Control Logic
OC #
STBY #
AUXIN
SHDN #
GND
RCLKEN
AUXIN
PERST #
SYSRST #
-6-
W83L351 Series
5. ABSOLUTE MAXIMUM RATINGS
ITEM
SYMBOL
VI(3.3VIN)
VI(1.5VIN)
VI(AUXIN)
RATING
-0.3 to 6
-0.3 to 6
-0.3 to 6
-0.3 to 6
-0.3 to 6
-0.3 to 6
-0.3 to 6
UNIT
V
Input Voltage
V
V
Logic Input/Output Voltage
Output Voltage
V
VO(3.3VOUT)
VO(1.5VOUT)
VO(AUXOUT)
IO(3.3OUT)
V
V
V
Internally limited
Output Current
IO(1.5OUT)
Internally limited
Internally limited
IO(AUXOUT)
Operating Temperature Range
Topt
0 to 70
℃
kV
V
Human Body Mode
Machine Mode
Latch-Up
±2
Electrostatic discharge protection
±200
±100
mA
Publication Date: July 5, 2007
Revision 1.10
-7-
W83L351 Series
6. RECOMMENDED OPERATING CONDITIONS
ITEM
MIN MAX UNIT
3.3VIN is only required for its respective
VI(3.3VIN)
3
3.6
functions
Input Voltage
V
1.5VIN is only required for its respective
functions
VI(1.5VIN)
1.35 1.65
VI(AUXIN) AUXIN is required for all circuit operations
IO(3.3VOUT)
3
0
0
0
3.6
1.3
A
Continuous output
current
IO(1.5VOUT)
IO(AUXOUT)
TJ=120℃
650
275
mA
mA
-8-
W83L351 Series
7. ELECTRICAL CHARACTERISTICS
TA = 25℃, VI (3.3VIN) = VI (AUXIN) = 3.3 V, VI (1.5VIN) = 1.5 V, VI (SHDN#), VI (STBY#) = 3.3 V, VI (CPPE#) = VI
u(CnPUloSBa#d) =ed0(uVn,leVsI s(SYoStRhSeT)rw=is3e.3nVot,eOd)C# and RCLKEN and PERST# are open, all voltage outputs
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
TA = 25°C, I = 1305 mA
90
each
3.3VIN to 3.3VOUT with
two switches on for dual
TA = 70°C, I = 1305 mA
each
105
Power
switch
mΩ
TA = 25°C, I = 660 mA each
TA = 70°C, I = 660 mA each
TA = 25°C, I = 285 mA each
TA = 70°C, I = 285 mA each
90
1.5VIN to 1.5VOUT with
two switches on for dual
resistance
110
110
126
AUXIN to AUXOUT with
two switches on for dual
IOS(3.3VOUT) (steady-state
1.3
1.7
1.1
2.5
1.3
A
A
IOS
value)
5
Short –
IOS(1.5VOUT) (steady-state
value)
0.6
circuit
Output powered into a short
7
output
IOS(AUXOUT) (steady-state
current
275 400 600
155
mA
value)
Rising temperature, not in
over current condition
Over current condition
Trip point, TJ
Thermal
℃
Shutdown
130
Hysteresis
II(AUXIN)
10
140 210
10.
15
5
2.2
170 270
Outputs are unloaded
(include CPPE# and
CPUSB# logic pull-up
currents)
Normal
uA
II(3.3VIN)
operation
II(1.5VIN)
II(AUXIN)
10
CPUSB# = CPPE# = 0 V
SHDN# = 0 V (discharge
FETs are on) (include
CPPE# and CPUSB# logic
pull-up currents and SHDN#
pull-up current)
II(3.3VIN)
6
10
10
Shutdown
uA
II
mode
Total input
quiescent
current
II(1.5VIN)
2.2
CPUSB# = CPPE# = 0 V
STBY# = 0 V (include
CPPE# and CPUSB# logic
pull-up currents and STBY#
pull-up current)
CPUSB# = CPPE# = 0 V
3.3VIN = 0 V (include
CPPE# and CPUSB# logic
pull-up currents)
II(AUXIN)
170 270
(Note: 1)
Standby
mode (1)
II(3.3VIN)
6
10
uA
uA
II(1.5VIN)
2.2
10
II(AUXIN)
II(3.3VIN)
II(1.5VIN)
160 210
Standby
mode (2)
0
0.1
10
2.2
Publication Date: July 5, 2007
Revision 1.10
-9-
W83L351 Series
Continued
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
CPUSB# = CPPE# = 0 V
1.5VIN = 0 V (include
CPPE# and CPUSB# logic
pull-up currents)
II(AUXIN)
II(3.3VIN)
II(1.5VIN)
160 210
Standby
mode (3)
uA
6
0
10
0.1
50
SHDN# = 3.3 V, CPUSB# =
CPPE# = 3.3 V (no card
present, discharge FETs are
on);current measured at
input pins, includes RCLKEN
pull- up current
II(AUXIN)
II(3.3VIN)
22
Ilkg(FWD)
0
50
Forward
leakage
current
uA
II(1.5VIN)
0
50
LOGIC SECTION (SYSRST, SHDN#, STBY#, PERST#, RCLKEN , OC#, CPUSB#, CPPE#)
SYSRST# = 3.6 V, sinking
SYSRST# = 0 V, sourcing
SHDN# = 3.6 V, sinking
SHDN# = 0 V, sourcing
STBY# = 3.6 V, sinking
STBY# = 0 V, sourcing
RCLKEN = 0 V, sourcing
0
I(SYSRS#)
Input
Input
uA
uA
17.
5
10
10
30
30
0
I(SHDN#)
17.
5
Logic input
supply
0
I(STBY#)
Input
Input
uA
uA
current
17.
5
10
10
30
30
I(RCLKEN )
18
CPUSB# or CPPE# = 0 V,
sinking
0
I
(CPUSB#) or
I(CPPE#)
inputs
uA
CPUSB# or CPPE# = 3.6 V,
sourcing
17.
5
10
2
30
High level
Low level
Logic input
voltage
V
V
0.8
0.4
RCLKEN output low
voltage
Output
IO(RCLKEN) = 60 µA
PERST# assertion threshold of output
voltage (PERST# asserted when any
output voltage falls below the
threshold)
3.3VOUT falling
AUXOUT falling
1.5VOUT falling
2.7
2.7
1.2
3
3
V
1.5
PERST# assertion delay from output 3.3VOUT, AUXOUT,
500
ns
voltage
1.5VOUT falling
3.3VOUT, AUXOUT, or
1.5VOUT rising within
tolerance
PERST# de-assertion delay from
output voltage
1
20
ms
-10-
W83L351 Series
Continued
PARAMETER
assertion delay
TEST CONDITIONS
MIN TYP MAX UNIT
PERST#
SYSRST#
from Max time from SYSRST
asserted
25
500
ns
3.3VOUT, AUXOUT, or
1.5VOUT falling out of
tW(PERST#) PERST# minimum pulse width
100 340
us
tolerance or triggered by
SYSRST#
PERST# output low voltage
PERST# output high voltage
OC# output low voltage
0.4
0.4
V
V
V
IO(PERST#) = 500 µA
2.4
IO(OC#) = 2 mA
Falling into or out of an over
current condition
OC# deglitch
20
ms
UNDERVOLTAGE LOCKOUT (UVLO)
3.3VIN level, below which
3.3VIN and 1.5VIN switches
are off
1.5VIN level, below which
3.3VIN and 1.5VIN switches
are off
3.3VIN UVLO
1.5VIN UVLO
2.6
1.0
2.9
V
1.25
2.9
AUXIN level, below which all
switches are off
AUXIN UVLO
2.6
UVLO hysteresis
100
mV
Note 1: In the Shutdown mode or the Standby mode (1), the AUXIN quiescent current includes a normal operation current,
SHDN# or STBY# internal pull-up current and RCLKEN internal pull-up current. In the Standby modes (2) & (3), the
AUXIN quiescent current includes a normal operation current and a RCLKEN internal-up current.
Publication Date: July 5, 2007
-11-
Revision 1.10
W83L351 Series
8. SWITCHING CHARACTERISTICS
TA = 25℃, VI (3.3VIN) = VI (AUXIN) = 3.3 V, VI (1.5VIN) = 1.5 V, VI (SHDN#), VI (STBY#) = 3.3 V, VI (CPPE#) = VI
u(CnPUloSBa#d) =ed0(uVn,leVsI s(SYoStRhSeT)rw=is3e.3nVot,eOd)C# and RCLKEN and PERST# are open, all voltage outputs
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
3.3VIN to 3.3VOUT
CL(3.3VOUT)=0.1uF, IO(3.3VOUT)=0A
CL(AUXVOUT)=0.1uF, IO(AUXOUT)=0A
CL(1.5VOUT)=0.1uF, IO(1.5VOUT)=0A
CL(3.3VOUT)=100uF, RL=VI(3.3VIN)/1A
0.1
0.1
0.1
0.1
6
6
6
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
3.3VIN to 3.3VOUT
tr
6
ms
Output rise times
CL(AUXVOUT)=100uF,
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
0.1
0.1
6
RL=VI(AUXININ)/0.250A
CL(1.5VOUT)=100uF,
RL=VI(1.5VIN)/0.500A
6
3.3VIN to 3.3VOUT
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
3.3VIN to 3.3VOUT
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
3.3VIN to 3.3VOUT
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
3.3VIN to 3.3VOUT
CL(3.3VOUT)=0.1uF, IO(3.3VOUT)=0A
CL(AUXVOUT)=0.1uF, IO(AUXOUT)=0A
CL(1.5VOUT)=0.1uF, IO(1.5VOUT)=0A
CL(3.3VOUT)=20uF, IO(3.3VOUT)=0A
CL(AUXVOUT)=20uF, IO(AUXOUT)=0A
CL(1.5VOUT)=20uF, IO(1.5VOUT)=0A
CL(3.3VOUT)=0.1uF, IO(3.3VOUT)=0A
CL(AUXVOUT)=0.1uF, IO(AUXOUT)=0A
CL(1.5VOUT)=0.1uF, IO(1.5VOUT)=0A
CL(3.3VOUT)=100uF, RL=VI(3.3VIN)/1A
10
10
10
5
5
5
10
10
10
0.1
150
150
150
30
30
30
150
150
150
3
tf
us
ms
us
Output fall times
when card
removed (both
CPUSB# and
CPPE# de-
asserted)
tf
Output fall times
when SHDN#
asserted (card is
present)
CL(AUXVOUT)=100uF,
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
0.1
0.1
3
3
ms
ms
RL=VI(AUXININ)/0.250A
CL(1.5VOUT)=100uF,
RL=VI(1.5VIN)/0.500A
CL(3.3VOUT)=0.1uF, IO(3.3VOUT)=0A
CL(AUXVOUT)=0.1uF, IO(AUXOUT)=0A
CL(1.5VOUT)=0.1uF, IO(1.5VOUT)=0A
CL(3.3VOUT)=100uF, RL=VI(3.3VIN)/1A
3.3VIN to 3.3VOUT
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
3.3VIN to 3.3VOUT
0.1
0.1
0.1
0.1
6
6
6
6
Tpd(on)
Turn on
propagation
delay
CL(AUXVOUT)=100uF,
AUXIN to AUXOUT
1.5VIN to 1.5VOUT
0.1
0.1
6
6
RL=VI(AUXININ)/0.250A
CL(1.5VOUT)=100uF,
RL=VI(1.5VIN)/0.500A
-12-
W83L351 Series
9. FUNCTIONAL TRUTH TABLES
Truth Table for Voltage Outputs
LOGIC INPUTS
VOLTAGE OUTPUTS(2)
1.5VIN SHDN# STBY# CP# (4) AUXOUT 3.3VOUT 1.5VOUT
VOLTAGES INPUTS (1)
MODE(3)
AUXIN
Off
3.3VIN
X
X
Off
On
On
X
X
1
1
1
0
1
1
X
1
0
0
X
X
0
X
X
0
Off
Off
Off
Off
Off
Off
Off
Off
On
Off
On
On
X
On
Off
Off
Off
Off(5)
On
X
X
1
Off
Off
Off
Off(6)
On
GND
GND
On
GND
GND
Off
GND
GND
Off
Shutdown
No Card
Standby
On
X
X
On
On
On
0
On →
On →
On
On
1
1
1
1
0
0
On
On
Off
On
Off
On
Standby(7)
Off
Off
Card
On
On
Inserted
(1) For input voltages, On means the respective input voltage is higher than its turn on threshold voltage; otherwise, the
voltage is Off (for AUX input, Off means the voltage is close to zero volt).
(2) For output voltages, On means the respective power switch is turned on so the input voltage is connected to the output;
Off means the power switch and its output discharge FET are both off; Gnd means the power switch is off but the output
discharge FET is on so the voltage on the output is pulled down to 0 V.
(3) Mode assigns each set of input conditions and respective output voltage results to a different name. These modes are
referred to as input conditions in the following Truth Table for Logic Outputs.
(4) CP# = CPUSB# and CPPE# equal to 1 when both CPUSB# and CPPE# signals are logic high, or equal to 0 when either
CPUSB# or CPPE# is low.
(5) STBY# is asserted (logic low) prior to the card being present.
(6) STBY# is asserted (logic low) prior to the voltage inputs being present.
(7) The card is inserted prior to the removal of the Primary or Secondary power (either 3.3VIN or 1.5VIN or both) at the input
of the ExpressCard power switch, then only the primary and secondary power (both 3.3VOUT and 1.5VOUT) are
removed and the auxiliary power is sent to the ExpressCard slot.
Publication Date: July 5, 2007
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Revision 1.10
W83L351 Series
Truth Table for Logic Outputs
INPUT CONDITIONS
LOGIC OUTPUTS
MODE
Off
SYSRST#
RCLKEN (1)
PERST#
RCLKEN (2)
Shutdown
No Card
Standby
X
X
0
0
0
0
1
1
Hi - Z
0
0
0
1
0
1
0
1
0
Card Inserted
Hi - Z
0
(1) RCLKEN as a logic input in this column. RCLKEN is an I/O pin and it can be driven low externally, left open, or
connected to high-impedance terminals, such as the gate of a MOSFET. It must not be driven high externally.
(2) RCLKEN as a logic output in this column.
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W83L351 Series
10. TYPICAL OPERATING WAVEFORMS
CH1 CPPE#
CH2 3.3VOUT
CH3 1.5VOUT
CH4 AUXOUT
Fig.1 Output Voltage When Card Is Inserted
CH1 3.3VOUT
CH2 RCLKEN
CH3 PERST#
Fig.2 RCLKEN and PERST# Voltage During Power Up
Publication Date: July 5, 2007
Revision 1.10
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W83L351 Series
CH1 AUXOUT
CH2 RCLKEN
CH3 PERST#
Fig.3 RCLKEN and PERST# Voltage During Power Down
CH1 SYSRST#
CH2 PERST#
Fig.4 PERST# Asserted by SYSRST# When Power Is On
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W83L351 Series
CH1 SYSRST#
CH2 PERST#
Fig.5 PERST# De-Asserted by SYSRST# When Power Is On
CH1 3.3VIN
CH2 3.3VOUT
CH3 1.5VOUT
CH4 AUXOUT
Fig.6 Output Voltage When 3.3VIN Is Removed
Publication Date: July 5, 2007
Revision 1.10
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W83L351 Series
CH1 1.5VIN
CH2 3.3VOUT
CH3 1.5VOUT
CH4 AUXOUT
Fig.7 Output Voltage When 1.5VIN Is Removed
CH1 OC#
CH2 AUXOUT
Fig.8 OC# Response When AUXOUT Power Into A Short
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W83L351 Series
CH1 OC#
CH2 3.3VOUT
Fig.9 OC# Response When 3.3VOUT Power Into A Short
CH1 OC#
CH2 1.5VOUT
Fig.10 OC# Response When 1.5VOUT Power Into A Short
Publication Date: July 5, 2007
Revision 1.10
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W83L351 Series
11. EXPRESSCARD TIMING DIAGRAMS
Tpd Min Max Units
a
System
dependent
b
c
d
100 us
10 ms
us
100
1
e
20 ms
Fig.11 Card Present Before Host Power (Note.1)
Tpd Min Max Units
a
b
c
100 us
10 ms
20 ms
1
Fig.12 Host Power Is On Prior To Card Insertion (Note.2)
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W83L351 Series
Fig.13 Host System In Standby Prior to Card Insertion
Tpd Min Max Units
a
System
dependent
b
Load
dependent
c
500
500
ns
ns
d
Fig.14 Host Controlled Power Down (Note.3)
Publication Date: July 5, 2007
Revision 1.10
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W83L351 Series
Tpd Min Max Units
a
b
c
System
dependent
System
dependent
Load
dependent
d
e
500 ns
500 ns
Fig.15 Controlled Power Down When SHDN# Asserted (Note.4)
Tpd Min Max Units
a
Load
dependent
500 ns
500 ns
b
c
Fig.16 Surprise Card Removal
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W83L351 Series
Note.1: According to the electrical specifications of ExpressCard Standard, the minimum propagation
delay time of e (Power stable to PERST# inactive) is 1ms.
Note.2: RCLKEN could be treated as a power good signal when card power is over 86% of nominal
voltage.
Note.3: The propagation delay time of c is SYSRST# assertion to PERST# assertion. The propagation
delay time of d is card power is under 86% of nominal voltage to RCLKEN de-assertion.
Note 4: RCLEKN de-assertion is prior to PERST# assertion when card power lost in any situation.
Publication Date: July 5, 2007
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Revision 1.10
W83L351 Series
12. PACKAGE DIMENSION
W83L351G - TSSOP20
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W83L351 Series
W83L351YG - QFN20, Thermal Pad Dimension: 2.0mm X 2.0mm
Publication Date: July 5, 2007
Revision 1.10
-25-
W83L351 Series
W83L351YCG - QFN20, Thermal Pad Dimension: 2.7mm X 2.7mm
-26-
W83L351 Series
¾ Taping Specification
20 Pin TSSOP Package
20 Pin QFN Package
Publication Date: July 5, 2007
Revision 1.10
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W83L351 Series
13. ORDERING INFORMATION
PART
PACKAGE TYPE
NUMBER
SUPPLIED AS
PRODUCTION FLOW
E Shape: 74 units/Tube
T Shape: 2,500
units/T&R
Commercial, 0℃ to +70
20PIN TSSOP (Pb-free
W83L351G
package)
℃
E Shape: 490
units/Tray
T Shape: 4,000
units/T&R
20PIN QFN (Pb-free package)
W83L351YG
Commercial, 0℃ to +70
Thermal Pad Size: 2.0X2.0 ㎜²
℃
E Shape: 490
units/Tray
T Shape: 4,000
units/T&R
20PIN QFN (Pb-free package)
W83L351YCG
Commercial, 0℃ to +70
Thermal Pad Size: 2.7X2.7 ㎜²
℃
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W83L351 Series
14. TOP MARKING SPECIFICATION
W83L351G
212345678
606XARA
Winbond
351YG
636XARB
Winbond
351YCG
636XARB
Left line: Winbond logo
1st line: Winbond – company name
2nd line: 351YG/351YCG – the part number
3rd line: Tracking code 636 X ARB
636: Packages assembled in Year 06’, week 36
X: Assembly house ID
1st line: W83L351G – the part number
2nd line: Chip lot no
3rd line: Tracking code 606 X ARA
606: Packages assembled in Year 06’, week 06
X: Assembly house ID
ARB: The IC version
ARA: The IC version
Publication Date: July 5, 2007
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Revision 1.10
W83L351 Series
Important Notice
Winbond products are not designed, intended, authorized or warranted for use as components
in systems or equipment intended for surgical implantation, atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal
instruments, combustion control instruments, or for other applications intended to support or
sustain life. Further more, Winbond products are not intended for applications wherein failure
of Winbond products could result or lead to a situation wherein personal injury, death or
severe property or environmental damage could occur.
Winbond customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Winbond for any damages resulting from such improper
use or sales.
Headquarters
Winbond Electronics Corporation America Winbond Electronics (Shanghai) Ltd.
27F, 2299 Yan An W. Rd. Shanghai,
200336 China
2727 North First Street, San Jose,
CA 95134, U.S.A.
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 86-21-62365999
FAX: 86-21-62365998
TEL: 1-408-9436666
TEL: 886-3-5770066
FAX: 1-408-5441798
FAX: 886-3-5665577
http://www.winbond.com.tw/
Taipei Office
Winbond Electronics Corporation Japan
Winbond Electronics (H.K.) Ltd.
9F, No.480, Rueiguang Rd.,
Neihu District, Taipei, 114,
Taiwan, R.O.C.
7F Daini-ueno BLDG, 3-7-18
Shinyokohama Kohoku-ku,
Yokohama, 222-0033
Unit 9-15, 22F, Millennium City,
No. 378 Kwun Tong Rd.,
Kowloon, Hong Kong
TEL: 852-27513100
TEL: 886-2-8177-7168
FAX: 886-2-8751-3579
TEL: 81-45-4781881
FAX: 81-45-4781800
FAX: 852-27552064
Please note that all data and specifications are subject to change without notice.
All the trademarks of products and companies mentioned in this datasheet belong to their respective owners.
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