XC95216-10BG352I [XILINX]
XC95216 In-System Programmable CPLD; XC95216在系统可编程CPLD型号: | XC95216-10BG352I |
厂家: | XILINX, INC |
描述: | XC95216 In-System Programmable CPLD |
文件: | 总10页 (文件大小:66K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
1
XC95216 In-System Programmable
CPLD
1
0*
August 21, 2001 (Version 3.1)
Product Specification
Features
Power Management
•
•
10 ns pin-to-pin logic delays on all pins
to 111 MHz
Power dissipation can be reduced in the XC95216 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
f
CNT
•
•
•
216 macrocells with 4800 usable gates
Up to 166 user I/O pins
5 V in-system programmable
Operating current for each design can be approximated for
specific operating conditions using the following equation:
-
-
Endurance of 10,000 program/erase cycles
Program/erase over full commercial voltage and
temperature range
I
(mA) =
CC
MC
•
•
Enhanced pin-locking architecture
Flexible 36V18 Function Block
(1.7) + MC (0.9) + MC (0.006 mA/MHz) f
HP LP
Where:
-
90 product terms drive any or all of 18 macrocells
within Function Block
MC
HP
= Macrocells in high-performance mode
-
Global and product term clocks, output enables, set
and reset signals
MC = Macrocells in low-power mode
LP
MC = Total number of macrocells used
•
•
Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
f
= Clock frequency (MHz)
Programmable power reduction mode in each
macrocell
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design protection
High-drive 24 mA outputs
Figure 1 shows a typical calculation for the XC95216
device.
•
•
•
•
•
•
•
600
3.3 V or 5 V I/O capability
Advanced CMOS 5V FastFLASH technology
Supports parallel programming of more than one
XC9500 concurrently
(500)
400
(360)
•
Available in 160-pin PQFP, 352-pin BGA, and 208-pin
HQFP packages
(340)
Description
200
The XC95216 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of twelve
36V18 Function Blocks, providing 4,800 usable gates with
propagation delays of 10 ns. See Figure 2 for the architec-
ture overview.
0
50
100
Clock Frequency (MHz)
X5918
Figure 1: Typical I
vs. Frequency For XC95216
CC
August 21, 2001 (Version 3.1)
1
R
XC95216 In-System Programmable CPLD
3
JTAG
In-System Programming Controller
1
JTAG Port
Controller
36
Function
Block 1
18
18
18
18
I/O
Macrocells
1 to 18
I/O
I/O
I/O
36
36
36
Function
Block 2
Macrocells
1 to 18
I/O
Blocks
I/O
I/O
Function
Block 3
Macrocells
1 to 18
I/O
I/O
3
I/O/GCK
I/O/GSR
I/O/GTS
Function
Block 4
1
2
Macrocells
1 to 18
36
Function
Block 12
18
Macrocells
1 to 18
X5917
Figure 2: XC95216 Architecture
Function Block outputs (indicated by the bold line) drive the I/O Blocks directly
2
August 21, 2001 (Version 3.1)
R
XC95216 In-System Programmable CPLD
Absolute Maximum Ratings
Symbol
CC
Parameter
Value
Units
V
V
V
V
T
T
Supply voltage relative to GND
-0.5 to 7.0
DC input voltage relative to GND
-0.5 to V
+ 0.5
V
IN
CC
CC
Voltage applied to 3-state output with respect to GND
Storage temperature
-0.5 to V
+ 0.5
V
TS
-65 to +150
+260
°C
°C
STG
SOL
Max soldering temperature (10 s @ 1/16 in = 1.5 mm)
Warning: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
of time may affect device reliability.
1
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
V
V
Supply voltage for internal logic and input buffer
4.75
(4.5)
5.25
(5.5)
V
CCINT
Supply voltage for output drivers for 5 V operation
Supply voltage for output drivers for 3.3 V operation
Low-level input voltage
4.75 (4.5)
5.25 (5.5)
3.6
V
V
V
V
V
CCIO
3.0
0
V
V
V
0.80
IL
IH
O
High-level input voltage
Output voltage
2.0
0
V
+0.5
CCINT
V
CCIO
Note: 1. Numbers in parenthesis are for industrial-temperature range versions.
Endurance Characteristics
Symbol
Parameter
Min
20
Max
Units
Years
Cycles
Data Retention
Program/Erase Cycles
-
-
t
DR
10,000
N
PE
August 21, 2001 (Version 3.1)
3
R
XC95216 In-System Programmable CPLD
DC Characteristics Over Recommended Operating Conditions
Symbol
Parameter
Test Conditions
Min
Max
Units
V
V
I
Output high voltage for 5 V operation
I
V
= -4.0 mA
OH
2.4
V
OH
= Min
CC
Output high voltage for 3.3 V operation
Output low voltage for 5 V operation
Output low voltage for 3.3 V operation
Input leakage current
I
V
I
V
= -3.2 mA
= Min
2.4
V
V
OH
CC
= 24 mA
0.5
0.4
OL
OL
= Min
CC
= 10 mA
I
V
OL
V
V
V
V
V
V
= Min
CC
= Max
±10.0
±10.0
10.0
µA
µA
pF
ma
IL
CC
= GND or V
IN
CC
I
I/O high-Z leakage current
= Max
CC
IH
= GND or V
IN
CC
C
I/O capacitance
= GND
IN
IN
f = 1.0 MHz
I
Operating Supply Current
(low power mode, active)
V = GND, No load
f = 1.0 MHz
200 (typ)
CC
I
AC Characteristics
XC95216-10 XC95216-15 XC95216-20
Symbol
Parameter
Units
Min
Max Min
Max Min
Max
t
t
t
t
f
f
t
t
t
t
t
t
t
t
I/O to output valid
10.0
8.0
15.0
10.0
0.0
20.0
ns
ns
PD
I/O setup time before GCK
I/O hold time after GCK
GCK to output valid
6.0
0.0
SU
H
0.0
ns
ns
6.0
8.0
10.0
CO
CNT
1
16-bit counter frequency
111.1
66.7
2.0
95.2
55.6
4.0
83.3
50.0
4.0
MHz
MHz
ns
2
Multiple FB internal operating frequency
I/O setup time before p-term clock input
I/O hold time after p-term clock input
P-term clock to output valid
GTS to output valid
SYSTEM
PSU
PH
4.0
4.0
6.0
ns
10.0
6.0
12.0
11.0
11.0
14.0
14.0
5.5
16.0
16.0
16.0
18.0
18.0
ns
ns
PCO
OE
GTS to output disable
6.0
ns
OD
Product term OE to output enabled
Product term OE to output disabled
GCK pulse width (High or Low)
10.0
10.0
5.5
ns
POE
POD
WLH
ns
4.5
ns
Note: 1. fCNT is the fastest 16-bit counter frequency available, using the local feedback when applicable.
fCNT is also the Export Control Maximum flip-flop toggle rate, fTOG
2. f is the internal operating frequency for general purpose system designs spanning multiple FBs.
.
SYSTEM
4
August 21, 2001 (Version 3.1)
R
XC95216 In-System Programmable CPLD
V
TEST
R
1
Output Type
V
V
R
R
C
L
CCIO
TEST
1
2
Device Output
5.0 V
3.3 V
5.0 V
3.3 V
160 Ω
260 Ω
120 Ω
360 Ω
35 pF
35 pF
R
C
L
2
X5906
Figure 3: AC Load Circuit
Internal Timing Parameters
XC95216-10 XC95216-15 XC95216-20
Symbol
Parameter
Units
Min
Max Min
Max Min
Max
Buffer Delays
t
t
t
t
t
t
Input buffer delay
3.5
2.5
6.0
6.0
3.0
0.0
4.5
3.0
6.5
3.0
ns
ns
ns
ns
ns
ns
IN
GCK buffer delay
GSR buffer delay
GTS buffer delay
Output buffer delay
GCK
GSR
GTS
OUT
EN
7.5
9.5
11.0
4.5
16.0
6.5
Output buffer enable/disable delay
0.0
0.0
Product Term Control Delays
t
t
t
Product term clock delay
Product term set/reset delay
Product term 3-state delay
3.0
2.5
3.5
2.5
3.0
5.0
2.5
3.0
5.0
ns
ns
ns
PTCK
PTSR
PTTS
Internal Register and Combinatorial delays
t
t
t
t
t
t
t
Combinatorial logic propagation delay
Register setup time
1.0
3.5
3.0
3.5
4.0
ns
ns
ns
ns
ns
ns
ns
ns
PDI
SUI
HI
2.5
3.5
Register hold time
4.5
6.5
Register clock to output valid time
Register async. S/R to output delay
Register async. S/R recovery before clock 10.0
Internal logic delay
0.5
0.5
0.5
8.0
COI
AOI
RAI
LOGI
7.0
10.0
2.5
8.0
10.0
3.0
3.0
tLOGILP
Internal low power logic delay
11.0
11.5
11.5
Feedback Delays
t
t
FastCONNECT matrix feedback delay
Function Block local feeback delay
9.5
3.5
11.0
3.5
13.0
5.0
ns
ns
F
LF
Time Adders
3
t
t
Incremental Product Term Allocator delay
Slew-rate limited delay
1.0
4.5
1.0
5.0
1.5
5.5
ns
ns
PTA
SLEW
Note: 3. tPTA is multiplied by the span of the function as defined in the family data sheet.
August 21, 2001 (Version 3.1)
5
R
XC95216 In-System Programmable CPLD
XC95216 I/O Pins
Function
Block
BScan
Order
Function
Block
BScan
Order
Macrocell PQ160 HQ208 BG352
Notes
Macrocell PQ160 HQ208 BG352
Notes
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
2
–
18
19
–
–
22
23
28
25
30
–
–
645
642
639
636
633
630
627
624
621
618
615
612
609
606
603
600
597
594
591
588
585
582
579
576
573
570
567
564
561
558
555
552
549
546
543
540
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
1
2
–
32
33
–
–
43
44
39
45
46
–
–
537
534
531
528
525
522
519
516
513
510
507
504
501
498
495
492
489
486
483
480
477
474
471
468
465
462
459
456
453
450
447
444
441
438
435
432
M25
M26
N26
N25
P23
–
AA26
Y24
U23
AB25
AA24
–
3
3
[1]
[1]
4
4
5
6
21
22
–
5
6
34
35
–
7
7
8
23
24
–
31
32
12
33
34
–
P24
R26
G26
R24
T26
–
8
36
37
–
47
49
67
50
51
–
Y23
AA23
AD18
AB24
AD25
–
9
9
10
11
12
13
14
15
16
17
18
1
10
11
12
13
14
15
16
17
18
1
25
26
–
38
39
–
27
28
29
30
–
35
36
37
38
–
T25
T23
V26
U24
–
42
43
–
55
56
80
57
–
AD23
AF24
AE12
AE23
–
[1]
44
–
–
–
–
–
–
–
2
6
7
E25
G24
P25
F26
H23
–
[1]
[1]
2
152
153
–
198
199
196
200
201
–
D18
A21
B19
B20
C20
–
3
7
8
3
4
–
29
9
10
–
4
5
6
8
9
5
6
154
155
–
7
–
7
8
11
12
–
15
16
-
K23
K24
–
8
156
158
–
202
205
-
B22
B24
–
9
9
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
13
14
–
17
18
–
J25
L24
–
159
2
206
3
C23
E23
–
[1]
[1]
–
–
15
16
–
19
20
14
21
–
K25
L26
H25
M24
–
3
4
C26
E24
D20
F24
–
4
5
[1]
–
203
6
–
17
–
5
–
Note: 1. Global control pin.
6
August 21, 2001 (Version 3.1)
R
XC95216 In-System Programmable CPLD
XC95216 I/O Pins (continued)
Function
BScan
Order
Function
BScan
Order
Macrocell PQ160 HQ208 BG352
Block
Notes
Macrocell PQ160 HQ208 BG352
Notes
Block
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1
2
–
45
47
–
–
–
429
426
423
420
417
414
411
408
405
402
399
396
393
390
387
384
381
378
375
372
369
366
363
360
357
354
351
348
345
342
339
336
333
330
327
324
1
2
–
58
59
–
–
76
77
54
78
82
–
–
AE13
AC13
AE24
AD13
AD12
–
321
318
315
312
309
306
303
300
297
294
291
288
285
282
279
276
273
270
267
264
261
258
255
252
249
246
243
240
237
234
231
228
225
222
219
216
58
AE22
AE21
W25
AF21
AD19
–
3
60
3
4
41
4
5
6
48
49
–
61
63
5
6
60
62
–
7
–
7
8
50
52
–
64
AE20
AF18
AD1
AE17
AE16
–
8
63
64
–
83
84
91
85
86
–
AC12
AF11
AD8
AE11
AE9
–
9
70
9
10
11
12
13
14
15
16
17
18
1
109
71
72
10
11
12
13
14
15
16
17
18
1
53
54
–
65
66
–
–
55
56
–
73
AF16
AE14
Y26
AF14
–
67
68
–
87
88
48
89
–
AD9
AC10
AC26
AF7
–
74
40
57
–
75
–
69
–
–
–
–
–
–
–
2
140
142
–
180
182
208
185
186
–
A12
A13
D22
C14
A15
–
2
126
128
–
162
164
143
166
167
–
B5
3
3
B6
4
4
J1
5
6
143
144
–
5
6
129
130
–
D8
B7
7
7
–
8
145
146
–
187
188
183
191
192
–
B15
C15
B14
A16
C16
–
8
131
132
–
170
171
195
173
174
–
C10
B9
9
9
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
A20
A9
D11
–
147
148
–
133
134
–
149
150
–
193
194
169
197
–
C17
B18
D9
135
138
–
175
178
189
179
–
B11
C12
D15
B12
–
151
–
C19
–
139
–
August 21, 2001 (Version 3.1)
7
R
XC95216 In-System Programmable CPLD
XC95216 I/O Pins (continued)
Function
Block
BScan
Order
Function
Block
BScan
Order
Macrocell PQ160 HQ208 BG352
Notes
Macrocell PQ160 HQ208 BG352
Notes
9
9
1
2
–
72
74
–
–
–
AD7
AE5
AD4
AC7
AE3
–
213
210
207
204
201
198
195
192
189
186
183
180
177
174
171
168
165
162
159
156
153
150
147
144
141
138
135
132
129
126
123
120
117
114
111
108
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
1
2
–
87
88
–
–
–
Y1
V4
U4
V3
W2
–
105
102
99
96
93
90
87
84
81
78
75
72
69
66
63
60
57
54
51
48
45
42
39
36
33
30
27
24
21
18
15
12
9
95
115
116
119
117
118
–
9
3
97
3
9
4
101
99
100
–
4
9
9
5
6
76
77
–
5
6
89
90
–
9
7
7
9
8
78
79
–
102
103
90
AC5
AD3
AE8
AA4
AB2
–
8
91
92
–
121
122
107
123
125
–
V2
U2
AC3
T2
R4
–
9
9
9
9
10
11
12
13
14
15
16
17
18
1
10
11
12
13
14
15
16
17
18
1
9
9
82
83
–
110
111
–
93
95
–
9
9
84
85
–
112
113
62
AC1
AA2
AC19
AA1
–
96
97
–
126
127
120
128
–
R3
R2
U3
R1
–
9
9
9
9
86
–
114
–
98
–
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
–
–
–
–
–
–
2
113
114
–
147
148
144
149
150
–
H3
J4
2
101
102
–
131
133
106
134
135
–
P1
N2
AD2
N4
N3
–
3
3
4
K3
4
5
6
115
116
–
G2
G3
–
5
6
103
104
–
7
7
8
117
118
–
152
154
168
155
158
–
E2
8
105
106
–
136
137
151
138
139
–
M1
M3
F2
M4
L1
–
9
D2
A7
9
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
119
122
–
F4
B3
107
108
–
–
123
124
–
159
160
165
161
–
A3
109
111
–
140
145
142
146
–
L2
G1
L3
H2
–
D6
A6
6
125
–
C6
–
112
–
3
0
8
August 21, 2001 (Version 3.1)
R
XC95216 In-System Programmable CPLD
XC95216 Global, JTAG and Power Pins
Pin Type
PQ160
HQ208
BG352
I/O/GCK1
I/O/GCK2
I/O/GCK3
I/O/GTS1
I/O/GTS2
I/O/GTS3
I/O/GTS4
I/O/GSR
TCK
33
44
Y24
35
46
AA24
42
55
AD23
6
8
7
9
E25
F26
2
3
E23
4
5
E24
159
206
C23
75
98
AD6
TDI
TDO
71
136
94
176
AF6
D12
AE6
TMS
73
96
V
5 V
10,46,94,157
1,41,61,81,121,141
11, 59, 124, 153, 204
1, 26, 53, 65, 79, 92, 105, 132,
157, 172, 181, 184
H24, AF23, T1, G4, C22
CCINT
3.3 V/5 V
V
A10, A17, B2, B25, D7, D13,
D19, G23, H4, K1, K26, N23, P4,
U1, U26, W23, Y4, AC8, AC14,
AC20, AE25, AF10, AF17
CCIO
GND
20, 31, 40, 51, 70, 80, 99, 100, 2, 13, 24, 27, 42, 52, 66, 68, 69, A1, A2, A5, A8, A14, A19, A22,
110, 120, 127, 137, 160
81, 93, 104, 108, 129, 130, 141, A25, A26, B1, B26, C7, E1, E26,
156, 163, 177, 190, 207
H1, H26, N1, P3, P26, V23, W1,
W26, AB1, AB4, AB26, AC9,
AC17, AE1, AE26, AF1, AF2,
AF5, AF8, AF13, AF19, AF20,
AF22, AF25, AF26
No Connects
–
–
A4, A11, A18, A23, A24, B4, B8,
B10, B13, B16, B17, B21, B23,
C1, C2, C3, C4, C5, C8, C9, C11,
C13, C18, C21, C24, C25, D1,
D3, D4, D5, D10, D14, D16, D17,
D21, D23, D24, D25, D26, E3,
E4, F1, F3, F23, F25, G25, J2,
J3, J23, J24, J26, K2, K4, L4,
L23, L25, M2, M23, N24, P2,
R23, R25, T3, T4, T24, U25, V1,
V24, V25, W3, W4, W24, Y2, Y3,
Y25, AA3, AA25, AB3, AB23,
AC2, AC4, AC6, AC11, AC15,
AC16, AC18, AC21, AC22,
AC23, AC24, AC25, AD5, AD10,
AD11, AD14, AD15, AD16,
AD17, AD20, AD21, AD22,
AD24, AD26, AE2, AE4, AE7,
AE10, AE15, AE18, AE19, AF3,
AF4, AF9, AF12, AF15
August 21, 2001 (Version 3.1)
9
R
XC95216 In-System Programmable CPLD
Ordering Information
XC95216 -10 HQ 208 C
Device Type
Speed
Temperature Range
Number of Pins
Package Type
Speed Options
- 20 20 ns pin-to-pin delay
Packaging Options
PQ160 160-Pin Plastic Quad Flat Pack (PQFP)
HQ208 208-Pin Heat Sink Quad Flat Pack (HQFP)
BG352 352-Pin Ball Grid Array (BGA)
-15 15 ns pin-to-pin delay
-10 10 ns pin-to-pin delay
Temperature Options
C
I
Commercial 0°C to +70°C
Industrial –40°C to +85°C
Component Availability
Pins
Type
Code
160
208
352
Plastic
PQFP
Plastic
BGA
Power QFP
PQ160
C(I)
HQ208
C(I)
BG352
C(I)
–20
–15
–10
XC95216
C(I)
C(I)
C(I)
C(I)
C(I)
C(I)
C = Commercial = 0°C to +70°C I = Industrial = –40°C to +85°C
Revision Control
Date
Revision
Update AC Characteristics and Internal Parameters
Added Note 1 to page 6.
12/4/98
8/21/01
10
August 21, 2001 (Version 3.1)
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