CC0201MFX5R6BB [YAGEO]
SURFACE MOUNT MULTILAYER CERAMIC CAPACITORS;
| 型号： | CC0201MFX5R6BB |
| 厂家： | 
YAGEO CORPORATION |
| 描述： | SURFACE MOUNT MULTILAYER CERAMIC CAPACITORS |
| 文件： | 总18页 (文件大小：1444K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SURFACE MOUNT MULTILAYER
CERAMIC CAPACITORS
General purpose & High capacitance
Class 2, X5R
4 V TO 50 V
100 pF to 220 µF
RoHS compliant & Halogen free
Product specification
2
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
ORDERING INFORMATION -GLOBAL PART NUMBER, PHYCOMP
CTC & 12NC
All part numbers are identified by the series, size, tolerance, TC material,
packing style, voltage, process code, termination and capacitance value.
SCOPE
This specification describes X5R
series chip capacitors with lead-
free terminations.
YAGEO BRAND ordering code
APPLICATIONS
PCs, Hard disk, Game PCs
Power supplies
(
)
GLOBAL PART NUMBER PREFERRED
CC XXXX
X
X
X5R
X
BB XXX
(1) (2) (3)
(4)
(5)
DVD players
( )
1 SIZE – INCH BASED (METRIC)
Mobile phones
Data processing
0201 (0603)
0402 (1005)
0603 (1608)
0805 (2012)
1206 (3216)
1210 (3225)
FEATURES
Supplied in tape on reel
Nickel-barrier end termination
RoHS compliant
Halogen free compliant
( )
2 TOLERANCE
K = ±10%
M = ±20%
( )
3 PACKING STYLE
R = Paper/PE taping reel; Reel 7 inch
K = Blister taping reel; Reel 7 inch
P = Paper/PE taping reel; Reel 13 inch
F = Blister taping reel; Reel 13 inch
C = Bulk case
( )
4 RATED VOLTAGE
4 = 4 V
5 = 6.3 V
6 = 10 V
7 = 16 V
8 = 25 V
9 = 50 V
( )
5 CAPACITANCE VALUE
2 significant digits+number of zeros
The 3rd digit signifies the multiplying factor, and letter R is decimal point
Example: 103 = 10 x 103 = 10,000 pF = 10 nF
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Jan. 12, 2017 V.23
Product specification
3
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
CONSTRUCTION
The capacitor consists of a
rectangular block of ceramic
dielectric in which a number of
interleaved metal electrodes are
contained. This structure gives
rise to a high capacitance per
unit volume.
The inner electrodes are
connected to the two end
terminations and finally covered
with a layer of plated tin (NiSn).
The terminations are lead-free. A
cross section of the structure is
shown in Fig.1.
Fig. 1 Surface mount multilayer ceramic capacitor construction
DIMENSION
OUTLINES
Table 1 For outlines see fig. 2
L2 / L3 (mm)
L4
(mm)
For dimension see Table 1
DIMENSION
CODE
L1 (mm)
TYPE
0201
W (mm)
T (MM)
min.
max.
min.
0.6 ±0.03
0.6 ±0.05
0.6 ±0.09
0.6 ±0.15
1.0 ±0.05
1.0 ±0.10
1.0 ±0.15
1.0 ±0.20
1.6 ±0.10
1.6 ±0.15
1.6 ±0.20
2.0 ±0.20
2.0 ±0.20
3.2 ±0.3
0.3 ±0.03
0.3 ±0.05
0.3 ±0.09
0.3 ±0.15
0.5 ±0.05
0.5 ±0.10
0.5 ±0.15
0.5 ±0.20
0.8 ±0.10
0.8 ±0.15
0.8 ±0.20
0.3 ±0.03
0.3 ±0.05
0.3 ±0.09
0.3 ±0.15
0.5 ±0.05
0.5 ±0.10
0.5 ±0.15
0.5 ±0.20
0.8 ±0.10
0.8 ±0.15
0.8 ±0.20
0.1
0.2
0.2
0.2
0.2
0.2
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.55
0.55
1.4
1.4
1.4
1.4
1.4
1.4
1.0
1.0
BA
BB
0.1
0.2
0.1
0.25
0.25
0.35
0.35
0.35
0.35
0.6
BC
BD
CA
CB
CC
CD
DA
DB
DC
EA
EB
0.1
0.15
0.15
0.15
0.15
0.2
0402
Fig. 2 Surface mount multilayer
ceramic capacitor dimension
0603
0805
0.2
0.6
0.2
0.6
1.25 ±0.20 0.85 ±0.10
1.25 ±0.20 1.25 ±0.20
0.25
0.25
0.25
0.25
0.25
0.3
0.75
0.75
0.75
0.75
0.8
1.6 ±0.2
1.6 ±0.2
1.6 ±0.2
1.6 ±0.3
2.5 ±0.20
2.5 ±0.20
2.5 ±0.20
2.5 ±0.30
1.15 ±0.10
1.25 ±0.20
1.6 ±0.2
FA
3.2 ±0.3
FB
1206
1210
3.2 ±0.3
FC
3.2 ±0.3
1.6 ±0.3
0.9
FD
GA
GB
GC
GD
3.2 ±0.20
3.2 ±0.20
3.2 ±0.20
3.2 ±0.30
1.25 ±0.20
1.9 ±0.20
2.5 ±0.20
2.5 ±0.30
0.25
0.25
0.25
0.25
0.75
0.75
0.75
0.75
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Jan. 12, 2017 V.23
Product specification
4
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
CAPACITANCE RANGE & THICKNESS FOR X5R
Table 2 Sizes from 0201 to 0402
0201
4 V
0402
CAP.
4 V
6.3 V
10 V
16 V
25 V
50 V
6.3 V
10 V
16 V
25 V
50 V
100 pF
150 pF
220 pF
330 pF
470 pF
680 pF
1.0 nF
1.5 nF
2.2 nF
3.3 nF
4.7 nF
6.8 nF
10 nF
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
BA
15 nF
22 nF
BA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CC
CD
CD
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CC
CD
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
CA
33 nF
47 nF
68 nF
100 nF
150 nF
220 nF
330 nF
470 nF
680 nF
1.0 µF
2.2 µF
4.7 µF
10 µF
22 µF
BB
BA
BA
BA
BA
BA
BA
BA
BA
CB
CB
CB
BB
BC
BD
BB
BB
CA
CC
CA
CD
BC
BC
CC
CD
CD
CC
NOTE
1. Values in shaded cells indicate thickness class in mm
2. Capacitance value of non E-6 series is available on request
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Jan. 12, 2017 V.23
Product specification
5
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
CAPACITANCE RANGE & THICKNESS FOR X5R
Table 3 Sizes from 0603 to 0805
0805
0603
4V
CAP.
6.3 V
10 V
16 V
25 V
50V
4V
6.3 V
10 V
16 V
25 V
50V
10 nF
15 nF
22 nF
33 nF
47nF
68 nF
100 nF
150 nF
220 nF
330 nF
DA
DA
DA
DA
DA
DA
DA
DA
DA
DA
EA
EB
EA
EB
EA
EB
470 nF
680 nF
1.0 µF
2.2 µF
4.7 µF
10 µF
DA
DA
DA
DA
DA
DB
DA
DA
DA
DA
DA
DA
DA
DA
DA
DB
DC
DA
DA
DA
DB
DB
DC
DA
DA
DA
DC
EB
EB
EB
EB
EA
EB
EA
EB
EA
EB
EB
EB
EB
EB
EB
EA
EB
EA
EB
EA
EB
EA
EB
EA
EB
EA
EB
EA
EB
EA
EB
EA
EB
EB
EB
EA
EB
EA
EB
DC
DC
EB
EB
EB
EB
22 µF
47 µF
DC
DC
EB
EB
EB
EB
EB
DC
100 µF
EB
NOTE
1. Values in shaded cells indicate thickness class in mm
2. Capacitance value of non E-6 series is available on request
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Jan. 12, 2017 V.23
Product specification
6
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
Table 4 Sizes from 1206 to 1210
1206
4 V
1210
CAP.
6.3 V
10 V
16 V
25 V
50V
6.3 V
10 V
16 V
25 V
50V
10 nF
15 nF
22 nF
33 nF
47nF
68 nF
100 nF
150 nF
220 nF
330 nF
470 nF
680 nF
1.0 µF
2.2 µF
4.7 µF
10 µF
22 µF
47 µF
100 µF
220 µF
FA
FA
FC
FC
FC
FC
FD
FA
FA
FC
FC
FC
FC
FA
FA
FC
FC
FC
FD
FA
FA
FC
FC
FD
FC
FC
FC
FD
GA
GB
GB
GB
GC
GC
GD
GD
GA
GB
GB
GB
GC
GC
GD
GA
GB
GB
GB
GC
GC
GD
GA
GB
GB
GB
GD
GA
GB
GC
GC
FD
NOTE
1. Values in shaded cells indicate thickness class in mm
2. Capacitance value of non E-6 series is available on request
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Jan. 12, 2017 V.23
Product specification
7
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
THICKNESS CLASSES AND PACKING QUANTITY
Table 5
Ø 180 MM / 7 INCH
Ø 330 MM / 13 INCH
SIZE
CODE
THICKNESS
CLASSIFICATION QUANTITY PER REEL
TAPE WIDTH
QUANTITY
PER BULK CASE
Paper
Blister
Paper
Blister
0201
0402
0603
0.3 ±0.03 mm
0.5 ±0.05 / 0.1 mm
0.5 ±0.15 / 0.2 mm
0.8 ±0.1 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
8 mm
15,000
10,000
10,000
4,000
4,000
4,000
---
---
---
50,000
50,000
40,000
15,000
20,000
15,000
---
---
---
---
50,000
---
---
---
---
---
15,000
10,000
8,000
5,000
---
0.6 ±0.1 mm
---
---
0805
0.85 ±0.1 mm
1.25 ±0.2 mm
0.6 ±0.1 mm
---
---
3,000
---
10,000
---
4,000
4,000
---
20,000
15,000
---
0.85 ±0.1 mm
1.00 / 1.15 ±0.1 mm
1.25 ±0.2 mm
1.6 ±0.15 mm
1.6 ±0.2 mm
---
---
---
3,000
3,000
2,500
2,000
4,000
4,000
3,000
3,000
3,000
2,000
2,000
10,000
10,000
10,000
8,000
15,000
10,000
10,000
10,000
---
---
1206
---
---
---
---
---
---
---
---
---
0.6 / 0.7 ±0.1 mm
0.85 ±0.1 mm
1.15 ±0.1 mm
1.15 ±0.15 mm
1.25 ±0.2 mm
1.5 ±0.1 mm
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
1210
---
---
---
---
1.6 / 1.9 ±0.2 mm
---
---
---
---
2,000
1,000
2.0 ±0.2 mm
2.5 ±0.2 mm
8 mm
8 mm
---
---
---
---
---
---
---
---
1,000
500
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Jan. 12, 2017 V.23
Product specification
8
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
ELECTRICAL CHARACTERISTICS
X5R DIELECTRIC CAPACITORS; NISN TERMINATIONS
Unless otherwise specified, all tests and measurements shall be made under standard atmospheric conditions
for testing as given in 5.3 of IEC 60068-1:
- Temperature: 15 °C to 35 °C
- Relative humidity: 25% to 75%
- Air pressure: 86 kPa to 106 kPa
Before the measurements are made, the capacitor shall be stored at the measuring temperature for a time
sufficient to allow the entire capacitor to reach this temperature.
The period as prescribed for recovery at the end of a test is normally sufficient for this purpose.
Table 6
VALUE
DESCRIPTION
Capacitance range
100 pF to 220 µF
±10% and ± 20%
Capacitance tolerance
Dissipation factor (D.F.)
X5R
0201
0402
0603
0805
1206
1210
D.F.
≤ 6.3V
100pF to 10nF
22nF to 100nF
120nF to 220nF
330nF to 10uF
220nF to 1uF 470nF to 680nF
1uF to 10uF
1uF to 10uF
22uF
≤ 5%
≤ 7%
12nF to 1uF
2.2uF
2.2uF to 47uF
1uF to 100uF
22uF to 47uF
100uF, 220uF
47uF to 220uF
≤ 10%
≤ 15%
≤ 20%
≤ 5%
4.7uF
22uF
10V
100pF to 10nF
22nF to 100nF 220nF to 470nF 470nF to 680nF
1uF to 4.7uF
10uF to 47uF
1uF to 4.7uF
120nF to 220nF
330nF to 10uF
680nF
1uF
≤ 7%
12nF to 220nF, 1uF
470nF
1uF to 22uF
2.2uF to 47uF
10uF to 100uF
≤ 10%
≤ 15%
≤ 20%
≤ 5%
2.2uF
16V
25V
50V
100pF to 10nF
22nF to 100nF 220nF to 470nF 470nF to 680nF
1uF to 4.7uF
10uF to 47uF
1uF to 4.7uF
120nF to 220nF
680nF to 1uF
2.2uF to 10uF
1 uF to 2.2μF
≤ 7%
12nF to 220nF 470nF to 4.7uF
470nF
4.7uF to 22uF
10uF to 100uF
≤ 10%
≤ 20%
≤ 3.5%
≤ 5%
100pF to 10nF
22nF
27nF to 100nF 220nF to 470nF
470nF to 1uF
2.2uF
1uF to 2.2uF
4.7uF
1uF to 4.7uF
10uF
120nF to 220nF
22nF, 100nF 470nF to 2.2uF
680nF to 1uF
2.2uF to 10uF
≤ 7%
4.7uF to 22uF
10uF to 22uF
22uF
≤ 10%
≤ 3.5%
≤ 5%
100pF to 1nF
22nF
27nF to 120nF
150nF to 220nF
≤ 7%
470nF 220nF to 2.2uF
470nF to 10uF
1uF to 10uF
1uF to 10uF
≤ 10%
Insulation resistance after 1 minute at U (DC)
r
R
≥ 10 GΩ or R × C ≥ 500(50)* seconds whichever is less
ins
ins
r
Maximum capacitance change as a function of temperature
Operating temperature range:
±15%
–55 °C to +85 °C
NOTE
* For individual I.R specification, please contact local sales.
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Jan. 12, 2017 V.23
Product specification
9
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
Fig. 3 Typical capacitance change as a function of
temperature
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Jan. 12, 2017 V.23
Product specification
10
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
Size 0201 10 nF / 16 V
Solid lines: Impedance / Dotted lines: ESR
Fig. 4 Impedance ESR vs. frequency characteristics for multilayer chip capacitors
Size 0603 1 µF / 10 V
Solid lines: Impedance / Dotted lines: ESR
Fig. 5 Impedance ESR vs. frequency characteristics for multilayer chip capacitors
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Jan. 12, 2017 V.23
Product specification
11
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
Size 0805 10 µF / 6.3 V
Solid lines: Impedance / Dotted lines: ESR
Fig. 6 Impedance ESR vs. frequency characteristics for multilayer chip capacitors
Size 1206 10 µF / 16 V
Solid lines: Impedance / Dotted lines: ESR
Fig. 7 Impedance ESR vs. frequency characteristics for multilayer chip capacitors
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Jan. 12, 2017 V.23
Product specification
12
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
Size 1210 10 µF / 25 V
Solid lines: Impedance / Dotted lines: ESR
Fig. 8 Impedance ESR vs. frequency characteristics for multilayer chip capacitors
SOLDERING RECOMMENDATION
Table 7
SIZE
0201
SOLDERING
METHOD
0402
> 100 nF
≤ 100 nF
0603
0805
1206
≥ 1210
Reflow
Reflow only
> 1µF
> 2.2 µF
> 2.2 µF
Reflow only
---
Reflow/Wave
≤ 1µF
≤ 2.2 µF
≤ 2.2 µF
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Jan. 12, 2017 V.23
Product specification
13
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
TESTS AND REQUIREMENTS
Table 8 Test procedures and requirements
TEST TEST METHOD PROCEDURE
REQUIREMENTS
Mounting
IEC 60384- 4.3
21/22
The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
Visual
4.4
Any applicable method using × 10 magnification
In accordance with specification
Within specified tolerance
Inspection and
Dimension
Check
Capacitance (1)
4.5.1 Class 2:
At 20 °C, 24 hrs after annealing
f = 1 KHz for C ≤ 10 µF, rated voltage > 6.3 V, measuring at
voltage 1 Vrms at 20 °C
f = 1 KHz, for C ≤ 10 µF, rated voltage ≤ 6.3 V, measuring at
voltage 0.5 Vrms at 20 °C
f = 120 Hz for C > 10 µF, measuring at voltage 0.5 Vrms at 20 °C
Dissipation
Factor (D.F.) (1)
4.5.2 Class 2:
In accordance with specification
At 20 °C, 24 hrs after annealing
f = 1 KHz for C ≤ 10 µF, rated voltage > 6.3 V, measuring at
voltage 1 Vrms at 20 °C
f = 1 KHz, for C ≤ 10 µF, rated voltage ≤ 6.3 V, measuring at
voltage 0.5 Vrms at 20 °C
f = 120 Hz for C > 10 µF, measuring at voltage 0.5 Vrms at 20 °C
At Ur (DC) for 1 minute
Insulation
Resistance
4.5.3
In accordance with specification
NOTE
1. The figure indicates typical inspection. Please refer to individual specifications.
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Jan. 12, 2017 V.23
Product specification
14
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
TEST
TEST METHOD PROCEDURE
REQUIREMENTS
<General purpose series>
Class1:
∆ C/C: ±30ppm
Temperature
Characteristic
4.6
Capacitance shall be measured by the steps shown in the
following table.
The capacitance change should be measured after 5 min at
each specified temperature stage.
Class2:
X7R: ∆ C/C: ±15%
Y5V: ∆ C/C: 22~-82%
Step
Temperature(℃)
25±2
a
b
c
<High Capacitance series>
Class2:
X7R/X5R: ∆ C/C: ±15%
Y5V: ∆ C/C: 22~-82%
Lower temperature±3℃
25±2
d
Upper Temperature± 2℃
25±2
e
(1) Class I
Temperature Coefficient shall be calculated from the
formula as below
C2 - C1
106
Temp, Coefficient =
[ppm/℃]
C1xΔT
C1: Capacitance at step c
C2: Capacitance at 125℃
∆T: 100℃(=125℃-25℃)
(2) Class II
Capacitance Change shall be calculated from the formula
as below
C2 - C1
∆C =
x 100%
C1
C1: Capacitance at step c
C2: Capacitance at step b or d
Adhesion
4.7
A force applied for 10 seconds to the line joining the
terminations and in a plane parallel to the substrate
Force
size ≥ 0603: 5N
size = 0402: 2.5N
size = 0201: 1N
Bending
Strength
IEC 60384- 4.8
21/22
Mounting in accordance with IEC 60384-22 paragraph 4.3
No visible damage
Conditions: bending 1 mm at a rate of 1 mm/s, radius jig
5 mm
∆C/C
Class2:
X5R: ±12.5%
Test Substrate:
b
YNSC147
4.5
Dimension(mm)
Type
0201
0402
0603
0805
1206
1210
a
b
c
0.3
0.4
1.0
1.2
2.2
2.2
0.9
1.5
3.0
4.0
5.0
5.0
0.3
C
a
40
0.5
1.2
100
1.65
1.65
2.0
Unit: mm
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Jan. 12, 2017 V.23
Product specification
15
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
TEST
TEST METHOD
4.9
PROCEDURE
REQUIREMENTS
Resistance to
Soldering
Heat
Precondition: 150 +0/–10 °C for 1 hour, then keep for
24 ±1 hours at room temperature
Dissolution of the end face plating shall
not exceed 25% of the length of the
edge concerned
Preheating: for size ≤ 1206: 120 °C to 150 °C for 1
minute
<General purpose series>
Preheating: for size >1206: 100 °C to 120 °C for 1
minute and 170 °C to 200 °C for 1 minute
∆C/C
Class2:
X5R: ±10%
Solder bath temperature: 260 ±5 °C
Dipping time: 10 ±0.5 seconds
Recovery time: 24 ±2 hours
<High Capacitance series>
∆C/C
Class2:
X5R: ±10%
D.F. within initial specified value
Rins within initial specified value
Solderability
4.10
Preheated the temperature of 80 °C to 140 °C and
maintained for 30 seconds to 60 seconds.
The solder should cover over 95% of
the critical area of each termination
1. Temperature: 235±5°C / Dipping time: 2 ±0.5 s
2. Temperature: 245±5°C / Dipping time: 3 ±0.5 s
(lead free)
Depth of immersion: 10mm
Rapid Change
of
Temperature
IEC 60384- 4.11
21/22
Preconditioning;
150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at
room temperature
No visual damage
<General purpose series>
∆C/C
5 cycles with following detail:
Class2:
30 minutes at lower category temperature
30 minutes at upper category temperature
X5R: ±15%
<High Capacitance series>
∆C/C
Recovery time 24 ±2 hours
Class2:
X5R: ±15%
D.F. meet initial specified value
Rins meet initial specified value
www.yageo.com
Jan. 12, 2017 V.23
Product specification
16
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
TEST
TEST METHOD
4.13
PROCEDURE
REQUIREMENTS
Damp Heat
with Ur Load
No visual damage after recovery
1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for 24 ±1 hour
at room temp
<General purpose series>
∆C/C
2. Initial measure:
Spec: refer to initial spec C, D, IR
Class2:
X5R: ±15%
3. Damp heat test:
500 ±12 hours at 40 ±2 °C;
90 to 95% R.H. 1.0 Ur applied
D.F.
Class2:
X5R: ≤ 16V: ≤ 7%
≥ 25V: ≤ 5%
Rins
4. Recovery:
Class 2: 24 ±2 hours
5. Final measure: C, D, IR
Class2:
X5R: ≥ 500 MΩ or Rins x Cr ≥ 25s
P.S. If the capacitance value is less than the minimum
value permitted, then after the other measurements
have been made the capacitor shall be preconditioned
according to “IEC 60384 4.1” and then the
requirements shall be met.
whichever is less
<High Capacitance series>
∆C/C
Class2:
X5R: ±20%
D.F.
Class2:
X5R: 2 x initial value max
Rins
Class2:
Rins x Cr ≥ 5s
whichever is less
www.yageo.com
Jan. 12, 2017 V.23
Product specification
17
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Endurance
IEC 60384- 4.14
21/22
No visual damage
1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for 24 ±1 hour at
room temp
<General purpose series>
∆C/C
2. Initial measure:
Spec: refer to initial spec C, D, IR
Class2:
X5R: ±15%
3. Endurance test:
Temperature: X5R: 85 °C
D.F.
Specified stress voltage applied for 1,000 hours:
Applied 2.0 x Ur for general product*.
Applied 1.5 x Ur for high cap. product*.
Applied 1.0 x Ur for high cap. product*.
Class2:
X5R: ≤ 16V: ≤ 7%
≥ 25V: ≤ 5%
Rins
0201: 100nF/25V, 220nF/10V,/ 1uF, 2.2uF/ 4V, 6.3V
0402: 4.7uF/16V, 10V, 6.3V; 10uF/4V, 6.3V
0603: 10uF/ 10V; 22uF/6.3V, 10V; 47uF/4V
0805: 10uF/ 25V, 50V; 22uF/ 6.3V, 10V, 16V
47uF/ 6.3V, 10V; 100uF/ 4V
Class2:
X5R: ≥ 1,000 MΩ or Rins x Cr ≥ 50s
whichever is less
<High Capacitance series>
∆C/C
1206: 10uF/ 50V;
Class 2:
4. Recovery time: 24 ±2 hours
X5R: ±20%
5. Final measure: C, D, IR
D.F.
Class 2:
P.S. If the capacitance value is less than the minimum
value permitted, then after the other measurements
have been made the capacitor shall be preconditioned
according to “IEC 60384 4.1” and then the requirements
shall be met.
X5R: 2 x initial value max
Rins
Class 2:
Rins x Cr ≥ 10s
whichever is less
* General product:
0201 ≤ 10nF
0402 ≤ 100nF
0603 ≤ 470nF
0805, 1206, 1210 ≤ 1uF
* High cap product:
0201 > 10nF
0402 > 100nF
0603 > 470nF
0805, 1206, 1210 > 1uF
Specified stress voltage applied for 1~5 seconds
Voltage
Proof
4.6
No breakdown or flashover
Ur ≤ 100 V: series applied 2.5 Ur
100 V < Ur ≤ 200 V series applied
(1.5 Ur + 100)
200 V < Ur ≤ 500 V series applied
(1.3 Ur + 100)
Ur > 500 V: 1.3 Ur
Ur ≧ 1000 V: 1.2 Ur
Charge/Discharge current is less than 50 mA
www.yageo.com
Jan. 12, 2017 V.23
Product specification
18
18
General Purpose & High Cap.
X5R
4 V to 50 V
Surface Mount Multilayer Ceramic Capacitors
REVISION HISTORY
REVISION DATE
CHANGE NOTIFICATION DESCRIPTION
Version 23 Nov. 15, 2016
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- Dimension updated
Version 22 Oct. 3, 2016
Version 21 Jan. 28, 2016
Version 20 Dec. 04, 2015
Version 19 Apr. 09, 2015
Version 18 Jul. 07, 2014
Version 17 Mar. 31, 2014
Version 16 Nov. 29, 2012
Version 15 Sep. 03, 2012
Version 14 May 16, 2012
Version 13 May 02, 2012
Version 12 Feb 10, 2012
Version 11 Oct 21, 2011
Version 10 Jun 21, 2011
- Dimension and Soldering recommendation updated
- Tests and requirements updated
- Size updated
- Voltage updated
- Voltage updated
- Test condition updated
- Test condition updated
- Test condition updated
- Product range updated
- Product range updated
- Product range updated
- Product range updated
- Product range updated
Version 9
Version 8
Version 7
Version 6
Version 5
Mar 23, 2011
Jan 25, 2011
Jan 05, 2011
Jul 27, 2010
Apr 21, 2010
- Product range updated
- Rated voltage of 0201 extend to 50V
- Product range updated
- Dimension on 0603 and 1206 case size updated
- The statement of "Halogen free" on the cover added
- Dimension updated
Version 4
Version 3
Version 2
Version 1
Version 0
Jan 13, 2010
Aug 17, 2009
Jun 09, 2009
May 15, 2009
Apr 15, 2009
-
-
-
-
-
- Thickness updated
- Dimension updated
- Ordering code updated
- Product range updated
- New datasheet for general purpose and high capacitance X5R series with
RoHS compliant
- Replace the "6.3V to 50V" part of pdf files: UP-X5R_X7R_HighCaps_6.3-
to-25V_11, UY-X5R_X7R_HighCaps_6.3-to-25V_11
- Combine 0201 from pdf files: UP-NP0X5RX7RY5V_0201_6.3-to-50V_2
and UY-NPOX5RX7RY5V_0201_6.3-to-50V_2
- Define global part number
- Description of "Halogen free compliant" added
www.yageo.com
Jan. 12, 2017 V.23
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