IP4100CY20-02S [YAGEO]
Terminator, 9-Line, PDSO20, 3.81 MM, PLASTIC, QSOP-20;
| 型号： | IP4100CY20-02S |
| 厂家： | 
YAGEO CORPORATION |
| 描述： | Terminator, 9-Line, PDSO20, 3.81 MM, PLASTIC, QSOP-20 光电二极管 接口集成电路 |
| 文件： | 总12页 (文件大小：275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ADVANCED CERAMICS AND MODULES
DATA SHEET
IP4100 series
9-channel IEEE 1284
filter/termination
with 2 kV ESD protection
Preliminary specification
1999 Jul 29
File under Advanced Ceramics and Modules, ACM4
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
FEATURES
QUICK REFERENCE DATA
• 9-channel RC filter array with pull-up resistors
• ESD protection: >2 kV
DESCRIPTION
Electrical characteristics at 25 °C
VALUE
• Undershoot protection
Resistance
±10%; see Table 1
• High capacitance range
Capacitance
±20%; see Table 1
• Available in 20-pin or 24-pin QSOP and 20-pin SOIC
packages.
Operating voltage, VCC
ESD protection
0 to +5.5 V
IEC 61000-4-2, level 1
(2 kV)
APPLICATIONS
Power rating per channel 100 mW, package limited
Package ratings
IEEE 1284 filter/termination for:
• Workstations
Maximum dissipation at:
• Desktop and portable computers
• PDAs
Tamb = 70 °C
1 W
Tamb = 85 °C
0.83 W
• PCMICA cards.
Operating temperature
Storage temperature
−25 to +85 °C
−60 to +150 °C
DESCRIPTION
The Philips IP4100 series of Application Specific
Integrated Products (ASIPs) is a 9-channel solution for
termination and filtering for high speed IEEE 1284 parallel
interfaces while also providing ESD protection of >2 kV.
IP4100 devices are fabricated using thin film-on-silicon
technology and integrates 18 resistors, 9 capacitors and
18 diodes in various package configurations.
The IP4100 is configured as low pass filters with high
impedance pull-ups. As filters, the IP4100 will pass low
frequency digital data and attenuate undesired high
frequency signals. As terminations, the IP4100 will reduce
reflections caused by transmission line effects of long
cable lines.
The integral diodes of the IP4100 provide ESD protection
of <2 kV. Furthermore, the diodes help maintain signal
integrity on digital transmission lines by reducing logic
undershoot conditions.
1999 Jul 29
2
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
handbook, halfpage
handbook, halfpage
20
1
2
24
23
R1
1
2
3
4
5
6
7
8
19
18
17
16
15
14
13
12
11
R2
R1
R2
3
22
21
20
19
18
17
16
15
14
R1
R2
R1
R2
4
R1
R2
R1
R2
5
R1
R2
R1
R2
6
R1
R2
R1
R2
7
R1
R2
R1
R2
8
R1
R2
R1
R2
9
R1
R2
R1
R2
10
R1
R2
9
R1
R2
11
12
10
CCB972
13
CCB973
Fig.1 Functional diagram for 20-pin packages.
Fig.2 Functional diagram for 24-pin packages.
1999 Jul 29
3
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
ORDERING INFORMATION
Ordering code
I P 4 1 0 0 C Y 2 0 − 0 1 S
Philips P/N series
Packaging
S
T
reel: 330 mm (13")
tube
Operating temperature range
(−25 to +85 °C)
(1)
Resistance/Capacitance code
Package type
Number of pins
(20 or 24)
(Y = QSOP; R = SOIC)
CCB974
(1) For R/C codes, see Table 1.
Table 1 Standard R/C values, ordering information and packaging quantities
RESISTANCE
CATALOGUE NUMBER
IP4100CY(R)20(24)-...
CAPACITANCE
VALUE
R/C
CODES
VALUE
(pF)
R1
R2
REEL 330 mm (13")
TUBE
55 units(1)
(kΩ)
(Ω)
1000 units
-01
-02
-03
4.7
2.2
1.0
33
33
33
180
220
180
01S
02S
03S
01T
02T
03T
Note
1. The QSOP package has a tube quantity of 56 units.
1999 Jul 29
4
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
PACKAGING
SOIC20 Package outline
D
E
detail A
c
H
E
11
20
A
A
1
pin 1 index
θ
L
detail A
1
10
e
b
CCB878
For dimensions see Table 2.
Fig.3 SOIC20 plastic shrink small outline package; 20 leads; wide body 7.39 mm.
Table 2 Package dimensions; see Fig.3
VALUE
DIMENSION
UNIT
MIN.
MAX.
A
A1
b
2.43
0.10
2.64
0.30
mm
mm
mm
mm
mm
mm
mm
mm
mm
deg
0.36
0.46
c
0.23
0.32
D
E
HE
e
12.65
7.39
12.85
7.60
10.06
10.52
1.27 NOM.
L
0.51
0
1.02
8
θ
1999 Jul 29
5
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
QSOP20 Package outline
D
E
detail A
c
H
E
11
20
A
A
1
pin 1 index
θ
L
detail A
1
10
e
b
CCB878
For dimensions see Table 3.
Fig.4 QSOP20 plastic shrink small outline package; 20 leads; narrow body width 3.81 mm.
Table 3 Package dimensions; see Fig.4
VALUE
DIMENSION
UNIT
MIN.
MAX.
A
A1
b
1.35
0.10
0.20
0.15
8.55
3.81
5.79
1.75
0.30
0.30
0.25
8.74
3.99
6.20
mm
mm
mm
mm
mm
mm
mm
mm
mm
deg
c
D
E
HE
e
0.635 NOM.
L
0.40
0
1.27
8
θ
1999 Jul 29
6
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
QSOP24 Package outline
D
E
detail A
c
H
E
24
13
A
A
1
pin 1 index
θ
L
detail A
1
12
CCB975
e
b
For dimensions see Table 4.
Fig.5 QSOP24 plastic shrink small outline package; 20 leads; narrow body width 3.81 mm.
Table 4 Package dimensions; see Fig.4
VALUE
DIMENSION
UNIT
MIN.
MAX.
A
A1
b
1.35
0.10
0.20
0.15
8.55
3.81
5.79
1.75
0.30
0.30
0.25
8.74
3.99
6.20
mm
mm
mm
mm
mm
mm
mm
mm
mm
deg
c
D
E
HE
e
0.635 NOM.
L
0.40
0
1.27
8
θ
1999 Jul 29
7
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
Blister tape specifications
K
K
0
A
pin 1 designator
0
T
1
G
B
D
1
W
0
1
W
θ
F
E
δ
δ
D
P
2
0
P
CCB884
T
(1)
P
0
direction of unreeling
K0: so chosen that the orientation of the component cannot change.
For dimensions see Table 5.
(1) Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole.
Fig.6 Blister tape.
1999 Jul 29
8
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
Table 5 Dimensions of blister tape; see Fig.6
DIMENSION
(mm)
TOLERANCE
(mm)
PARAMETER
QSOP20/24 PACKAGE
SOIC20 PACKAGE
A0 nominal clearance; note 1
6.5
9.0
10.9
13.3
3.0
±0.1
±0.1
±0.1
−
B0 nominal clearance; note 1
K0 minimum clearance; note 1
2.3
K
<2.4
>0.75
<15°
<0.3
16.0
1.75
7.5
<3.2
>0.75
<15°
<0.3
24.0
1.75
7.5
G
−
Θ
−
δ
−
W
±0.3
±0.1
±0.1
+0.1/−0.0
−
E
F
D0
1.5
1.5
D1 min
1.5
1.5
P0; note 2
4.0
4.0
±0.1
±0.1
±0.1
−
P
8.0
12.0
2.0
P2
T
2.0
<0.35
<0.1
<0.35
<0.1
T1
−
Notes
1. Typical displacement in pocket.
2. P0 pitch tolerance over any 10 pitches is ±0.2 mm.
1999 Jul 29
9
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
Reel specifications
t
W
O
U
E
C
B
A
trailer
leader
MEA942
fixing
tape
For dimensions see Table 6.
Minimum trailer length: 160 mm.
Minimum leader length: 390 mm.
Fig.7 Reel.
Table 6 Reel dimensions; see Fig.7
TAPE
WIDTH
(mm)
A NOM.
(mm)
t
W
(mm)
B
(mm)
C
(mm)
E MIN.
(mm)
U MIN.
(mm)
O
(mm)
16
24
330
330
3 +0.0/−1.5 16.4 +2.0/−0.0 101 ±1.5
3 +0.0/−1.5 24.4 +2.0/−0.0 101 ±1.5
13 +0.5/−0.2
13 +0.5/−0.2
1.5
1.5
3.6
3.6
120°
120°
1999 Jul 29
10
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
QUALITY AND RELIABILITY
Wafer fabrication and packaging technology
Philips ASIPs use well-proven semiconductor industry thin film-on-silicon fabrication and packaging technologies.
Wafers are processed in a clean room wafer fabrication environment with circuit elements defined using a
photolithography process. Metal disposition is performed by precision sputter process. Finished wafers are diced,
assembled and tested in a state-of-the-art assembly and packaging facility fully compliant with ISO 9002.
Tests and requirements
The following tests have been conducted on representative samples of Philips ASIPs in QSOP (SSOP), SOIC and similar
industry standard plastic packages in accordance with the appropriate IEC, EIA and EIAJ requirements.
Table 7 Test procedures and requirements
EIA/JESD22
TEST METHOD
TEST
PROCEDURE
REQUIREMENTS
B102-A
solderability
8 hours steam;
good tinning (≥95% covered);
(after ageing)
immersed for 5 s in a solder bath at 215 °C
no visible damage
A113-A
SMD sequential
stress
preconditioning;
device functional;
no visible damage;
SAT inspection
5 cycles: −55 to +125 °C; 24 hours bake;
temperature and humidity soak; 3 cycles of
IR convection reflow at maximum 220 °C
A104-A
A102-B
A101-B
A108-A
A108-A
temperature
cycling
1000 cycles:
10 minutes minimum at −65 °C
10 minutes minimum at +150 °C
no visible damage;
∆R/R max.: ±1%;
∆C/C max.: ±1%
autoclave
(pressure pot)
336 hours: 121 °C, 100% RH
no visible damage;
∆R/R max.: ±1%;
∆C/C max.: ±1%
temperature;
humidity; bias
1000 hours: 85 °C; 85% RH;
reverse voltage bias
no visible damage;
∆R/R max.: ±1%;
∆C/C max.: ±1%
high temperature
reverse bias
1000 hours: 125 °C;
reverse voltage bias
no visible damage;
∆R/R max.: ±1%;
∆C/C max.: ±1%
high temperature
operating life
1000 hours: 125 °C;
each channel with maximum power per spec. ∆R/R max.: ±1%;
∆C/C max.: ±1%
no visible damage;
1999 Jul 29
11
Philips Components
Preliminary specification
9-channel IEEE 1284 filter/termination
with 2 kV ESD protection
IP4100 series
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jul 29
12
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