ZNBG3001Q16 [ZETEX]
FET BIAS CONTROLLER; 场效应管偏置控制器
| 型号： | ZNBG3001Q16 |
| 厂家： | 
ZETEX SEMICONDUCTORS |
| 描述： | FET BIAS CONTROLLER |
| 文件： | 总9页 (文件大小：207K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FET BIAS CONTROLLER
ZNBG3000
ZNBG3001
ISSUE 1- AUGUST 1998
DEVICE DESCRIPTION
It is possible to use less than the devices full
complement of FET bias controls, unused
drain and gate connections can be left open
circuit without affecting operation of the
remaining bias circuits.
The ZNBG series of devices are designed to
meet the bias requirements of GaAs and
HEMT FETs commonly used in satellite
receiver LNBs, PMR, cellular telephones etc.
with a minimum of external components.
In order to protect the external FETs the
circuits have been designed to ensure that,
under any conditions including power
up/down transients, the gate drive from the
bias circuits cannot exceed the range -3.5V
to 0.7V. Furthermore if the negative rail
experiences a fault condition, such as
overload or short circuit, the drain supply to
the FETs will shut down avoiding excessive
current flow.
With the addition of two capacitors and a
resistor the devices provide drain voltage
and current control for 3 external grounded
source FETs, generating the regulated
negative rail required for FET gate biasing
whilst operating from a single supply. This
negative bias, at -3 volts, can also be used to
supply other external circuits.
The ZNBG3000/1 contains three bias stages.
A single resistor allows FET drain current to
be set to the desired level. The series also
offers the choice of drain voltage to be set
for the FETs, the ZNBG3000 gives 2.2 volts
drain whilst the ZNBG3001 gives 2 volts.
The ZNBG3000/1 are available in QSOP16
packages for the minimum in devices size.
Device operating temperature is -40 to 70°C
to suit a wide range of environmental
conditions.
These devices are unconditionally stable
over the full working temperature with the
FETs in place, subject to the inclusion of the
recommended gate and drain capacitors.
These ensure RF stability and minimal
injected noise.
FEATURES
APPLICATIONS
Provides bias for GaAs and HEMT FETs
Satellite receiver LNBs
•
•
Drives up to three FETs
Private mobile radio (PMR)
•
•
Dynamic FET protection
Cellular telephones
•
•
•
Drain current set by external resistor
Single in single out C Band LNB
•
Regulated negative rail generator
requires only 2 external capacitors
•
Choice in drain voltage
•
Wide supply voltage range
•
QSOP surface mount package
•
4-137
ZNBG3000
ZNBG3001
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
-0.6V to 15V
100mA
Power Dissipation (Tamb= 25°C)
QSOP16 500mW
Supply Current
Drain Current (per FET)
0 to 15mA
(set by RCAL1 and RCAL2
)
Output Current
100mA
Operating Temperature
Storage Temperature
-30 to 70°C
-40 to 85°C
ELECTRICAL CHARACTERISTICS TEST CONDITIONS (Unless otherwise stated):
= 25°C,V =5V,I =10mA (R =33kΩ)
T
amb
CC
D
CAL1
LIMITS
Typ
SYMBOL PARAMETER
CONDITIONS
UNITS
Min
5
Max
12
VCC
ICC
Supply Voltage
Supply Current
V
ID1 to ID3=0
ID1 to ID3=10mA
10
40
mA
mA
VSUB
Substrate Voltage
(Internally generated)
ISUB= 0
ISUB= -200µA
-3.5
-2.8
-2
-2
V
V
Output Noise
Drain Voltage
Gate Voltage
END
ENG
CG=4.7nF, CD=10nF
CG=4.7nF, CD=10nF
0.02
0.005
Vpkpk
Vpkpk
fO
Oscillator Freq.
200
330
10
800
kHz
DRAIN CHARACTERISTICS
IDO
ID
Output Current Range
Current
Set by RCAL1
0
8
15
12
mA
mA
Current Change
with VCC
VCC=5 to 12V
0.5
%/V
∆IDV
∆IDT
VD
with Tj
Tj=-30 to +70°C
0.05
%/°C
Voltage
ZNBG3000 ID1 to ID3=10mA
ZNBG3001
2
1.8
2.2
2
2.4
2.2
V
V
Voltage Change
with VCC
VCC= 5 to 12V
0.5
50
%/V
∆VDV
∆VDT
with Tj
Tj = -30 to +70°C
ppm
4-138
ZNBG3000
ZNBG3001
LIMITS
SYMBOL PARAMETER
CONDITIONS
UNITS
Min
-30
Typ
Max
2000
GATE CHARACTERISTICS
IGO
Output Current Range
Output Voltage
Output Low
µA
VOL
ID1 to ID3=12mA
IG1 to IG3=0
-3.5
-3.5
0.4
-2
-2
1
V
V
V
ID1 to ID3=12mA
I
G1 to IG3= -10µA
VOH
Output High
ID1 to ID3= 8mA
IG1 to IG3= 0
Notes:
1. The negative bias voltages specified are generated on-chip using an internal oscillator. Two external capacitors, CNB and CSUB, of
47nF are required for this purpose.
2. The characteristics are measured using an external reference resistors RCAL1 of value 33kΩ wired from pin RCAL1 to ground.
3. Noise voltage is not measured in production.
4. Noise voltage measurement is made with FETs and gate and drain capacitors in place on all
outputs. CG, 4.7nF, are connected between gate outputs and ground, CD, 10nF, are connected
between drain outputs and ground.
4-139
ZNBG3000
ZNBG3001
TYPICAL CHARACTERISTICS
16
14
12
10
8
Note:- Operation with loads > 200µA
is not guaranteed.
Vcc = 5V
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
Vcc = 5V
6V
8V
10V
6
4
2
0
0
10
20
30
40
50
0
0.2
0.4
0.6
0.8
1.0
Rcal (k)
External Vsub Load (mA)
JFET Drain Current v Rcal
Vsub v External Load
2.4
2.3
2.2
2.1
2.0
2.2
ZNBG3000
ZNBG3001
2.1
2.0
1.9
1.8
Vcc = 5V
6V
Vcc = 5V
6V
8V
10V
8V
10V
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
Drain Current (mA)
Drain Current (mA)
JFET Drain Voltage v Drain Current
JFET Drain Voltage v Drain Current
4-140
ZNBG3000
ZNBG3001
FUNCTIONAL DIAGRAM
FUNCTIONAL DESCRIPTION
The ZNBG devices provide all the bias requirements for external FETs, including the generation
of the negative supply required for gate biasing, from the single supply voltage.
The diagram above shows a single stage from the ZNBG series. The ZNBG3000/1 contains 3 such
stages.
The drain voltage of the external FET QN is set by the ZNBG device to its normal operating voltage.
This is determined by the on board VD Set reference, for the ZNBG3000 this is nominally 2.2 volts
whilst the ZNBG3001 provides nominally 2 volts.
The drain current taken by the FET is monitored by the low value resistor ID Sense. The amplifier
driving the gate of the FET adjusts the gate voltage of QN so that the drain current taken matches
the current called for by an external resistor RCAL. Both ZNBG devices have the facility to program
different drain currents into selected FETs.
Since the FET is a depletion mode transistor, it is usually necessary to drive its gate negative with
respect to ground to obtain the required drain current. To provide this capability powered from
a single positive supply, the device includes a low current negative supply generator. This
generator uses an internal oscillator and two external capacitors, CNB and CSUB
.
4-141
ZNBG3000
ZNBG3001
TYPICAL APPLICATION CIRCUIT
APPLICATIONS INFORMATION
The above is a partial application circuit for the ZNBG series showing all external components
required for appropriate biasing. The bias circuits are unconditionally stable over the full
temperature range with the associated FETs and gate and drain capacitors in circuit.
Capacitors CD and CG ensure that residual power supply and substrate generator noise is not
allowed to affect other external circuits which may be sensitive to RF interference. They also
serve to suppress any potential RF feedthrough between stages via the ZNBG device. These
capacitors are required for all stages used. Values of 10nF and 4.7nF respectively are
recommended however this is design dependent and any value between 1nF and 100nF could
be used.
The capacitors CNB and CSUB are an integral part of the ZNBGs negative supply generator. The
negative bias voltage is generated on-chip using an internal oscillator. The required value of
capacitors CNB and CSUB is 47nF. This generator produces a low current supply of approximately
-3 volts. Although this generator is intended purely to bias the external FETs, it can be used to
power other external circuits via the CSUB pin.
Resistor RCAL1 sets the drain current at which all external FETs are operated. If any bias control
circuit is not required, its related drain and gate connections may be left open circuit without
affecting the operation of the remaining bias circuits. If all FETs associated with a current setting
resistor are omitted, the particular RCAL should still be included. The supply current can be
reduced, if required, by using a high value RCAL resistor (e.g. 470k).
4-142
ZNBG3000
ZNBG3001
APPLICATIONS INFORMATION (Continued)
The ZNBG devices have been designed to protect the external FETs from adverse operating
conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit
can not exceed the range -3.5V to 0.7V, under any conditions including powerup and powerdown
transients. Should the negative bias generator be shorted or overloaded so that the drain current
of the external FETs can no longer be controlled, the drain supply to FETs is shut down to avoid
damage to the FETs by excessive drain current.
The following diagram show the ZNBG3000/1 in typical LNB applications.
Single in/Single out C band LNB block diagram
4-143
ZNBG3000
ZNBG3001
CONNECTION DIAGRAMS
ORDERING INFORMATION
Part Number
ZNBG3000Q16
ZNBG3001Q16
Package
QSOP16
QSOP16
Part Mark
ZNBG3000
ZNBG3001
PACKAGE DIMENSIONS
A
IDENTIFICATION
RECESS
FOR PIN 1
C
B
D
PIN No.1
K
PIN
Millimetres
Inches
E
F
3.81
1.35
0.10
5.79
0°
3.99
1.75
0.25
6.20
8°
0.15
0.053
0.004
0.228
0°
0.157
MIN
4.80
MAX
MIN
MAX
0.039
0.069
0.01
0.244
8°
A
B
C
D
4.90
0.033
G
J
0.635
0.177
0.20
0.025 NOM
0.267
0.30
0.007
0.008
0.011
0.012
K
Zetex plc.
Fields New Road, Chadderton, Oldham, OL9-8NP, United Kingdom.
Telephone: (44)161 622 4422 (Sales), (44)161 622 4444 (General Enquiries)
Fax: (44)161 622 4420
Zetex GmbH
Zetex Inc.
Zetex (Asia) Ltd.
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Germany
Telefon: (49) 89 45 49 49 0
Fax: (49) 89 45 49 49 49
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agents and distributors in
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Zetex plc 1998
Internet:http://www.zetex.com
This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied
or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or
services concerned. The Company reserves the right to alter without notice the specification, design, price or conditions of supply of
any product or service.
4-145
ZNBG4000 ZNBG4001
ZNBG6000 ZNBG6001
ZNBG3000
ZNBG3001
A
IDENTIFICATION
RECESS
PACKAGE DIMENSIONS
C
B
FOR PIN 1
D
PIN No.1
K
PIN
Millimetres
Inches
E
F
3.81
3.99
1.75
0.25
6.20
8°
0.15
0.053
0.004
0.228
0°
0.157
0.069
0.01
0.244
8°
MIN
4.80
MAX
MIN
MAX
0.039
1.35
0.10
5.79
0°
A
B
C
D
4.90
0.033
G
J
0.635
0.177
0.20
0.025 NOM
0.267
0.30
0.007
0.008
0.011
0.012
K
Page Number
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