ZXRD1000 [ZETEX]
HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS; 高效率SIMPLESYNC PWM DC- DC控制器型号: | ZXRD1000 |
厂家: | ZETEX SEMICONDUCTORS |
描述: | HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS |
文件: | 总28页 (文件大小:288K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ZXRD1000 SERIES
HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS
DESCRIPTION
ZXRD1000 series can be used with an all N channel
topology or a combination N & P channel topology.
Additional functionality includes shutdown control, a
u s e r a d ju s ta b le lo w b a tte ry fla g a n d s im p le
adjustment of the fixed PWM switching frequency.
The controller is available with fixed outputs of 5V or
3.3V and an adjustable (2.0 to 12V) output.
The ZXRD1000 series provides complete control and
protection functions for a high efficiency (> 95%) DC-DC
converter solution. The choice of external MOSFETs allow
the designer to size devices according to application. The
ZXRD1000 series uses advanced DC-DC converter
techniques to provide synchronous drive capability, using
innovative circuits that allow easy and cost effective
im plem entation of shoot through protection. The
FEATURES
•
•
Fixed 3.3, 5V and adjustable outputs
Programm able soft start
•
•
•
> 95% Efficiency
Fixed frequency (adjustable) PWM
APPLICATIONS
Voltage m ode to ensure excellent stability &
transient response
•
•
•
•
•
•
•
High efficiency 5 to 3.3V converters up to 4A
Sub-notebook com puters
Embedded processor power supply
Distributed power supply
Portable instrum ents
•
•
•
•
•
•
•
•
•
Low quiescent current in shutdown mode,15µA
Low battery flag
Output down to 2.0V
Overload protection
Dem onstration boards available
Synchronous or non-synchronous operation
Cost effective solution
Local on card conversion
GPS systems
N or P channel MOSFETs
QSOP16 package
Very high efficiency Sim pleSyncTM converter.
VCC
4.5-10V
D2
BAT54
IC1
R1
100k
13
VIN
ZXM64N02X
N1
C10
1µF
9
2
1
7
L1
15µH
SHDN
LBSET
LBF
VDRIVE
Bootstrap
RSENSE+
Shut Down
VOUT
3.3V 4A
RSENSE
0.01R
C11
1µF
C5
1µF
11
Low input flag
R6
Cx2
C6
10k
1µF
0.01µF
14
10
6
8
Delay
Decoup
VINT
RSENSE
-
C9
COUT
16
15
VFB
Com p
PWR
5
1µF
CT
Fx
x2
680µF
C8
RX
CX1
0.022µF
R2
120µF
2k7
GND GND
D1
680R
2.2µF
R5
6k
R4
10k
CIN
68µF
4
3
D3
BAT54
330pF
C1
C2
1µF
C4
ZHCS1000
N2
C7
22µF
1µF
1µF
C3
ZXM64N02X
R3
3k
ISSUE 4 - OCTOBER 2000
1
ZXRD1000 SERIES
ABSOLUTE MAXIMUM RATINGS
Input without bootstrap (P suffix) 20V
RSENSE+, RSENSE -
VIN
Input with bootstrap(N suffix)
10V
Power dissipation
Operating tem perature
Storage temperature
610mW (Note 4)
-40 to +85°C
-55 to +125°C
Bootstrap voltage
Shutdown pin
LBSET pin
20V
VIN
VIN
ELECTRICAL CHARACTERISTICS
TEST CONDITIONS (Unless otherw ise stated) T
=25°C
amb
Sym b o l
Pa ra m e t e r
Co n d it io n s
No Ou tp u t De vice
IN=5V,IFB=1m A
Min
Typ
Ma x
Un it
VIN(m in )
Min . Op e ra tin g Vo lta g e
Fe e d b a ck Vo lta g e
4.5
V
V
V
V
VFB
(No te 1)
V
1.215 1.24
1.213 1.24
1.215 1.24
1.265
1.267
1.265
4.5<VIN<18V
50µA<IFB<1m A,VIN=5V
TDRIVE
Ga te Ou tp u t Drive Ca p a b ility
CG=2200p F(No te 2)
CG=1000p F
60
35
n s
n s
VIN=4.5V to maximim
su p p ly (No te 3)
ICC
S u p p ly Cu rre n t
VIN=5V
16
15
20
m A
µA
S h u td o w n Cu rre n t
VS HDN = 0V;VIN=5V
50
fo s c
(No te 5)
Op e ra tin g fre q u e n cy ra n g e
Fre q u e n cy w ith tim in g ca p a cito r C3=1300p F
C3=330p F
50
300
kHz
50
200
fo s c(to l)
Os cilla to r To l.
%
±25
DC
Ma x Du ty Cycle
N Ch a n n e l
P Ch a n n e l
15
0
94
100
%
%
MAX
VRS ENS E
RS ENS E vo lta g e d iffe re n tia l
-40 to +85°C
-40 to +85°C
50
m V
V
VCMRS ENS E Common mode range of VRS ENS E
2
VIN
VIN
0.4
50
LBFS ET
LBFOUT
LBFHYS T
LBFS INK
VS HDN
Lo w Ba tte ry Fla g se t vo lta g e
Lo w Ba tte ry Fla g o u tp u t
1.5
V
Active Lo w
0.2
V
Lo w Ba tte ry Fla g Hys te re sis
Lo w Ba tte ry Fla g Sin k Cu rre n t
S h u td o w n Th re sh o ld Vo lta g e
10
20
m V
m A
-40 to +85°C
2
Lo w (o ff)
Hig h (o n )
0.25
V
V
1.5
IS HDN
S h u td o w n Pin S o u rce Cu rre n t
10
µA
Note 1. VFB has a different function between fixed and adjustable controller options.
Note 2. 2200pF is the maximum recomm ended gate capacitance.
Note 3. Maximum supply for P phase controllers is 18V,maximum supply for N phase controllers is 10V.
Note 4. See VIN derating graph in Typical Characteristics.
Note 5. The maximum frequency in this application is 300kHz. For higher frequency operation contact Zetex
Applications Departm ent.
2
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
TYPICAL CHARACTERISTICS
202
201
200
199
198
197
C3=330pF
VIN=5V
210
205
C3=330pF
200
195
190
4
4
4
6
6
6
8
8
8
10
12
14
14
14
16
18
20
20
20
-40
-20
0
20
40
60
80
100
100
100
VIN (V)
Tem perature (°C)
FOSC v VIN
FOSC v Tem perature
VOUT=3.3V
1.244
1.25
VIN=5V
VOUT=3.3V
1.245
1.242
1.24
1.24
1.238
1.235
1.236
1.23
10
12
16
18
-40
-20
0
20
40
60
80
VIN (V)
Tem perature (°C)
VFB v VIN
VFB v Tem perature
1.02
1.01
1.00
0.99
VIN=5V
1.005
1.000
0.995
10
12
16
18
-40
-20
0
20
40
60
80
VIN (V)
Tem perature (°C)
Norm alised LBSET v VIN
Norm alised LBSET v Tem perature
ISSUE 4 - OCTOBER 2000
3
ZXRD1000 SERIES
TYPICAL CHARACTERISTICS
30
25
30
25
20
15
20
15
10
10
4
6
8
10
12
14
16
18
20
10nF
100
4
6
8
10
12
14
16
18
20
VIN (V)
VIN (V)
Supply Current v V
IN
Supply Current v VIN
N Phase Device
P Phase Device
5
4
3
2
1
0
Vin=5V
300
200
100
0
VIN=5V
VOUT=3.3V
100pF
1nF
0
10
20
30
40
50
Tim ing Capacitance
RSENSE (m ⍀)
FOSC v Capacitance
Current Lim it v RSENSE
CG=2200pF
20
15
10
5
-40
-20
0
20
40
60
80
Tem perature (°C)
VIN Derating v Tem perature
4
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
DETAILED DESCRIPTION
The ZXRD1000 series can be configured to use either
N or P channel MOSFETs to suit most applications.
Th e m o s t p o p u la r fo rm a t , a n a ll N ch a n n e l
synchronous solution gives the optimum efficiency. A
feature of the ZXRD1000 series solution is the unique
m ethod of generating the synchronous drive, called
Sim pleSync . Most solutions use an additional
output from the controller, inverted and delayed from
the main switch drive. The ZXRD1000 series solution
uses a simple overwinding on the m ain choke (wound
on the same core at no real cost penalty) plus a small
ferrite bead . This means that the synchronous FET is
only enhanced when the main FET is turned off. This
reduces the ‘blanking period’ required for shoot-
through protection, increasing efficiency and allowing
sm aller catch diodes to be used, m aking the controller
simpler and less costly by avoiding complex tim ing
circuitry. Included on chip are num erous functions that
allow flexibility to suit most applications. The nom inal
switching frequency (200kHz) can be adjusted by a
simple timing capacitor, C3. A low battery detect circuit
is also provided. Off the shelf components are available
from major manufacturers such as Sumida to provide
either a single winding inductor for non-synchronous
a p plica tions or a coil with a n ove r-winding for
synchronous applications. The combination of these
switching characteristics, innovative circuit design and
excellent user flexibility, make the ZXRD1000 series
DC-DC solutions some of the smallest and most cost
effective and electrically efficient currently available.
Using Zetex’s HDMOS low RDS(on) devices, ZXM64N02X
for the main and synchronous switch, efficiency can
peak at upto 95% and remains high over a wide range
of operating currents. Programmable soft start can also be
adjusted via the capacitor, C7, in the compensation loop.
system s this can not only damage MOSFETs, but also
the battery itself. To realise correct ‘dead tim e’
implem entation takes com plex circuitry and hence
implies additional cost.
The ZETEX Method
Zetex has taken a different approach to solving these
problems. By looking at the basic architecture of a
synchronous converter, a novel approach using the
m ain circuit inductor was developed. By taking the
inverse waveform found at the input to the main
in d u c t o r o f a n o n -s y n c h r o n o u s s o lu t io n , a
synchronous drive waveform can be generated that is
always relative to the m ain drive waveform and
inverted with a sm all delay. This waveform can be
used to drive the synchronous switch which m eans no
complex circuitry in the IC need be used to allow for
shoot-through protection.
Implem entation
Implem entation was very easy and low cost. It simply
m eant peeling off a strand of the m ain inductor
winding and isolating it to form a coupled secondary
winding. These are available as standard item s
referred to in the applications circuits parts list.The use
of a small, surface mount, inexpensive ’square loop’
fe rrite b e a d p ro vid e s a n e xce lle n t m e th o d o f
elim inating shoot-through due to variation in gate
thresholds. The bead essentially acts as a high
im p e d a n c e fo r t h e fe w n a n o s e c o n d s t h a t
shoot-through would normally occur. It saturates very
quickly as the MOSFETs attain steady state operation,
reducing the bead impedance to virtually zero.
Benefits
The net result is an innovative solution that gives
a d d it io n a l b e n e fit s w h ils t lo w e r in g o v e ra ll
implem entation costs. It is also a technique that can
b e sim ply om itte d to m a ke a non-synchronous
controller, saving further cost, at the expense of a few
efficiency points.
TM
What is Sim pleSync
?
Conventional Methods
In the conventional approach to the synchronous
DC-DC solution, much care has to be taken with the
timing constraints between the m ain and synchronous
switching devices. Not only is this dependent upon
individual MOSFET gate thresholds (which vary from
device to device within data sheet lim its and over
tem perature), but it is also som ewhat dependent upon
m agnetics, layout and other parasitics. This normally
m eans that significant ‘dead tim e’ has to be factored
in to the design between the m ain and synchronous
d e vice s b e in g tu rn e d o ff a n d o n re s p e ctive ly.
Incorrect application of dead time constraints can
potentially lead to catastrophic short circuit conditions
between VIN and GND. For some battery operated
ISSUE 4 - OCTOBER 2000
5
ZXRD1000 SERIES
Functional Block Diagram
PIN DES CRIPTIONS
‡ S e e re le va n t Ap p lica tio n s Se ctio n
Pin No .
Na m e
De s crip tio n
1
Bo o tstra p Bo o ts tra p circu it fo r g e n e ra tin g g a te d rive
2
VDRIVE
PWRGND
GND
Ou tp u t to th e g a te d rive circu it fo r m a in N/P ch a n n e l s w itch e s
Po w e r g ro u n d
3
4
S ig n a l g ro u n d
5
CT
Tim in g Ca p a cito r se ts o scilla to r fre q u e n cy. ‡
In te rn a l Bia s Circu it. De co u p le w ith 1µF ce ra m ic ca p a cito r
Hig h e r p o te n tia l in p u t to th e cu rre n t se n se fo r cu rre n t lim it circu it
Lo w e r p o te n tia l in p u t to th e cu rre n t se n se fo r cu rre n t lim it circu it
S h u td o w n co n tro l. Active lo w .
6
VINT
7
RS ENS E+
RS ENS E-
SHDN
De co u p
LBF
8
9
10
11
12
Optional short circuit and overload decoupling capacitor for increased accuracy
Lo w b a tte ry fla g o u tp u t. Active lo w , o p e n co lle cto r o u tp u t
LBS ET
Lo w b a tte ry fla g s e t. Ca n b e co n n e cte d to VIN if u n u s e d , o r th re s h o ld se t
via p o te n tia l d ivid e r. ‡
13
14
15
16
VIN
In p u t Vo lta g e
De la y
Co m p
VFB
Exte rn a l R a n d C to s e t th e d e s ire d cycle tim e fo r h iccu p circu it. ‡
Co m p e n s a tio n p in to a llo w fo r s ta b ility co m p o n e n ts a n d s o ft sta rt. ‡
Fe e d b a ck Vo lta g e . Th is p in h a s a d iffe re n t fu n ctio n b e tw e e n fixe d a n d
a d ju sta b le co n tro lle r o p tio n s. Th e a p p ro p ria te co n tro lle r m u s t b e u se d fo r
th e fixe d o r a d ju s ta b le s o lu tio n . Co n n e ct to VOUT fo r fixe d o u tp u t, o r to
p o te n tia l d ivid e r fo r a d ju s ta b le o u tp u t. ‡
6
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Input Capacitors
Applications
Note: Com ponent nam es refer to designators shown
in the application circuit diagram s.
The input capacitor is chosen for its RMS current and
voltage rating. The use of low ESR electrolytic or
tantalum capa citors is recom m ended. Tantalum
capacitors should have their voltage rating at 2VIN
(m a x), e le ctro lytic a t 1.4VIN(m a x). IRMS c a n b e
approximated by:
Output Capacitors
Output capacitors are a critical choice in the overall
perform ance of the solution. They are required to filter
the output and supply load transient current. They are
also affected by the switching frequency, ripple
current, di/dt and magnitude of transient load current.
ESR plays a key role in determ ining the value of
capacitor to be used. Com bination of both high
frequency, low value ceram ic capacitors and low ESR
bulk storage ca pacitors optim ised for switching
a p plica tion s provide th e be st response to loa d
transients a nd ripple requirem ents. Electrolytic
ca p a cito rs w ith lo w ES R a re la rg e r a n d m o re
e xp e n s ive s o th e u ltim a te ch o ice is a lw a ys a
com prom ise between size, cost and performance.
Care m ust also be taken to ensure that for large
capacitors, the ESL of the leads does not becom e an
issue. Excellent low ESR tantalum or electrolytic
capacitors are available from Sanyo OS-CON, AVX,
Sprague and Nichicon.
√(VOUT(VIN−VOUT) )
IRMS = IOUT
VIN
Underspecification of this parameter can affect long
term reliability. An additonal ceramic capacitor should
be used to provide high frequency decoupling at VIN.
Also note that the input capacitance ESR is effectively in
series with the input and hence contributes to efficiency
losses related to IRMS2 * ESR of the input capacitor.
MOSFET Selection
The ZXRD1000 family can be configured in circuits
where either N or P channel MOSFETs are employed
as the main switch. If an N channel device is used, the
corresponding N phase controller m ust be chosen.
Sim ilarly, for P channel m ain switch a P phase
controller m ust be used. The ordering information has
a clear identifier to distinguish between N and P phase
controllers.
The output capacitor will also affect loop stability,
transient perform ance. The capacitor ESR should
preferably be of a sim ilar value to the sense resistor.
Parallel devices may be required.
The MOSFET selection is subject to thermal and gate
drive considerations. Care also has to be taken to allow
for transition losses at high input voltages as well as
RDS(ON) lo s s e s fo r t h e m a in MO S FET. It is
recom m ended that a device with a drain source
breakdown of at least 1.2 tim es the m axim um VIN
should be used.
0.29 VOUT (VIN−VOUT
)
IRIPPLE(RMS)
=
L f VIN
where L= output filter inductance
f= switching frequency
For output voltage ripple it is necessary to know the
peak ripple current which is given by:
For optim um efficiency , two N channel low RDS(on)
devices are required. MOSFETs should be selected
with the lowest RDS(ON) consistent with the output
current required. As a guide, for 3-4A output, <50mΩ
devices would be optim um , provided the devices are
low gate threshold and low gate charge. Typically look
for devices that will be fully enhanced with 2.7V VGS
for 4-5A capability.
VOUT( VIN−VOUT)
Ipk−pk
=
L f VIN
Voltage ripple is then:-
RIPPLE = Ipk ESR
V
−
pk
Zetex offers a range of low RDS(ON)logic level MOSFETs
which are specifically designed with DC-DC power
conve rsion in m ind. Packaging includes SOT23,
SOT23-6 and MSOP8 options. Ideal exam ples of
optimum devices would be Zetex ZXM64N03X and
ZXM64N02X (N channel). Contact your local Zetex office
or Zetex web page for further information.
ISSUE 4 - OCTOBER 2000
7
ZXRD1000 SERIES
Applications (continued)
Inductor Selection
The inductor is one of the m ost critical components in
the DC-DC circuit.There are num erous types of devices
available from many suppliers. Zetex has opted to
specify off the shelf encapsulated surface m ount
components, as these represent the best com prom ise
in term s of cost, size, performance and shielding.
conditions, when VIN is at its highest and VOUT is
lowest (short circuit conditions for exam ple). Under
these conditions the device must handle peak current
at close to 100% duty cycle.
Frequency Adjustm ent
The nominal running frequency of the controller is set
to 200kHz in the applications shown. This can be
adjusted over the range 50kHz to 300kHz by changing
the value of capacitor on the CT pin. A low cost
ceramic capacitor can be used.
Frequency = 60000/C3 (pF)
Frequency v tem perature is given in the typical
characteristics.
The Sim pleSyncTM technique uses a main inductor
with an overwinding for the gate drive which is
available as a standard part. However, for engineers
who wish to design their own custom m agnetics, this
is a relatively sim ple and low cost construction
technique. It is sim ply form ed by term inating one of
the m ultiple strands of litz type wire separately. It is
still wound on the same core as the m ain winding and
only has to handle enough current to charge the gate
of the synchronous MOSFET. The m ajor benefit is
circuit sim plification and hence lower cost ofthe control
IC. For non-synchronous operation, the overwinding is
not required.
Output Voltage Adjustm ent
The ZXRD1000 is available as either a fixed 5V, 3.3V or
adjustable output. On fixed output versions, the VFB pin
should be connected to the output. Adjustable operation
requires a resistive divider connected as follows:
The choice of core type also plays a key role. For
optimum perform ance, a ’swinging choke’ is often
preferred. This is one which exhibits an increase in
inductance as load current decreases. This has the net
effect of reducing circulating current at lighter load
im p ro vin g e fficie n cy. Th e re is no rm a lly a cost
prem ium for this added benefit. For this reason the
ch o ke s s p e cifie d a re th e m o re u s u a l co n s ta n t
inductance type.
Peak current of the inductor should be rated to
m inim um 1.2IOUT (m ax) . To maximise efficiency, the
winding resistance of the m ain inductor should be less
than the main switch output on resistance.
The value of the output voltage is determ ined by the
equation
Schottky Diode
RA
RB
Selection depends on whether a synchronous or
n o n -s yn ch ro n o u s a p p ro a ch is ta ke n . Fo r th e
ZXRD1000, the unique approach to the synchronous
drive m eans minimal dead tim e and hence a small
SOT23 1A DC rated device will suffice, such as the
ZHCS1000 from Zetex. The device is only designed to
prevent the body diode of the synchronous MOSFET
from conducting during the initial switching transient
until the MOSFET takes over. The device should be
connected as close as possible to the source term inals
of the m ain MOSFET.
VOUT = VFB 1 +
V
FB
=1.24V
(
)
Note: The adjustable circuit is show n in the follow ing
transient optimisation section. It is also used in the
evaluation PCB. In both these circuits RA is assigned
the label R6 and RB the label R5.
Values of resistor should be between 1k and 20k to
guarantee operation. Output voltage can be adjusted in
the range 2V to 12V for non-synchronous applications.
For synchronous applications, the m inim um VOUT is set
by the VGS threshold required for the synchronous
MOS FET, a s t h e s w in g in t h e g a t e u s in g t h e
For non-synchronous applications , the Schottky diode
m u s t b e s e le cte d to a llo w fo r th e w o rs t ca s e
Sim pleSyncTM technique is approxim ately VOUT
.
8
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Applications (continued)
Low Battery Flag
Hiccup Tim e Constant
The low battery flag threshold can be set by the user
to trip at a level determined by the equation:
The hiccup circuit (at the ’delay’ pin) provides overload
protection for the solution. The threshold of the hiccup
m ode is determ ined by the value of RSENSE, When
>50mV is developed across the sense resistor, the
hiccup circuit is triggered, inhibiting the device.
RC
VLBSET = 1.25 1 +
(
)
RD
RD is recomm ended to be 10k where RC and RD are
connected as follows:
It will stay in this state depending upon the tim e
constant of the resistor and capacitor connected at the
’delay’ pin. In order to keep the dissipation down
under overload conditions it is recom mended the
circuit be off for approximately 100m s. If for other
application reasons this is too long an off period, this
can be reduced at least by 10:1, care needs to be taken
that any increased dissipation in the external MOSFET
is still acceptable. The resistor capacitor combination
R1,C1 recom m ended in the applications circuits
provides a delay of 100m s.
Soft Start & Loop Stability
Soft start is determ ined by the tim e constant of the
capacitor and resistor C7 and R3. Typically a good
starting point is C7 = 22µF and R3 = 24k for fixed
voltage variants. For fully adjustable variants see
Optim isin g fo r Tra n sie n t Re sponse la te r in the
applications section. This network also helps provide
good loop stability.
Hysteresis is typically 20m V at the LBSET pin.
Current Lim it
A current lim it is set by the low value resistor in the
output path, RSENSE. Since the resistor is only used for
overload current limit, it does not need to be accurate
and can hence be a low cost device.
Low Quiescent Shutdow n
Shutdown control is provided via the SHDN pin,
putting the device in to a low quiescent sleep m ode.
In som e circumstances where rapid sequencing of VCC
can occur (when VCC is turned off and back on) and VCC
has a very rapid rise tim e (100-200m s) timing conflicts
can occur.
The value of the current limit is set by using the
equation:
50(m V)
ILIM (A) =
R
(mΩ)
SENSE
A graph of Current Lim it v RSENSE is shown in the
typical characteristics. This should assist in the
selection of RSENSE appropriate to application.
If desired, RSENSE can also be on the input supply side.
When used on the input side RSENSE should be in series
with the upper output device (i.e. in series with the
d ra in o r s o u rce in N a n d P ch a n n e l s o lu tio n s
respectively).Typically in this configuration RSENSE will
be 20m ⍀.
ISSUE 4 - OCTOBER 2000
9
ZXRD1000 SERIES
Optim ising for Transient Response.
Layout Issues
Transient response is im portant in applications where
the load current increases and decreases rapidly. To
optim ise the system for good transient response
certain criteria have to be observed.
Layout is critical for the circuit to function in the m ost
efficient m anner in term s of electrical efficiency,
therm al considerations and noise. The following
guidelines should be observed:
The optim um solution using the ZXRD series uses the
adjustable N phase controller in synchronous m ode as
represented in the diagram opposite. The external
networks for this solution require the use of the
adjustable controller option.
A 2.2µF (C8) decoupling capacitor should be as close
as possible to the drive MOSFETs and D1 anode. This
capacitor is effectively connected across VIN and GND
but should be as close as possible to the appropriate
co m p o n e n ts in e ith e r N o r P, syn ch ro n o u s o r
non-synchronous configurations. Furtherm ore the
GND connection of the synchronous MOSFET/D1 and
output capacitors should be close together and use
either a ground plane or at the very least a low
inductance PCB track.
By using standard ’bulk’ capacitors in parallel with a
single OS-CON capacitor significant perform ance
versus cost advantage can be given in this application.
The low ESR of the OS-CON capacitor provides
competitive output voltage ripple at low capacitance
values. The ’bulk’ capacitors aid transient response.
However, the low ESR of the OS-CON capacitor can
cause instability within the system . To m aintain
s ta b ility a n RC n e tw o rk (RX, Cx1 ) h a s t o b e
implem ented. Furthermore, a capacitor in parallel with
R6 (Cx2) is required to optimise transient response. To
do this the appropriate adjustable ZXRD must be used
because the input to the internal error am plifier (pin
16) has to be accessed. The adjustable device differs
from fixed controller versions in this respect. This
combined with a frequency com pensation adjustm ent
gives an optim ised solution for excellent transient
response.
For the standard application circuits, a Gerber file can
be m ade available for the layout which uses the
m aterials as listed in the bill of materials table for the
reference designs.
Reference Designs.
In the following section reference circuits are shown for
t h e ZXRD s e rie s in b o th s yn c h ro n o u s a n d
non-synchronous modes. These are shown for each of
the N and P phase controllers. In each case efficiency
graphs are shown for the appropriate configuration
using 3.3V and 5V ZXRD devices. The BOM is then
shown for the design. Additional and alternative
com ponents are shown with a ’*’. These refer to
modifications to the design to optimise for transient
response. Optimisation is reached using the adjustable
version of either N or P phase controller device.
10
ISSUE 4 - OCTOBER 2000
VCC
4.5-10V
D2
BAT54
IC1
R1
100k
13
ZXM64N02X
VIN
N1
C10
1µF
9
2
1
7
L1
15µH
SHDN
LBSET
LBF
VDRIVE
Shut Down
VOUT
3.3V 4A
RSENSE
0.01R
C11
1µF
C5
Bootstrap
RSENSE+
1µF
11
Low input flag
R6
Cx2
C6
10k
1µF
0.01µF
14
10
6
8
Delay
Decoup
VINT
RSENSE -
C9
COUT
16
15
VFB
Com p
PWR
5
1µF
CT
Fx
x2
680µF
C8
RX
CX1
0.022µF
R2
120µF
2k7
GND GND
D1
2.2µF
680R
R5
6k
R4
10k
CIN
68µF
4
3
D3
BAT54
330pF
C1
C2
1µF
1µF
C4
ZHCS1000
N2
C7
22µF
1µF
C3
ZXM64N02X
R3
3k
TM
Optimised Transient Response, 4.5V-10V Input, 3V/4A Output, N Phase Adjustable, SimpleSync converter 200kHz.
ZXRD1000 SERIES
TM
4.5V -10VInput, 3.3V/ 4A Output, N Phase, High Efficiency Sim pleSync
200kHz
Converter
VCC
4.5-10V
D2
13
R1
IC1
9
V
N1
IN
C10
2
1
7
SHDN
LBSET
LBF
VDRIVE
Shut Down
L1
VOUT
3.3V 4A
RSENSE
C11
Bootstrap
RSENSE+
C5
11
Low input flag
C6
14
10
6
8
Delay
Decoup
V
RSENSE
-
16
15
VF
Com p
PWR
GND
B
CTINT
5
C9
Fx
R2
D1
C8
GND
4
N2
CIN
R4
D3
3
COUT
C1
C2 C3
C4
C7
R3
ZXRD1033NQ16
100
V
=7V
IN
95
90
85
80
75
70
65
60
55
50
V
IN
=10V
Efficiency v IOUT
VOUT=5.0V.
ZXRD1050NQ16
0.1
1
10
I
(A)
OUT
12
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Re f
IC1
N1
VIN>7V
VIN<7V
N2
Va lu e
Pa rt Nu m b e r
Ma n u fa ct u re r
Ze te x
Co m m e n t s
ZXRD1033NQ16
QS OP16 Co n tro lle r IC
Ze te x
MS OP8 Lo w RDS (ON)
ZXM64N03X
ZXM64N02X
ZXM64N02X
N
MOS FET
30V VDS
20V VDS
20V VDS
D1
1A 0.5V VF
10m A 0.4V VF
10m A 0.4V VF
100k
ZHCS 1000
Ze te x
S OT23 Sch o ttky Dio d e 1A
S OT23 Sch o ttky Dio d e
S OT23 Sch o ttky Dio d e
0805 S ize
D2
BAT54
Ze te x
D3
BAT54
Ze te x
R1
WCR0805-100k
WCR0805-680
WCR0805-24k
WCR0805-3k
WCR0805-10k
WCR0805-2.7k
LR1206R010
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
R2
680⍀
0805 S ize
R3
24k
0805 S ize
*R3
R4
3k
0805 S ize
10k
0805 S ize
*Rx
RS ENS E
2.7K
0805 S ize
0.01⍀
Current Lim it Sense Resistor
CIN
OR
OR
68F
68F
68F
TPSD68M016R0150 AVX
68F 16V ’E’ lo w ESR
68F 20V PTH lo w ES R
68F 20V SMT lo w ES R
20SA68M
20SV68M
S a n yo OS-CON
S a n yo OS-CON
COUT
OR
470F
*150F
*120F
TPSE477M010R0200 AVX
470F 10V ’E’ lo w ES R
150F 6V PTH lo w ES R
120f 6V SMT lo w ES R
6SA150M
6SV120M
S a n yo OS-CON
OR
S a n yo OS-CON
COUT
C1
680F x 2
1F
6CV680GX
S a n yo
680F 6V SMT Bulk Capacitor
1µF,10V.X7R Die le ctric
1µF,4V.X7R Die le ctric
330p F,4V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,4V.X7R Die le ctric
22µF,4V.X7R Die le ctric
2.2µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
0.022µF,4V.X7R Die le ctric
10n F,10V.X7R Die le ctric
Lo w Pro file SMT
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
S u m id a S MT
C2
1F
C3
330p F
1F
C4
C5
1F
C6
1F
C7
22F
2.2F
1F
C8
C9
C10
C11
*Cx1
*Cx2
1F
1F
0.022F
10n F
L1
OR
15H
10H
CDRH127B-OWZ9
6001
C&D Te ch n o lo g ie s Lo w Pro file SMT
(NCL)
Fx
2785044447
Fa irRite
S MT Fe rrite Be a d
* see Optimising for Transient Response Section
ISSUE 4 - OCTOBER 2000
13
ZXRD1000 SERIES
4.5V -10VInput, 3.3V/ 4A Output, N Phase, High Efficiency Non-Synchronous Step
Dow n Converter 200kHz
VCC
4.5-10.0V
IC1
13
C8
R1
D2
V
N1
IN
C10
9
2
1
7
SHDN
LBSET
LBF
VDRIVE
Shut Down
VOUT
3.3V 4A
L1
RSENSE
C11
Bootstrap
RSENSE+
C5
11
Low input flag
C6
14
10
6
8
B 16
15
Delay
Decoup
V
RSENSE
-
VF
CTINT
C9
5
Com p
PWR
CIN
GND
4
GND
R2
D1
3
COUT
C1
C4
R4
D3
C7
C2
C3
R3
100
95
90
85
80
75
70
65
60
55
50
V
=5V
IN
V
=10V
IN
Efficiency v IOUT
VOUT=3.3V.
ZXRD1033NQ16
0.1
1
10
I
(A)
OUT
100
V
=7V
IN
95
90
85
80
75
70
65
60
55
50
V
=10V
IN
Efficiency v IOUT
VOUT=5V.
ZXRD1050NQ16
0.1
1
10
I
(A)
OUT
ISSUE 4 - OCTOBER 2000
14
ZXRD1000 SERIES
Re f
IC1
N1
VIN>7V
VIN<7V
Va lu e
Pa rt Nu m b e r
Ma n u fa ct u re r
Ze te x
Co m m e n t s
ZXRD1033NQ16
QS OP16 Co n tro lle r IC
Ze te x
MS OP8 Lo w RDS (ON)
ZXM64N03X
ZXM64N02X
N
MOS FET
30V VDS
20V VDS
D1
5A 0.5V VF
10m A 0.4V VF
10m A 0.4V VF
100k
50WQ04FN
BAT54
Ze te x
S ch o ttky Dio d e 5A
S OT23 Sch o ttky Dio d e
S OT23 Sch o ttky Dio d e
0805 S ize
D2
Ze te x
D3
BAT54
Ze te x
R1
WCR0805-100k
WCR0805-680
WCR0805-24k
WCR0805-3k
WCR0805-10k
WCR0805-2.7k
LR1206R010
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
R2
680⍀
0805 S ize
R3
24k
0805 S ize
*R3
R4
3k
0805 S ize
10k
0805 S ize
*Rx
RS ENS E
2.7K
0805 S ize
0.01⍀
Current Lim it Sense Resistor
CIN
OR
OR
68F
68F
68F
TPSC68M02R0150
20SA68M
20SV68M
AVX
S a n yo OS-CON
S a n yo OS-CON
68F 25V ’E’ lo w ESR
68F 20V PTH lo w ES R
68F 20V SMT lo w ES R
COUT
OR
470F
*150F
*120F
TPSE477M010R0200 AVX
470F 10V ’E’ lo w ES R
150F 6V PTH lo w ES R
120f 6V SMT lo w ES R
6SA150M
6SV120M
S a n yo OS-CON
OR
S a n yo OS-CON
COUT
C1
680F x 2
1F
6CV680GX
S a n yo
680F 6V SMT Bulk Capacitor
1µF,10V.X7R Die le ctric
1µF,4V.X7R Die le ctric
330p F,4V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,4V.X7R Die le ctric
22µF,4V.X7R Die le ctric
2.2µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
1µF,10V.X7R Die le ctric
0.022µF,4V.X7R Die le ctric
10n F,10V.X7R Die le ctric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
C2
1F
C3
330p F
1F
C4
C5
1F
C6
1F
C7
22F
2.2F
1F
C8
C9
C10
C11
*Cx1
*Cx2
1F
1F
0.022F
10n F
L1
OR
15H
15H
CDRH127-150MC
DP5022P-153
S u m id a
Co ilcra ft
Lo w Pro file SMT
Lo w Pro file SMT
* see Optimising for Transient Response Section
ISSUE 4 - OCTOBER 2000
15
ZXRD1000 SERIES
TM
5V -18V Input, 5V/ 3A Output, P Phase, High Efficiency Sim pleSync
Converter 200kHz
VCC
5V-18V
IC1
13
R1
V
IN
P1
9
2
1
7
Shut Down
SHDN
LBSET
LBF
VDRIVE
Bootstrap
RSENSE+
VOUT
5.0V 3A
L1
RSENSE
C5
11
Low input flag
D1
C6
14
10
6
8
Delay
Decoup
V
RSENSE
-
Fx
16
15
VF
Com p
PWR
GND
B
CTINT
5
C9
N1
C8
R2
CIN
GND
4
3
COUT
C1
C2 C3 C4
C7
R3
100
95
90
85
80
75
70
65
60
55
50
V
=5V
IN
V
=12V
IN
Efficiency v IOUT
VOUT=3.3V.
ZXRD1033PQ16
0.1
1
10
I
(A)
OUT
100
95
90
85
80
75
70
65
60
55
50
V
=7V
IN
V
IN
=12V
Efficiency v IOUT
VOUT=5V.
ZXRD1050PQ16
0.1
1
10
I
(A)
OUT
16
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Re f
IC1
P1
VIN>12V
VIN<12V
Va lu e
Pa rt Nu m b e r
Ma n u fa ct u re r
Ze te x
Co m m e n t s
ZXRD1050PQ16
QS OP16 Co n tro lle r IC
Ze te x
MS OP8 Lo w RDS (ON)
ZXM64P03X
ZXM64P02X
P
MOS FET
30V VDS
20V VDS
N1
ZXM64NO3X
ZHCS 1000
Ze te x
MSOP8 Low RDS(ON) MOSFET
S ch o ttky Dio d e 1A
0805 S ize
D1
1A 0.5V VF
100k
Ze te x
R1
WCR0805-100k
WCR0805-680
WCR0805-24k
WCR0805-3k
WCR0805-2.7k
LR1206R015
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
R2
680⍀
24k
0805 S ize
R3
0805 S ize
*R3
*Rx
RS ENS E
3k
0805 S ize
2.7K
0805 S ize
0.015⍀
Current Lim it Sense Resistor
CIN
OR
OR
68F
68F
68F
TPSV686M025R0150 AVX
68F 25V ’E’ lo w ESR
68F 20V PTH lo w ES R
68F 20V SMT lo w ES R
20SA68M
20SV68M
S a n yo OS-CON
S a n yo OS-CON
COUT
OR
470F
*150F
*120F
TPSE477M010R0200 AVX
470F 10V ’E’ lo w ES R
150F 6V PTH lo w ES R
120f 6V SMT lo w ES R
6SA150M
6SV120M
S a n yo OS-CON
OR
S a n yo OS-CON
COUT
C1
680F x 2
1F
6CV680GX
S a n yo
680F 6V SMT Bulk Capacitor
1µF,20V.X7R Die le ctric
1µF,4V.X7R Die le ctric
330p F,4V.X7R Die le ctric
1µF,20V.X7R Die le ctric
1µF,20V.X7R Die le ctric
1µF,4V.X7R Die le ctric
22µF,4V.X7R Die le ctric
2.2µF,20V.X7R Die le ctric
1µF,20V.X7R Die le ctric
0.022µF,4V.X7R Die le ctric
10n F,20V.X7R Die le ctric
Lo w Pro file SMT
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
S u m id a
C2
1F
C3
330p F
1F
C4
C5
1F
C6
1F
C7
22F
2.2F
1F
C8
C9
*Cx1
*Cx2
0.022F
10n F
L1
OR
15H
10H
CDRH127B-OWZ9
6001
C&D Te ch n o lo g ie s Lo w Pro file SMT
(NCL)
Fx
2785044447
Fa irRite
S MT Fe rrite Be a d
* see Optimising for Transient Response Section
ISSUE 4 - OCTOBER 2000
17
ZXRD1000 SERIES
5V -18V Input, 5V/ 3A Output, P Phase, High Efficiency Non-synchronous Step Dow n
Converter 200kHz
VCC
5.0-18V
IC1
C8
13
R1
V
IN
P1
9
2
1
7
Shut Down
SHDN
LBSET
LBF
VDRIVE
VOUT
5.0V 3A
L1
RSENSE
Bootstrap
RSENSE+
C5
11
Low input flag
C6
14
10
6
8
Delay
Decoup
V
RSENSE
-
16
15
VF
Com p
PWR
GND
B
CTINT
5
C9
R2
CIN
GND
4
D1
3
COUT
C1
C2 C3
C4
C7
R3
100
95
90
85
80
75
70
65
60
55
50
V
=5V
IN
V
IN
=12V
Efficiency v IOUT
VOUT=3.3V.
ZXRD1033PQ16
0.1
1
10
I
(A)
OUT
100
95
90
85
80
75
70
65
60
55
50
V
=7V
IN
V
IN
=12V
Efficiency v IOUT
VOUT=5V.
ZXRD1050PQ16
0.1
1
10
I
(A)
OUT
18
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Re f
IC1
P1
VIN>12V
VIN<12V
Va lu e
Pa rt Nu m b e r
Ma n u fa ct u re r
Ze te x
Co m m e n t s
ZXRD1050PQ16
QS OP16 Co n tro lle r IC
MS OP8 Lo w RDS (ON)
Ze te x
ZXM64P03X
ZXM64P02X
P
MOS FET
30V VDS
20V VDS
D1
5A 0.5V VF
100k
50WQ04FN
IR
S ch o ttky Dio d e 5A
0805 S ize
R1
WCR0805-100k
WCR0805-680
WCR0805-24k
WCR0805-3k
WCR0805-2.7k
LR1206R015
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
We lw yn /IRC
R2
680⍀
24k
0805 S ize
R3
0805 S ize
*R3
*Rx
RS ENS E
3k
0805 S ize
2.7k
0805 S ize
0.015⍀
Current Lim it Sense Resistor
CIN
OR
OR
68F
68F
68F
TPS V686M025R0150 AVX
68F 25V ’E’ lo w ESR
68F 20V PTH lo w ES R
68F 20V SMT lo w ES R
20S A68M
20S V68M
S a n yo OS-CON
S a n yo OS-CON
COUT
OR
470F
*150F
*120F
TPSE477M010R0200 AVX
470F 10V ’E’ lo w ES R
150F 6V PTH lo w ES R
120f 6V SMT lo w ES R
6SA150M
6SV120M
S a n yo OS-CON
OR
S a n yo OS-CON
COUT
C1
680F x 2
1F
6CV680GX
S a n yo
680F 6V SMT Bulk Capacitor
1µF,20V.X7R Die le ctric
1µF,4V.X7R Die le ctric
330p F,4V.X7R Die le ctric
1µF,20V.X7R Die le ctric
1µF,20V.X7R Die le ctric
1µF,4V.X7R Die le ctric
22µF,4V.X7R Die le ctric
2.2µF,20V.X7R Die le ctric
1µF,20V.X7R Die le ctric
0.022µF,4V.X7R Die le ctric
10n F,20V.X7R Die le ctric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
Ge n e ric
C2
1F
C3
330p F
1F
C4
C5
1F
C6
1F
C7
22F
2.2F
1F
C8
C9
*Cx1
*Cx2
L1
0.022F
10n F
15H
15H
CDRH127-150MC
D05022P-153
S u m id a S MT
Co ilcra ft
Lo w Pro file SMT
Lo w Pro file SMT
* see Optimising for Transient Response Section
ISSUE 4 - OCTOBER 2000
19
ZXRD1000 SERIES
Designing w ith the ZXRD and Dynam ic
Perform ance
Startup
This section refers to the reference design for the 3.3V,
4A output N channel synchronous converter. This is
as shown previously in the Optimising for transient
response section of the applications information (page
10). This circuit is also representative of the ZXRD
evaluation board (see ordering inform ation).
Startup is always im portant in DC-DC converter
applications. Magnetics have large inrush current
requirements. For higher current applications using
large input and output capacitors the startup current can
be quite significant. This can cause several problems.
In many applications the power supply to the DC-DC
converter can be affected. Particularly in battery
powered applications, trying to take large steps in
load current out of the supply can result in either
current limitation (by the internal im pedance of the
battery), or it can actually dam age the battery.
The ZXRD series has been designed to give the best
in terms of all round flexibility allowing engineers to
either use the reference design as is, or to tailor the
design to the individual requirements. This section
demonstrates the perform ance features of the ZXRD
series and its associated components.
For the converter itself, large changes in load current
can result in false triggering of the RSENSE circuit. This
could result in device hiccup (see applications section).
Efficiency
Efficiency is often quoted as one of the key param eters
of a DC-DC converter. Not only does it give an
instantaneous idea of heat dissipation, but also an idea
as to the extent battery life can be extended in say
portable applications. Fig.1 shows the efficiency of the
standard application circuit. Efficiency vs Output
current is shown for the 5 to 3.3V configuration.
Th e ZXRD p ro g ra m m a b le s o ft s ta rt fu n ctio n
elim inates both these problem s. This is very clear to
see in operation if the m ain switching waveform s are
exam ined.
The soft start is programmed by the combination of
resistor and capacitor R3 and C7. As a recommendation,
R3 and C7 are set to 3k and 22µF respectively, which limits
the peak startup current appropriately in the reference
circuit. Fig.2 shows the startup waveforms. VIN and VOUT
are plotted against time
100
95
90
85
80
75
70
65
60
55
V
IN
=5V
Efficiency v IOUT
VOUT=3.3V.
50
0.1
1
10
I
(A)
OUT
Fig.1. 5-3.3V Efficiency to 4A
20
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Output Voltage Ripple
Output voltage ripple is shown in Fig.4 and Fig. 5
for load currents of 0.5A and 4A respectively.
Output voltage ripple will be dependant, to a very
large extent, on the output capacitor ESR. (see
Applications Section for ripple calculation).
Fig.2. Startup Waveform for 3.3V output .
TM
Sim pleSync
and Shoot-Through
Steady state operation under constant load gives
a n e xce lle n t in d ica tio n o f th e ZXRD se rie s
perform ance and also dem onstrates how well
SimpleSyncTM w o r ks . Th e S im p le S y n cTM
technique drives the synchronous MOSFET gate
using the overwinding on the m ain inductor. It
also uses the high speed suppression characteristics
of the ferrite bead to prevent shoot through
currents. Fig.3 shows the gate waveform s for the
m ain and synchronous MOSFET devices (Zetex
ZXM64N02X).
Fig.4 0.5A Main & VOUT Waveform s
Fig.5 4A Main & VOUT Waveforms
Fig3. Main & Synchronous gate w aveform s
ISSUE 4 - OCTOBER 2000
21
ZXRD1000 SERIES
Line regulation
Transient Response
Variation in input voltage for both these conditions
(0.5A a n d 4A o u tp u t) sh ow s the e xce lle n t line
regulation the ZXRD. Fig.6 shows that with 0.5A and
4A output currents, applying an increase in input
voltage from 5V to 10V , results in only small changes
in output regulation.
Transient response to changes in load is becom ing an
increasingly critical feature of many converter circuits.
Many high speed processors m ake very large step
changes in their load requirem ents, at the same time
as having m ore stringent specifications in term s of
overshoot and undershoot. Fig.7 dem onstrates the
excellent load transient performance of the ZXRD
series. A step change using an electronic load from 1A
to 3A is shown with corresponding output transient
perform ance.
Fig.6a Line Regulation 0.5A load
Fig.6b Line Regulation 4A load
Fig.7 Output Transient Response
Non-synchronous Applications
One of the key features of the ZXRD series, when
combined with the SimpleSyncTM technique, is the
flexibility in allowing engineers to choose either a
synchronous or non-synchronous architecture.
Making the design non-synchronous by removing
MOSFET N2 (the synchronous device), replacing the
ZHCS1000 with a high current diode (50WQ04FN)
and using a 2 term inal inductor, such as the Sumida
CDRH127-150MC, decreases cost slightly at the
expense of a few efficiency points. Fig.8 shows the
effect on the efficiency of the 5 to 3.3V 4A application
when the design is made non-synchronous.
22
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
100
95
90
85
80
75
70
65
60
55
50
V
=5V
IN
Efficiency v IOUT
VOUT=3.3V.
0.1
1
10
I
(A)
OUT
Fig.8 Efficiency for non-synchronous 5-3.3V conversion
Using ’P’ Channel Devices (No Bootstrap)
All th e p re ce e d in g e xa m ple s utilise N ch a nn e l
MOSFET devices and a bootstrap circuit to provide full
enhancement to the high side device. These circuits
If the sam e package size MOSFET devices are used, it
is likely a higher on resistance will be encountered,
with the result that efficiency will decline slightly.
Fig 9 s h o w s th e e fficie n cy p lo t fo r a P p ha se
s y n c h r o n o u s 5 V c o n v e r t e r b a s e d o n t h e
ZXRD1050PQ16. The figure charts efficiency v output
current at 12V input and 7V input.
h a ve
a m a xim u m in p u t vo lt a g e o f 10V. Fo r
applications requiring a higher input voltage, using P
channel devices for the main MOSFET will allow up to
18V operation. Typically this m ay be in a 12V to 5V
converter circuit.
100
95
90
85
80
75
70
65
60
55
V
IN
=7V
V
IN
=12V
Efficiency v IOUT
VOUT=5V.
50
0.1
1
10
I
(A)
OUT
Fig.9 ’P’ Channel Device Efficiency (synchronous)
ISSUE 4 - OCTOBER 2000
23
ZXRD1000 SERIES
ZXCM6 Series
Low voltage MOSFETs
Unique structure gives optim um perform ance for sw itching applications.
N channel devices offer high efficiency
perform ance for sw itching applications.
Th is fa m ily o f MOS FETs fro m Ze te x o ffe rs a
com bination of low on-resistance and low gate charge,
providing optim um perform ance and high efficiency
for switching applications such as DC - DC conversion.
P channel MOSFETs excel in load
sw itching applications.
Th e P-ch a n n e l MOS FETs o ffe r h ig h ly e fficie n t
p e rfo rm a n ce fo r lo w v o lta g e lo a d s w itch in g
applications. This helps increase battery life in portable
equipm ent.
Minim um threshold voltage is low, only 0.7V or 1V,
e n a b lin g t h e M O S FETs t o p r o v id e o p t im u m
perform ance from a low voltage source. To ensure the
device suitability for low voltage applications, drain to
source voltage is specified at 20V or 30V.
On resistance is low across the fam ily, from only 40mΩ
(m ax) for the ZXM64N02X part up to 180m Ω (m ax) for
the ZXM61N02F. This m eans that on-state losses are
m inim ised, im proving efficiency in low frequency drive
a pplica tions. Threshold voltage s of 0.7V and 1V
m inim um allow the MOSFETs to be driven from low
voltage sources.
To m inim ise on-state losses, and improve efficiency in
in low frequency drive applications, the on-resistance
(RDS(ON)) is low across the range. For exam ple, the
ZXM64P03X has an RDS(ON) of only 100mΩ at a gate to
source voltage of 4.5V.
To minimise switching losses, and hence increase the
efficiency of high frequency operation, gate charge (Qg)
is sm all. The m axim um Qg varies from 3.4nC to 16nC
depending on which device is chosen. Crss (Miller
capacitance) is also low, e.g. typically 30pF for the
ZXM6203E6 device. This results in better efficiency in
high frequency applications.
Gate source charge is also low, easing requirements for
the gate driver. Maxim um values range from 0.62nC for
the ZXM61P03F, up to 9nC for the ZXM64P03X.
Sm all outline surface m ount packaging
The products have been designed to optimise the
perform ance of a range of packages. The parts are
offered in SOT23, SOT23-6 and MSOP8 packages. The
MSOP8 enables single or dual devices to be offered.
The MSOP8 is also half the size of com petitive SO8
devices and 20% smaller than TSSOP8 alternatives.
Product perform ance
The following perform ance characteristics show the
ca p a b ilitie s o f th e ZXM64N02X. Th is d e vice is
recom mended for use with certain configurations of
the ZXRD DCDC controller circuit.
24
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Perform ance Characterisation of ZXM64N02X
ELECTRICAL CHARACTERISTICS (at T
= 25°C unless otherwise stated).
am b
PARAMETER
S YMBOL MIN.
TYP.
MAX. UNIT CONDITIONS .
STATIC
Dra in -S o u rce Bre a kd o w n Vo lta g e
Ze ro Ga te Vo lta g e Dra in Cu rre n t
Ga te -Bo d y Le a ka g e
V(BR)DS S 20
IDS S
V
ID=250µA, VGS =0V
1
VDS =20V, VGS =0V
µA
n A
IGS S
100
V
GS =± 12V,
VDS =0V
Ga te -So u rce Th re sh o ld Vo lta g e
VGS (th )
RDS (o n )
g fs
0.7
6.1
V
ID=250µA, VDS
=
VGS
Sta tic Dra in -So u rce On -Sta te
Re sis ta n ce (1)
0.040
0.050
VGS =4.5V, ID=3.8A
VGS =2.7V, ID=1.9A
Ω
Ω
Fo rw a rd Tra n s co n d u cta n ce (3)
DYNAMIC (3)
S
VDS =10V,ID=1.9A
In p u t Ca p a cita n ce
Ou tp u t Ca p a cita n ce
Re ve rse Tra n s fe r Ca p a cita n ce
SWITCHING(2) (3)
Tu rn -On De la y Tim e
Ris e Tim e
Cis s
Co s s
Crs s
1100
350
p F
p F
p F
VDS =15 V,
VGS =0V, f=1MHz
100
td (o n )
tr
td (o ff)
tf
5.7
n s
9.6
n s
VDD =10V, ID=3.8A
RG=6.2Ω, RD=2.6Ω
(Re fe r to te s t
circu it)
Tu rn -Off De la y Tim e
Fa ll Tim e
28.3
11.6
n s
n s
To ta l Ga te Ch a rg e
Ga te -So u rce Ch a rg e
Ga te Dra in Ch a rg e
Qg
16
n C
n C
n C
VDS =16V,VGS =4.5V
, ID=3.8A
(Re fe r to te s t
circu it)
Qg s
Qg d
3.5
5.4
SOURCE-DRAIN DIODE
Dio d e Fo rw a rd Vo lta g e (1)
VS D
0.95
V
Tj=25°C, IS =3.8A,
VGS =0V
Re ve rse Re co ve ry Tim e (3)
Re ve rse Re co ve ry Ch a rg e (3)
trr
23.7
13.3
n s
Tj=25°C, IF=3.8A,
d i/d t= 100A/µs
Qrr
n C
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% .
(2) Switching characteristics are independent of operating junction tem perature.
(3) For design aid only, not subject to production testing.
ISSUE 4 - OCTOBER 2000
25
ZXRD1000 SERIES
208221 b8066
GERMANY
ASIA
USA
UK
Ze te x Gm b H
Mu n ich
Ze te x As ia
Ho n g Ko n g
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Lo n g Is la n d NY
Ze te x PLC
Ch a d d e rto n ,
Old h a m
Zetex
(49) 894549490
(852) 2610 0611
(1) 631 543 7100
(44) 161 622 4444
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Su m id a Ele ctric
Su m id a Ele ctric
USA (CHICAGO
He a d Office )
Ole Wo lf
Ele ctro n ics Ltd .
Sum ida
HK
(852) 2880 6688
Ta iw a n Su m id a
Ele ctric
(886) 2762 2177
(1) 847 956-0666
(44) 1525 290755
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Ele ctro n ik Gm b H
(49) 72156910
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Ltd Sin g a p o re
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(65) 258 2833
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(1) 843 448 9411
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TTC Gro u p p lc
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We lw yn
Co m p o n e n ts Ltd
(44) 1670 822181
Welw yn, IRC
Coilcraft
Ele ctro n ics Gm b H Sin g a p o re
(49)871 973760
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(1) 847 639 6400
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(44) 1236 730595
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Sa n yo Eu ro p e
Mu n ich
SANYO
Ele ctro n ics Ltd .
SANYO
S e m ico n UK Ltd
(44) 1279 422224
Sanyo Electronic
Com p. (OS-CON)
Ele ctro n ics Ltd .
Fo rre st City, AR
870 633 5030
Sa n Die g o , CA
619 661 6835
Ro ch e lle Pk, NJ
201 843 8100
(49) 89 457693 16 Ho n g Ko n g
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(81) 720 70 6306
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Co n ta ct
C & D
Te ch n o lo g ie s
(NCL)
UK
C & D
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Te ch n o lo g ie s
(NCL)
5816 Cre e d m o o r
Ro a d ,
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27612
(1) 919 571 9405
C & D
Te ch n o lo g ie s
(NCL)
C & D Technologies
(NCL)
Te ch n o lo g ie s
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Ta n n e rs Drive
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MK14 5BU
(44) 1908 615232
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26
ISSUE 4 - OCTOBER 2000
ZXRD1000 SERIES
Connection Diagram
Note:
1
Bootstrap
V
FB
16
Connection diagram is the sam e for N and P Phase, adjustable and
fixed controllers. The VFB pin has a different function between
adjustable and fixed versions.
V
2
15
14
13
Com p
Delay
DRIVE
PWRG
3
4
5
6
ND
G
V
IN
ND
C
12
11
LB
T
SET
V
INT
LBF
R
7
8
10
9
Decoup
SHDN
SENSE +
SENSE -
R
Package Dim ensions
A
IDENTIFICATION
RECESS
FOR PIN 1
C
B
D
PIN No.1
K
DIM
Millim e tre s
MIN
In ch e s
MAX
4.98
MIN
MAX
0.196
A
B
C
D
E
F
4.80
0.189
0.025 NOM
0.007
0.008
0.15
0.635
0.177
0.20
0.267
0.30
3.99
1.75
0.25
6.20
8°
0.011
0.012
0.157
0.069
0.01
3.81
1.35
0.053
0.004
0.228
0°
G
J
0.10
5.79
0.244
8°
K
0°
ISSUE 4 - OCTOBER 2000
27
ZXRD1000 SERIES
Ordering Inform ation
Device
Description
T&R Suffix
Partmarking
ZXRD1033NQ16
3.3V Fixe d co n tro lle r N m a in sw itch
TA, TC
ZXRD1033N
ZXRD1050NQ16
5.0V Fixe d co n tro lle r N m a in sw itch
TA, TC
TA, TC
TA, TC
TA, TC
TA, TC
ZXRD1050N
ZXRD100AN
ZXRD1033P
ZXRD1050P
ZXRD100AP
ZXRD100ANQ16 Ad ju s ta b le co n tro lle r N m a in s w itch
ZXRD1033PQ16
ZXRD1050PQ16
ZXRD100APQ16
3.3V Fixe d co n tro lle r P m a in sw itch
5.0V Fixe d co n tro lle r P m a in sw itch
Ad ju s ta b le co n tro lle r P m a in s w itch
’N main switch’ indicates controller for use with N channel main switch elem ent.
’P main switch’ indicates controller for use with P channel m ain switch element.
TA= Tape and Reel quantity of 500
TC= Tape and Reel quantity of 2500
Dem onstration Boards
These can be requested through your local Zetex office or representative. These boards can be tailored to your
specific needs. If you would like to obtain a demo board then a request form is available to help determine your
exact requirem ent.
Zetex plc.
Fields New Road, Chadderton, Oldham, OL9-8NP, United Kingdom.
Telephone: (44)161 622 4422 (Sales), (44)161 622 4444 (General Enquiries)
Fax: (44)161 622 4420
Zetex GmbH
Zetex Inc.
Zetex (Asia) Ltd.
3701-04 Metroplaza, Tower 1
Hing Fong Road,
Kwai Fong, Hong Kong
Telephone:(852) 26100 611
Fax: (852) 24250 494
These are supported by
agents and distributors in
major countries world-wide
Zetex plc 2001
Streitfeldstraße 19
D-81673 München
Germany
Telefon: (49) 89 45 49 49 0
Fax: (49) 89 45 49 49 49
47 Mall Drive, Unit 4
Commack NY 11725
USA
Telephone: (631) 543-7100
Fax: (631) 864-7630
http://www.zetex.com
This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any
purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves the
right to alter without notice the specification, design, price or conditions of supply of any product or service.
ISSUE 4 - OCTOBER 2000
28
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ZXRD100APQ16TA
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