ZXRD1033NQ16 [ZETEX]

HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS; 高效率SIMPLESYNC PWM DC- DC控制器


型号：	ZXRD1033NQ16
厂家：	ZETEX SEMICONDUCTORS
描述：	HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS 高效率SIMPLESYNC PWM DC- DC控制器稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管功效
文件：	总28页 (文件大小：288K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ZXRD1000 SERIES

HIGH EFFICIENCY SIMPLESYNC PWM DC-DC CONTROLLERS

DESCRIPTION

ZXRD1000 series can be used with an all N channel

topology or a combination N & P channel topology.

Additional functionality includes shutdown control, a

u s e r a d ju s ta b le lo w b a tte ry fla g a n d s im p le

adjustment of the fixed PWM switching frequency.

The controller is available with fixed outputs of 5V or

3.3V and an adjustable (2.0 to 12V) output.

The ZXRD1000 series provides complete control and

protection functions for a high efficiency (> 95%) DC-DC

converter solution. The choice of external MOSFETs allow

the designer to size devices according to application. The

ZXRD1000 series uses advanced DC-DC converter

techniques to provide synchronous drive capability, using

innovative circuits that allow easy and cost effective

im plem entation of shoot through protection. The

FEATURES

•

Fixed 3.3, 5V and adjustable outputs

Programm able soft start

•

> 95% Efficiency

Fixed frequency (adjustable) PWM

APPLICATIONS

Voltage m ode to ensure excellent stability &

transient response

•

High efficiency 5 to 3.3V converters up to 4A

Sub-notebook com puters

Embedded processor power supply

Distributed power supply

Portable instrum ents

•

Low quiescent current in shutdown mode,15µA

Low battery flag

Output down to 2.0V

Overload protection

Dem onstration boards available

Synchronous or non-synchronous operation

Cost effective solution

Local on card conversion

GPS systems

N or P channel MOSFETs

QSOP16 package

Very high efficiency Sim pleSync^TMconverter.

V_CC

4.5-10V

BAT54

IC1

100k

V_IN

ZXM64N02X

C10

1µF

15µH

SHDN

LB_SET

LBF

V_DRIVE

Bootstrap

R_SENSE+

Shut Down

V_OUT

3.3V 4A

R_SENSE

0.01R

C11

1µF

Low input flag

Cx2

10k

1µF

0.01µF

Delay

Decoup

V_INT

R_SENSE

C_OUT

V_FB

Com p

PWR

1µF

C_T

680µF

CX1

0.022µF

120µF

2k7

G_NDG_ND

680R

2.2µF

10k

C_IN

68µF

BAT54

330pF

1µF

ZHCS1000

22µF

1µF

ZXM64N02X

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

ABSOLUTE MAXIMUM RATINGS

Input without bootstrap (P suffix) 20V

R_SENSE+, R_{SENSE -}

V_IN

Input with bootstrap(N suffix)

10V

Power dissipation

Operating tem perature

Storage temperature

610mW (Note 4)

-40 to +85°C

-55 to +125°C

Bootstrap voltage

Shutdown pin

LB_SETpin

20V

V_IN

ELECTRICAL CHARACTERISTICS

TEST CONDITIONS (Unless otherw ise stated) T

=25°C

amb

Sym b o l

Pa ra m e t e r

Co n d it io n s

No Ou tp u t De vice

_IN=5V,I_FB=1m A

Min

Typ

Ma x

Un it

V_{IN(m in )}

Min . Op e ra tin g Vo lta g e

Fe e d b a ck Vo lta g e

4.5

V_FB

(No te 1)

1.215 1.24

1.213 1.24

1.215 1.24

1.265

1.267

1.265

4.5<V_IN<18V

50µA<I_FB<1m A,V_IN=5V

T_DRIVE

Ga te Ou tp u t Drive Ca p a b ility

C_G=2200p F(No te 2)

C_G=1000p F

n s

V_IN=4.5V to maximim

su p p ly (No te 3)

I_CC

S u p p ly Cu rre n t

V_IN=5V

m A

µA

S h u td o w n Cu rre n t

V_{S HDN}= 0V;V_IN=5V

f_{o s c}

(No te 5)

Op e ra tin g fre q u e n cy ra n g e

Fre q u e n cy w ith tim in g ca p a cito r C3=1300p F

C₃=330p F

300

kHz

200

f_{o s c(to l)}

Os cilla to r To l.

±25

Ma x Du ty Cycle

N Ch a n n e l

P Ch a n n e l

100

MAX

V_{RS ENS E}

R_{S ENS E}vo lta g e d iffe re n tia l

-40 to +85°C

m V

V_{CMRS ENS E}Common mode range of V_{RS ENS E}

V_IN

0.4

LBF_{S ET}

LBF_OUT

LBF_{HYS T}

LBF_{S INK}

V_{S HDN}

Lo w Ba tte ry Fla g se t vo lta g e

Lo w Ba tte ry Fla g o u tp u t

1.5

Active Lo w

0.2

Lo w Ba tte ry Fla g Hys te re sis

Lo w Ba tte ry Fla g Sin k Cu rre n t

S h u td o w n Th re sh o ld Vo lta g e

m V

m A

-40 to +85°C

Lo w (o ff)

Hig h (o n )

0.25

1.5

I_{S HDN}

S h u td o w n Pin S o u rce Cu rre n t

µA

Note 1. V_FBhas a different function between fixed and adjustable controller options.

Note 2. 2200pF is the maximum recomm ended gate capacitance.

Note 3. Maximum supply for P phase controllers is 18V,maximum supply for N phase controllers is 10V.

Note 4. See V_INderating graph in Typical Characteristics.

Note 5. The maximum frequency in this application is 300kHz. For higher frequency operation contact Zetex

Applications Departm ent.

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

TYPICAL CHARACTERISTICS

202

201

200

199

198

197

C3=330pF

V^IN=5V

210

205

C3=330pF

200

195

190

-40

-20

100

V^IN(V)

Tem perature (°C)

FOSC v VIN

FOSC v Tem perature

V^OUT=3.3V

1.244

1.25

V^IN=5V

V^OUT=3.3V

1.245

1.242

1.24

1.238

1.235

1.236

1.23

-40

-20

VIN (V)

Tem perature (°C)

VFB v VIN

VFB v Tem perature

1.02

1.01

1.00

0.99

VIN=5V

1.005

1.000

0.995

-40

-20

VIN (V)

Tem perature (°C)

Norm alised LBSET v VIN

Norm alised LBSET v Tem perature

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

TYPICAL CHARACTERISTICS

10nF

100

V^IN(V)

Supply Current v V

Supply Current v V^IN

N Phase Device

P Phase Device

Vin=5V

300

200

100

V^IN=5V

V^OUT=3.3V

100pF

1nF

Tim ing Capacitance

RSENSE (m ⍀)

FOSC v Capacitance

Current Lim it v R^SENSE

C^G=2200pF

-40

-20

Tem perature (°C)

V^INDerating v Tem perature

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

DETAILED DESCRIPTION

The ZXRD1000 series can be configured to use either

N or P channel MOSFETs to suit most applications.

Th e m o s t p o p u la r fo rm a t , a n a ll N ch a n n e l

synchronous solution gives the optimum efficiency. A

feature of the ZXRD1000 series solution is the unique

m ethod of generating the synchronous drive, called

Sim pleSync . Most solutions use an additional

output from the controller, inverted and delayed from

the main switch drive. The ZXRD1000 series solution

uses a simple overwinding on the m ain choke (wound

on the same core at no real cost penalty) plus a small

ferrite bead . This means that the synchronous FET is

only enhanced when the main FET is turned off. This

reduces the ‘blanking period’ required for shoot-

through protection, increasing efficiency and allowing

sm aller catch diodes to be used, m aking the controller

simpler and less costly by avoiding complex tim ing

circuitry. Included on chip are num erous functions that

allow flexibility to suit most applications. The nom inal

switching frequency (200kHz) can be adjusted by a

simple timing capacitor, C3. A low battery detect circuit

is also provided. Off the shelf components are available

from major manufacturers such as Sumida to provide

either a single winding inductor for non-synchronous

a p plica tions or a coil with a n ove r-winding for

synchronous applications. The combination of these

switching characteristics, innovative circuit design and

excellent user flexibility, make the ZXRD1000 series

DC-DC solutions some of the smallest and most cost

effective and electrically efficient currently available.

Using Zetex’s HDMOS low R_DS(on)devices, ZXM64N02X

for the main and synchronous switch, efficiency can

peak at upto 95% and remains high over a wide range

of operating currents. Programmable soft start can also be

adjusted via the capacitor, C7, in the compensation loop.

system s this can not only damage MOSFETs, but also

the battery itself. To realise correct ‘dead tim e’

implem entation takes com plex circuitry and hence

implies additional cost.

The ZETEX Method

Zetex has taken a different approach to solving these

problems. By looking at the basic architecture of a

synchronous converter, a novel approach using the

m ain circuit inductor was developed. By taking the

inverse waveform found at the input to the main

in d u c t o r o f a n o n -s y n c h r o n o u s s o lu t io n , a

synchronous drive waveform can be generated that is

always relative to the m ain drive waveform and

inverted with a sm all delay. This waveform can be

used to drive the synchronous switch which m eans no

complex circuitry in the IC need be used to allow for

shoot-through protection.

Implem entation

Implem entation was very easy and low cost. It simply

m eant peeling off a strand of the m ain inductor

winding and isolating it to form a coupled secondary

winding. These are available as standard item s

referred to in the applications circuits parts list.The use

of a small, surface mount, inexpensive ’square loop’

fe rrite b e a d p ro vid e s a n e xce lle n t m e th o d o f

elim inating shoot-through due to variation in gate

thresholds. The bead essentially acts as a high

im p e d a n c e fo r t h e fe w n a n o s e c o n d s t h a t

shoot-through would normally occur. It saturates very

quickly as the MOSFETs attain steady state operation,

reducing the bead impedance to virtually zero.

Benefits

The net result is an innovative solution that gives

a d d it io n a l b e n e fit s w h ils t lo w e r in g o v e ra ll

implem entation costs. It is also a technique that can

b e sim ply om itte d to m a ke a non-synchronous

controller, saving further cost, at the expense of a few

efficiency points.

What is Sim pleSync

Conventional Methods

In the conventional approach to the synchronous

DC-DC solution, much care has to be taken with the

timing constraints between the m ain and synchronous

switching devices. Not only is this dependent upon

individual MOSFET gate thresholds (which vary from

device to device within data sheet lim its and over

tem perature), but it is also som ewhat dependent upon

m agnetics, layout and other parasitics. This normally

m eans that significant ‘dead tim e’ has to be factored

in to the design between the m ain and synchronous

d e vice s b e in g tu rn e d o ff a n d o n re s p e ctive ly.

Incorrect application of dead time constraints can

potentially lead to catastrophic short circuit conditions

between V_INand G_ND. For some battery operated

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Functional Block Diagram

PIN DES CRIPTIONS

‡ S e e re le va n t Ap p lica tio n s Se ctio n

Pin No .

Na m e

De s crip tio n

Bo o tstra p Bo o ts tra p circu it fo r g e n e ra tin g g a te d rive

V_DRIVE

PWRG_ND

G_ND

Ou tp u t to th e g a te d rive circu it fo r m a in N/P ch a n n e l s w itch e s

Po w e r g ro u n d

S ig n a l g ro u n d

C_T

Tim in g Ca p a cito r se ts o scilla to r fre q u e n cy. ‡

In te rn a l Bia s Circu it. De co u p le w ith 1µF ce ra m ic ca p a cito r

Hig h e r p o te n tia l in p u t to th e cu rre n t se n se fo r cu rre n t lim it circu it

Lo w e r p o te n tia l in p u t to th e cu rre n t se n se fo r cu rre n t lim it circu it

S h u td o w n co n tro l. Active lo w .

V_INT

R_{S ENS E+}

R_{S ENS E-}

SHDN

De co u p

LBF

Optional short circuit and overload decoupling capacitor for increased accuracy

Lo w b a tte ry fla g o u tp u t. Active lo w , o p e n co lle cto r o u tp u t

LB_{S ET}

Lo w b a tte ry fla g s e t. Ca n b e co n n e cte d to V_INif u n u s e d , o r th re s h o ld se t

via p o te n tia l d ivid e r. ‡

V_IN

In p u t Vo lta g e

De la y

Co m p

V_FB

Exte rn a l R a n d C to s e t th e d e s ire d cycle tim e fo r h iccu p circu it. ‡

Co m p e n s a tio n p in to a llo w fo r s ta b ility co m p o n e n ts a n d s o ft sta rt. ‡

Fe e d b a ck Vo lta g e . Th is p in h a s a d iffe re n t fu n ctio n b e tw e e n fixe d a n d

a d ju sta b le co n tro lle r o p tio n s. Th e a p p ro p ria te co n tro lle r m u s t b e u se d fo r

th e fixe d o r a d ju s ta b le s o lu tio n . Co n n e ct to V_OUTfo r fixe d o u tp u t, o r to

p o te n tia l d ivid e r fo r a d ju s ta b le o u tp u t. ‡

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Input Capacitors

Applications

Note: Com ponent nam es refer to designators shown

in the application circuit diagram s.

The input capacitor is chosen for its RMS current and

voltage rating. The use of low ESR electrolytic or

tantalum capa citors is recom m ended. Tantalum

capacitors should have their voltage rating at 2V_IN

(m a x), e le ctro lytic a t 1.4V_IN(m a x). I_RMSc a n b e

approximated by:

Output Capacitors

Output capacitors are a critical choice in the overall

perform ance of the solution. They are required to filter

the output and supply load transient current. They are

also affected by the switching frequency, ripple

current, di/dt and magnitude of transient load current.

ESR plays a key role in determ ining the value of

capacitor to be used. Com bination of both high

frequency, low value ceram ic capacitors and low ESR

bulk storage ca pacitors optim ised for switching

a p plica tion s provide th e be st response to loa d

transients a nd ripple requirem ents. Electrolytic

ca p a cito rs w ith lo w ES R a re la rg e r a n d m o re

e xp e n s ive s o th e u ltim a te ch o ice is a lw a ys a

com prom ise between size, cost and performance.

Care m ust also be taken to ensure that for large

capacitors, the ESL of the leads does not becom e an

issue. Excellent low ESR tantalum or electrolytic

capacitors are available from Sanyo OS-CON, AVX,

Sprague and Nichicon.

√(V_OUT(V_IN−V_OUT) )

I_RMS= I_OUT

V_IN

Underspecification of this parameter can affect long

term reliability. An additonal ceramic capacitor should

be used to provide high frequency decoupling at V_IN.

Also note that the input capacitance ESR is effectively in

series with the input and hence contributes to efficiency

losses related to I_RMS²* ESR of the input capacitor.

MOSFET Selection

The ZXRD1000 family can be configured in circuits

where either N or P channel MOSFETs are employed

as the main switch. If an N channel device is used, the

corresponding N phase controller m ust be chosen.

Sim ilarly, for P channel m ain switch a P phase

controller m ust be used. The ordering information has

a clear identifier to distinguish between N and P phase

controllers.

The output capacitor will also affect loop stability,

transient perform ance. The capacitor ESR should

preferably be of a sim ilar value to the sense resistor.

Parallel devices may be required.

The MOSFET selection is subject to thermal and gate

drive considerations. Care also has to be taken to allow

for transition losses at high input voltages as well as

R_DS(ON)lo s s e s fo r t h e m a in MO S FET. It is

recom m ended that a device with a drain source

breakdown of at least 1.2 tim es the m axim um V_IN

should be used.

0.29 V_OUT(V_IN−V_OUT

)

I_RIPPLE(RMS)

L f V_IN

where L= output filter inductance

f= switching frequency

For output voltage ripple it is necessary to know the

peak ripple current which is given by:

For optim um efficiency , two N channel low R_DS(on)

devices are required. MOSFETs should be selected

with the lowest R_DS(ON)consistent with the output

current required. As a guide, for 3-4A output, <50mΩ

devices would be optim um , provided the devices are

low gate threshold and low gate charge. Typically look

for devices that will be fully enhanced with 2.7V V_GS

for 4-5A capability.

V_OUT( V_IN−V_OUT)

I_pk−pk

L f V_IN

Voltage ripple is then:-

_RIPPLE= I_pkESR

−

Zetex offers a range of low R_DS(ON)logic level MOSFETs

which are specifically designed with DC-DC power

conve rsion in m ind. Packaging includes SOT23,

SOT23-6 and MSOP8 options. Ideal exam ples of

optimum devices would be Zetex ZXM64N03X and

ZXM64N02X (N channel). Contact your local Zetex office

or Zetex web page for further information.

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Applications (continued)

Inductor Selection

The inductor is one of the m ost critical components in

the DC-DC circuit.There are num erous types of devices

available from many suppliers. Zetex has opted to

specify off the shelf encapsulated surface m ount

components, as these represent the best com prom ise

in term s of cost, size, performance and shielding.

conditions, when V_INis at its highest and V_OUTis

lowest (short circuit conditions for exam ple). Under

these conditions the device must handle peak current

at close to 100% duty cycle.

Frequency Adjustm ent

The nominal running frequency of the controller is set

to 200kHz in the applications shown. This can be

adjusted over the range 50kHz to 300kHz by changing

the value of capacitor on the C_Tpin. A low cost

ceramic capacitor can be used.

Frequency = 60000/C3 (pF)

Frequency v tem perature is given in the typical

characteristics.

The Sim pleSync^TMtechnique uses a main inductor

with an overwinding for the gate drive which is

available as a standard part. However, for engineers

who wish to design their own custom m agnetics, this

is a relatively sim ple and low cost construction

technique. It is sim ply form ed by term inating one of

the m ultiple strands of litz type wire separately. It is

still wound on the same core as the m ain winding and

only has to handle enough current to charge the gate

of the synchronous MOSFET. The m ajor benefit is

circuit sim plification and hence lower cost ofthe control

IC. For non-synchronous operation, the overwinding is

not required.

Output Voltage Adjustm ent

The ZXRD1000 is available as either a fixed 5V, 3.3V or

adjustable output. On fixed output versions, the V_FBpin

should be connected to the output. Adjustable operation

requires a resistive divider connected as follows:

The choice of core type also plays a key role. For

optimum perform ance, a ’swinging choke’ is often

preferred. This is one which exhibits an increase in

inductance as load current decreases. This has the net

effect of reducing circulating current at lighter load

im p ro vin g e fficie n cy. Th e re is no rm a lly a cost

prem ium for this added benefit. For this reason the

ch o ke s s p e cifie d a re th e m o re u s u a l co n s ta n t

inductance type.

Peak current of the inductor should be rated to

m inim um 1.2I_OUT(m ax) . To maximise efficiency, the

winding resistance of the m ain inductor should be less

than the main switch output on resistance.

The value of the output voltage is determ ined by the

equation

Schottky Diode

R_A

R_B

Selection depends on whether a synchronous or

n o n -s yn ch ro n o u s a p p ro a ch is ta ke n . Fo r th e

ZXRD1000, the unique approach to the synchronous

drive m eans minimal dead tim e and hence a small

SOT23 1A DC rated device will suffice, such as the

ZHCS1000 from Zetex. The device is only designed to

prevent the body diode of the synchronous MOSFET

from conducting during the initial switching transient

until the MOSFET takes over. The device should be

connected as close as possible to the source term inals

of the m ain MOSFET.

V_OUT= V_FB1 +

=1.24V

(

)

Note: The adjustable circuit is show n in the follow ing

transient optimisation section. It is also used in the

evaluation PCB. In both these circuits R_Ais assigned

the label R6 and R_Bthe label R5.

Values of resistor should be between 1k and 20k to

guarantee operation. Output voltage can be adjusted in

the range 2V to 12V for non-synchronous applications.

For synchronous applications, the m inim um V_OUTis set

by the V_GSthreshold required for the synchronous

MOS FET, a s t h e s w in g in t h e g a t e u s in g t h e

For non-synchronous applications , the Schottky diode

m u s t b e s e le cte d to a llo w fo r th e w o rs t ca s e

Sim pleSync^TMtechnique is approxim ately V_OUT

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Applications (continued)

Low Battery Flag

Hiccup Tim e Constant

The low battery flag threshold can be set by the user

to trip at a level determined by the equation:

The hiccup circuit (at the ’delay’ pin) provides overload

protection for the solution. The threshold of the hiccup

m ode is determ ined by the value of R_SENSE,When

>50mV is developed across the sense resistor, the

hiccup circuit is triggered, inhibiting the device.

R_C

V_LBSET= 1.25 1 +

(

)

R_D

R_Dis recomm ended to be 10k where R_Cand R_Dare

connected as follows:

It will stay in this state depending upon the tim e

constant of the resistor and capacitor connected at the

’delay’ pin. In order to keep the dissipation down

under overload conditions it is recom mended the

circuit be off for approximately 100m s. If for other

application reasons this is too long an off period, this

can be reduced at least by 10:1, care needs to be taken

that any increased dissipation in the external MOSFET

is still acceptable. The resistor capacitor combination

R1,C1 recom m ended in the applications circuits

provides a delay of 100m s.

Soft Start & Loop Stability

Soft start is determ ined by the tim e constant of the

capacitor and resistor C7 and R3. Typically a good

starting point is C7 = 22µF and R3 = 24k for fixed

voltage variants. For fully adjustable variants see

Optim isin g fo r Tra n sie n t Re sponse la te r in the

applications section. This network also helps provide

good loop stability.

Hysteresis is typically 20m V at the LB_SETpin.

Current Lim it

A current lim it is set by the low value resistor in the

output path, R_SENSE. Since the resistor is only used for

overload current limit, it does not need to be accurate

and can hence be a low cost device.

Low Quiescent Shutdow n

Shutdown control is provided via the SHDN pin,

putting the device in to a low quiescent sleep m ode.

In som e circumstances where rapid sequencing of V_CC

can occur (when V_CCis turned off and back on) and V_CC

has a very rapid rise tim e (100-200m s) timing conflicts

can occur.

The value of the current limit is set by using the

equation:

50(m V)

I_LIM(A) =

(mΩ)

SENSE

A graph of Current Lim it v R_SENSEis shown in the

typical characteristics. This should assist in the

selection of R_SENSEappropriate to application.

If desired, R_SENSEcan also be on the input supply side.

When used on the input side R_SENSEshould be in series

with the upper output device (i.e. in series with the

d ra in o r s o u rce in N a n d P ch a n n e l s o lu tio n s

respectively).Typically in this configuration R_SENSEwill

be 20m ⍀.

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Optim ising for Transient Response.

Layout Issues

Transient response is im portant in applications where

the load current increases and decreases rapidly. To

optim ise the system for good transient response

certain criteria have to be observed.

Layout is critical for the circuit to function in the m ost

efficient m anner in term s of electrical efficiency,

therm al considerations and noise. The following

guidelines should be observed:

The optim um solution using the ZXRD series uses the

adjustable N phase controller in synchronous m ode as

represented in the diagram opposite. The external

networks for this solution require the use of the

adjustable controller option.

A 2.2µF (C8) decoupling capacitor should be as close

as possible to the drive MOSFETs and D1 anode. This

capacitor is effectively connected across V_INand G_ND

but should be as close as possible to the appropriate

co m p o n e n ts in e ith e r N o r P, syn ch ro n o u s o r

non-synchronous configurations. Furtherm ore the

G_NDconnection of the synchronous MOSFET/D1 and

output capacitors should be close together and use

either a ground plane or at the very least a low

inductance PCB track.

By using standard ’bulk’ capacitors in parallel with a

single OS-CON capacitor significant perform ance

versus cost advantage can be given in this application.

The low ESR of the OS-CON capacitor provides

competitive output voltage ripple at low capacitance

values. The ’bulk’ capacitors aid transient response.

However, the low ESR of the OS-CON capacitor can

cause instability within the system . To m aintain

s ta b ility a n RC n e tw o rk (R_X, C_x1 ) h a s t o b e

implem ented. Furthermore, a capacitor in parallel with

R6 (C_x2) is required to optimise transient response. To

do this the appropriate adjustable ZXRD must be used

because the input to the internal error am plifier (pin

16) has to be accessed. The adjustable device differs

from fixed controller versions in this respect. This

combined with a frequency com pensation adjustm ent

gives an optim ised solution for excellent transient

response.

For the standard application circuits, a Gerber file can

be m ade available for the layout which uses the

m aterials as listed in the bill of materials table for the

reference designs.

Reference Designs.

In the following section reference circuits are shown for

t h e ZXRD s e rie s in b o th s yn c h ro n o u s a n d

non-synchronous modes. These are shown for each of

the N and P phase controllers. In each case efficiency

graphs are shown for the appropriate configuration

using 3.3V and 5V ZXRD devices. The BOM is then

shown for the design. Additional and alternative

com ponents are shown with a ’*’. These refer to

modifications to the design to optimise for transient

response. Optimisation is reached using the adjustable

version of either N or P phase controller device.

ISSUE 4 - OCTOBER 2000

V_CC

4.5-10V

BAT54

IC1

100k

ZXM64N02X

V_IN

C10

1µF

15µH

SHDN

LB_SET

LBF

V_DRIVE

Shut Down

V_OUT

3.3V 4A

R_SENSE

0.01R

C11

1µF

Bootstrap

R_SENSE+

1µF

Low input flag

Cx2

10k

1µF

0.01µF

Delay

Decoup

V_INT

R_{SENSE -}

C_OUT

V_FB

Com p

PWR

1µF

C_T

680µF

CX1

0.022µF

120µF

2k7

G_NDG_ND

2.2µF

680R

10k

C_IN

68µF

BAT54

330pF

1µF

ZHCS1000

22µF

1µF

ZXM64N02X

Optimised Transient Response, 4.5V-10V Input, 3V/4A Output, N Phase Adjustable, SimpleSync converter 200kHz.

ZXRD1000 SERIES

4.5V -10VInput, 3.3V/ 4A Output, N Phase, High Efficiency Sim pleSync

200kHz

Converter

V_CC

4.5-10V

IC1

C10

SHDN

LB_SET

LBF

V_DRIVE

Shut Down

V_OUT

3.3V 4A

R_SENSE

C11

Bootstrap

R_SENSE+

Low input flag

Delay

Decoup

R_SENSE

V_F

Com p

PWR

G_ND

C_T^INT

G_ND

C_IN

C_OUT

C2 C3

ZXRD1033NQ16

100

=7V

=10V

Efficiency v I_OUT

V_OUT=5.0V.

ZXRD1050NQ16

0.1

(A)

OUT

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Re f

IC1

V_IN>7V

V_IN<7V

Va lu e

Pa rt Nu m b e r

Ma n u fa ct u re r

Ze te x

Co m m e n t s

ZXRD1033NQ16

QS OP16 Co n tro lle r IC

Ze te x

MS OP8 Lo w R_{DS (ON)}

ZXM64N03X

ZXM64N02X

MOS FET

30V V_DS

20V V_DS

1A 0.5V V_F

10m A 0.4V V_F

100k

ZHCS 1000

Ze te x

S OT23 Sch o ttky Dio d e 1A

S OT23 Sch o ttky Dio d e

0805 S ize

BAT54

Ze te x

BAT54

Ze te x

WCR0805-100k

WCR0805-680

WCR0805-24k

WCR0805-3k

WCR0805-10k

WCR0805-2.7k

LR1206R010

We lw yn /IRC

680⍀

0805 S ize

24k

0805 S ize

*R3

0805 S ize

10k

0805 S ize

*Rx

R_{S ENS E}

2.7K

0805 S ize

0.01⍀

Current Lim it Sense Resistor

C_IN

68␮F

TPSD68M016R0150 AVX

68␮F 16V ’E’ lo w ESR

68␮F 20V PTH lo w ES R

68␮F 20V SMT lo w ES R

20SA68M

20SV68M

S a n yo OS-CON

C_OUT

470␮F

*150␮F

*120␮F

TPSE477M010R0200 AVX

470␮F 10V ’E’ lo w ES R

150␮F 6V PTH lo w ES R

120␮f 6V SMT lo w ES R

6SA150M

6SV120M

S a n yo OS-CON

C_OUT

680␮F x 2

1␮F

6CV680GX

S a n yo

680␮F 6V SMT Bulk Capacitor

1µF,10V.X7R Die le ctric

1µF,4V.X7R Die le ctric

330p F,4V.X7R Die le ctric

1µF,10V.X7R Die le ctric

1µF,4V.X7R Die le ctric

22µF,4V.X7R Die le ctric

2.2µF,10V.X7R Die le ctric

1µF,10V.X7R Die le ctric

0.022µF,4V.X7R Die le ctric

10n F,10V.X7R Die le ctric

Lo w Pro file SMT

Ge n e ric

S u m id a S MT

1␮F

330p F

1␮F

22␮F

2.2␮F

1␮F

C10

C11

*Cx1

*Cx2

1␮F

0.022␮F

10n F

15␮H

10␮H

CDRH127B-OWZ9

6001

C&D Te ch n o lo g ie s Lo w Pro file SMT

(NCL)

2785044447

Fa irRite

S MT Fe rrite Be a d

* see Optimising for Transient Response Section

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

4.5V -10VInput, 3.3V/ 4A Output, N Phase, High Efficiency Non-Synchronous Step

Dow n Converter 200kHz

V_CC

4.5-10.0V

IC1

C10

SHDN

LB_SET

LBF

V_DRIVE

Shut Down

V_OUT

3.3V 4A

R_SENSE

C11

Bootstrap

R_SENSE+

Low input flag

_B16

Delay

Decoup

R_SENSE

V_F

C_T^INT

Com p

PWR

C_IN

G_ND

C_OUT

100

=5V

=10V

Efficiency v I_OUT

V_OUT=3.3V.

ZXRD1033NQ16

0.1

(A)

OUT

100

=7V

=10V

Efficiency v I_OUT

V_OUT=5V.

ZXRD1050NQ16

0.1

(A)

OUT

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Re f

IC1

V_IN>7V

V_IN<7V

Va lu e

Pa rt Nu m b e r

Ma n u fa ct u re r

Ze te x

Co m m e n t s

ZXRD1033NQ16

QS OP16 Co n tro lle r IC

Ze te x

MS OP8 Lo w R_{DS (ON)}

ZXM64N03X

ZXM64N02X

MOS FET

30V V_DS

20V V_DS

5A 0.5V V_F

10m A 0.4V V_F

100k

50WQ04FN

BAT54

Ze te x

S ch o ttky Dio d e 5A

S OT23 Sch o ttky Dio d e

0805 S ize

Ze te x

BAT54

Ze te x

WCR0805-100k

WCR0805-680

WCR0805-24k

WCR0805-3k

WCR0805-10k

WCR0805-2.7k

LR1206R010

We lw yn /IRC

680⍀

0805 S ize

24k

0805 S ize

*R3

0805 S ize

10k

0805 S ize

*Rx

R_{S ENS E}

2.7K

0805 S ize

0.01⍀

Current Lim it Sense Resistor

C_IN

68␮F

TPSC68M02R0150

20SA68M

20SV68M

AVX

S a n yo OS-CON

68␮F 25V ’E’ lo w ESR

68␮F 20V PTH lo w ES R

68␮F 20V SMT lo w ES R

C_OUT

470␮F

*150␮F

*120␮F

TPSE477M010R0200 AVX

470␮F 10V ’E’ lo w ES R

150␮F 6V PTH lo w ES R

120␮f 6V SMT lo w ES R

6SA150M

6SV120M

S a n yo OS-CON

C_OUT

680␮F x 2

1␮F

6CV680GX

S a n yo

680␮F 6V SMT Bulk Capacitor

1µF,10V.X7R Die le ctric

1µF,4V.X7R Die le ctric

330p F,4V.X7R Die le ctric

1µF,10V.X7R Die le ctric

1µF,4V.X7R Die le ctric

22µF,4V.X7R Die le ctric

2.2µF,10V.X7R Die le ctric

1µF,10V.X7R Die le ctric

0.022µF,4V.X7R Die le ctric

10n F,10V.X7R Die le ctric

Ge n e ric

1␮F

330p F

1␮F

22␮F

2.2␮F

1␮F

C10

C11

*Cx1

*Cx2

1␮F

0.022␮F

10n F

15␮H

CDRH127-150MC

DP5022P-153

S u m id a

Co ilcra ft

Lo w Pro file SMT

* see Optimising for Transient Response Section

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

5V -18V Input, 5V/ 3A Output, P Phase, High Efficiency Sim pleSync

Converter 200kHz

V_CC

5V-18V

IC1

Shut Down

SHDN

LB_SET

LBF

V_DRIVE

Bootstrap

R_SENSE+

V_OUT

5.0V 3A

R_SENSE

Low input flag

Delay

Decoup

R_SENSE

V_F

Com p

PWR

G_ND

C_T^INT

C_IN

G_ND

C_OUT

C2 C3 C4

100

=5V

=12V

Efficiency v I_OUT

V_OUT=3.3V.

ZXRD1033PQ16

0.1

(A)

OUT

100

=7V

=12V

Efficiency v I_OUT

V_OUT=5V.

ZXRD1050PQ16

0.1

(A)

OUT

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Re f

IC1

V_IN>12V

V_IN<12V

Va lu e

Pa rt Nu m b e r

Ma n u fa ct u re r

Ze te x

Co m m e n t s

ZXRD1050PQ16

QS OP16 Co n tro lle r IC

Ze te x

MS OP8 Lo w R_{DS (ON)}

ZXM64P03X

ZXM64P02X

MOS FET

30V V_DS

20V V_DS

ZXM64NO3X

ZHCS 1000

Ze te x

MSOP8 Low R_DS(ON)MOSFET

S ch o ttky Dio d e 1A

0805 S ize

1A 0.5V V_F

100k

Ze te x

WCR0805-100k

WCR0805-680

WCR0805-24k

WCR0805-3k

WCR0805-2.7k

LR1206R015

We lw yn /IRC

680⍀

24k

0805 S ize

*R3

*Rx

R_{S ENS E}

0805 S ize

2.7K

0805 S ize

0.015⍀

Current Lim it Sense Resistor

C_IN

68␮F

TPSV686M025R0150 AVX

68␮F 25V ’E’ lo w ESR

68␮F 20V PTH lo w ES R

68␮F 20V SMT lo w ES R

20SA68M

20SV68M

S a n yo OS-CON

C_OUT

470␮F

*150␮F

*120␮F

TPSE477M010R0200 AVX

470␮F 10V ’E’ lo w ES R

150␮F 6V PTH lo w ES R

120␮f 6V SMT lo w ES R

6SA150M

6SV120M

S a n yo OS-CON

C_OUT

680␮F x 2

1␮F

6CV680GX

S a n yo

680␮F 6V SMT Bulk Capacitor

1µF,20V.X7R Die le ctric

1µF,4V.X7R Die le ctric

330p F,4V.X7R Die le ctric

1µF,20V.X7R Die le ctric

1µF,4V.X7R Die le ctric

22µF,4V.X7R Die le ctric

2.2µF,20V.X7R Die le ctric

1µF,20V.X7R Die le ctric

0.022µF,4V.X7R Die le ctric

10n F,20V.X7R Die le ctric

Lo w Pro file SMT

Ge n e ric

S u m id a

1␮F

330p F

1␮F

22␮F

2.2␮F

1␮F

*Cx1

*Cx2

0.022␮F

10n F

15␮H

10␮H

CDRH127B-OWZ9

6001

C&D Te ch n o lo g ie s Lo w Pro file SMT

(NCL)

2785044447

Fa irRite

S MT Fe rrite Be a d

* see Optimising for Transient Response Section

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

5V -18V Input, 5V/ 3A Output, P Phase, High Efficiency Non-synchronous Step Dow n

Converter 200kHz

V_CC

5.0-18V

IC1

Shut Down

SHDN

LB_SET

LBF

V_DRIVE

V_OUT

5.0V 3A

R_SENSE

Bootstrap

R_SENSE+

Low input flag

Delay

Decoup

R_SENSE

V_F

Com p

PWR

G_ND

C_T^INT

C_IN

G_ND

C_OUT

C2 C3

100

=5V

=12V

Efficiency v I_OUT

V_OUT=3.3V.

ZXRD1033PQ16

0.1

(A)

OUT

100

=7V

=12V

Efficiency v I_OUT

V_OUT=5V.

ZXRD1050PQ16

0.1

(A)

OUT

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Re f

IC1

V_IN>12V

V_IN<12V

Va lu e

Pa rt Nu m b e r

Ma n u fa ct u re r

Ze te x

Co m m e n t s

ZXRD1050PQ16

QS OP16 Co n tro lle r IC

MS OP8 Lo w R_{DS (ON)}

Ze te x

ZXM64P03X

ZXM64P02X

MOS FET

30V V_DS

20V V_DS

5A 0.5V V_F

100k

50WQ04FN

S ch o ttky Dio d e 5A

0805 S ize

WCR0805-100k

WCR0805-680

WCR0805-24k

WCR0805-3k

WCR0805-2.7k

LR1206R015

We lw yn /IRC

680⍀

24k

0805 S ize

*R3

*Rx

R_{S ENS E}

0805 S ize

2.7k

0805 S ize

0.015⍀

Current Lim it Sense Resistor

C_IN

68␮F

TPS V686M025R0150 AVX

68␮F 25V ’E’ lo w ESR

68␮F 20V PTH lo w ES R

68␮F 20V SMT lo w ES R

20S A68M

20S V68M

S a n yo OS-CON

C_OUT

470␮F

*150␮F

*120␮F

TPSE477M010R0200 AVX

470␮F 10V ’E’ lo w ES R

150␮F 6V PTH lo w ES R

120␮f 6V SMT lo w ES R

6SA150M

6SV120M

S a n yo OS-CON

C_OUT

680␮F x 2

1␮F

6CV680GX

S a n yo

680␮F 6V SMT Bulk Capacitor

1µF,20V.X7R Die le ctric

1µF,4V.X7R Die le ctric

330p F,4V.X7R Die le ctric

1µF,20V.X7R Die le ctric

1µF,4V.X7R Die le ctric

22µF,4V.X7R Die le ctric

2.2µF,20V.X7R Die le ctric

1µF,20V.X7R Die le ctric

0.022µF,4V.X7R Die le ctric

10n F,20V.X7R Die le ctric

Ge n e ric

1␮F

330p F

1␮F

22␮F

2.2␮F

1␮F

*Cx1

*Cx2

0.022␮F

10n F

15␮H

CDRH127-150MC

D05022P-153

S u m id a S MT

Co ilcra ft

Lo w Pro file SMT

* see Optimising for Transient Response Section

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Designing w ith the ZXRD and Dynam ic

Perform ance

Startup

This section refers to the reference design for the 3.3V,

4A output N channel synchronous converter. This is

as shown previously in the Optimising for transient

response section of the applications information (page

10). This circuit is also representative of the ZXRD

evaluation board (see ordering inform ation).

Startup is always im portant in DC-DC converter

applications. Magnetics have large inrush current

requirements. For higher current applications using

large input and output capacitors the startup current can

be quite significant. This can cause several problems.

In many applications the power supply to the DC-DC

converter can be affected. Particularly in battery

powered applications, trying to take large steps in

load current out of the supply can result in either

current limitation (by the internal im pedance of the

battery), or it can actually dam age the battery.

The ZXRD series has been designed to give the best

in terms of all round flexibility allowing engineers to

either use the reference design as is, or to tailor the

design to the individual requirements. This section

demonstrates the perform ance features of the ZXRD

series and its associated components.

For the converter itself, large changes in load current

can result in false triggering of the RSENSE circuit. This

could result in device hiccup (see applications section).

Efficiency

Efficiency is often quoted as one of the key param eters

of a DC-DC converter. Not only does it give an

instantaneous idea of heat dissipation, but also an idea

as to the extent battery life can be extended in say

portable applications. Fig.1 shows the efficiency of the

standard application circuit. Efficiency vs Output

current is shown for the 5 to 3.3V configuration.

Th e ZXRD p ro g ra m m a b le s o ft s ta rt fu n ctio n

elim inates both these problem s. This is very clear to

see in operation if the m ain switching waveform s are

exam ined.

The soft start is programmed by the combination of

resistor and capacitor R3 and C7. As a recommendation,

R3 and C7 are set to 3k and 22µF respectively, which limits

the peak startup current appropriately in the reference

circuit. Fig.2 shows the startup waveforms. V_INand V_OUT

are plotted against time

100

=5V

Efficiency v I_OUT

V_OUT=3.3V.

0.1

(A)

OUT

Fig.1. 5-3.3V Efficiency to 4A

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Output Voltage Ripple

Output voltage ripple is shown in Fig.4 and Fig. 5

for load currents of 0.5A and 4A respectively.

Output voltage ripple will be dependant, to a very

large extent, on the output capacitor ESR. (see

Applications Section for ripple calculation).

Fig.2. Startup Waveform for 3.3V output .

Sim pleSync

and Shoot-Through

Steady state operation under constant load gives

a n e xce lle n t in d ica tio n o f th e ZXRD se rie s

perform ance and also dem onstrates how well

SimpleSync^TMw o r ks . Th e S im p le S y n c_TM

technique drives the synchronous MOSFET gate

using the overwinding on the m ain inductor. It

also uses the high speed suppression characteristics

of the ferrite bead to prevent shoot through

currents. Fig.3 shows the gate waveform s for the

m ain and synchronous MOSFET devices (Zetex

ZXM64N02X).

Fig.4 0.5A Main & V_OUTWaveform s

Fig.5 4A Main & V_OUTWaveforms

Fig3. Main & Synchronous gate w aveform s

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Line regulation

Transient Response

Variation in input voltage for both these conditions

(0.5A a n d 4A o u tp u t) sh ow s the e xce lle n t line

regulation the ZXRD. Fig.6 shows that with 0.5A and

4A output currents, applying an increase in input

voltage from 5V to 10V , results in only small changes

in output regulation.

Transient response to changes in load is becom ing an

increasingly critical feature of many converter circuits.

Many high speed processors m ake very large step

changes in their load requirem ents, at the same time

as having m ore stringent specifications in term s of

overshoot and undershoot. Fig.7 dem onstrates the

excellent load transient performance of the ZXRD

series. A step change using an electronic load from 1A

to 3A is shown with corresponding output transient

perform ance.

Fig.6a Line Regulation 0.5A load

Fig.6b Line Regulation 4A load

Fig.7 Output Transient Response

Non-synchronous Applications

One of the key features of the ZXRD series, when

combined with the SimpleSync^TMtechnique, is the

flexibility in allowing engineers to choose either a

synchronous or non-synchronous architecture.

Making the design non-synchronous by removing

MOSFET N2 (the synchronous device), replacing the

ZHCS1000 with a high current diode (50WQ04FN)

and using a 2 term inal inductor, such as the Sumida

CDRH127-150MC, decreases cost slightly at the

expense of a few efficiency points. Fig.8 shows the

effect on the efficiency of the 5 to 3.3V 4A application

when the design is made non-synchronous.

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

100

=5V

Efficiency v I_OUT

V_OUT=3.3V.

0.1

(A)

OUT

Fig.8 Efficiency for non-synchronous 5-3.3V conversion

Using ’P’ Channel Devices (No Bootstrap)

All th e p re ce e d in g e xa m ple s utilise N ch a nn e l

MOSFET devices and a bootstrap circuit to provide full

enhancement to the high side device. These circuits

If the sam e package size MOSFET devices are used, it

is likely a higher on resistance will be encountered,

with the result that efficiency will decline slightly.

Fig 9 s h o w s th e e fficie n cy p lo t fo r a P p ha se

s y n c h r o n o u s 5 V c o n v e r t e r b a s e d o n t h e

ZXRD1050PQ16. The figure charts efficiency v output

current at 12V input and 7V input.

h a ve

a m a xim u m in p u t vo lt a g e o f 10V. Fo r

applications requiring a higher input voltage, using P

channel devices for the main MOSFET will allow up to

18V operation. Typically this m ay be in a 12V to 5V

converter circuit.

100

=7V

=12V

Efficiency v I_OUT

V_OUT=5V.

0.1

(A)

OUT

Fig.9 ’P’ Channel Device Efficiency (synchronous)

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

ZXCM6 Series

Low voltage MOSFETs

Unique structure gives optim um perform ance for sw itching applications.

N channel devices offer high efficiency

perform ance for sw itching applications.

Th is fa m ily o f MOS FETs fro m Ze te x o ffe rs a

com bination of low on-resistance and low gate charge,

providing optim um perform ance and high efficiency

for switching applications such as DC - DC conversion.

P channel MOSFETs excel in load

sw itching applications.

Th e P-ch a n n e l MOS FETs o ffe r h ig h ly e fficie n t

p e rfo rm a n ce fo r lo w v o lta g e lo a d s w itch in g

applications. This helps increase battery life in portable

equipm ent.

Minim um threshold voltage is low, only 0.7V or 1V,

e n a b lin g t h e M O S FETs t o p r o v id e o p t im u m

perform ance from a low voltage source. To ensure the

device suitability for low voltage applications, drain to

source voltage is specified at 20V or 30V.

On resistance is low across the fam ily, from only 40mΩ

(m ax) for the ZXM64N02X part up to 180m Ω (m ax) for

the ZXM61N02F. This m eans that on-state losses are

m inim ised, im proving efficiency in low frequency drive

a pplica tions. Threshold voltage s of 0.7V and 1V

m inim um allow the MOSFETs to be driven from low

voltage sources.

To m inim ise on-state losses, and improve efficiency in

in low frequency drive applications, the on-resistance

(R_DS(ON)) is low across the range. For exam ple, the

ZXM64P03X has an R_DS(ON)of only 100mΩ at a gate to

source voltage of 4.5V.

To minimise switching losses, and hence increase the

efficiency of high frequency operation, gate charge (Qg)

is sm all. The m axim um Qg varies from 3.4nC to 16nC

depending on which device is chosen. C_rss(Miller

capacitance) is also low, e.g. typically 30pF for the

ZXM6203E6 device. This results in better efficiency in

high frequency applications.

Gate source charge is also low, easing requirements for

the gate driver. Maxim um values range from 0.62nC for

the ZXM61P03F, up to 9nC for the ZXM64P03X.

Sm all outline surface m ount packaging

The products have been designed to optimise the

perform ance of a range of packages. The parts are

offered in SOT23, SOT23-6 and MSOP8 packages. The

MSOP8 enables single or dual devices to be offered.

The MSOP8 is also half the size of com petitive SO8

devices and 20% smaller than TSSOP8 alternatives.

Product perform ance

The following perform ance characteristics show the

ca p a b ilitie s o f th e ZXM64N02X. Th is d e vice is

recom mended for use with certain configurations of

the ZXRD DCDC controller circuit.

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Perform ance Characterisation of ZXM64N02X

ELECTRICAL CHARACTERISTICS (at T

= 25°C unless otherwise stated).

am b

PARAMETER

S YMBOL MIN.

TYP.

MAX. UNIT CONDITIONS .

STATIC

Dra in -S o u rce Bre a kd o w n Vo lta g e

Ze ro Ga te Vo lta g e Dra in Cu rre n t

Ga te -Bo d y Le a ka g e

V_{(BR)DS S}20

I_{DS S}

I_D=250µA, V_GS=0V

V_DS=20V, V_GS=0V

µA

n A

I_{GS S}

100

_GS=± 12V,

V_DS=0V

Ga te -So u rce Th re sh o ld Vo lta g e

V_{GS (th )}

R_{DS (o n )}

g _fs

0.7

6.1

I_D=250µA, V_DS

V_GS

Sta tic Dra in -So u rce On -Sta te

Re sis ta n ce (1)

0.040

0.050

V_GS=4.5V, I_D=3.8A

V_GS=2.7V, I_D=1.9A

Ω

Fo rw a rd Tra n s co n d u cta n ce (3)

DYNAMIC (3)

V_DS=10V,I_D=1.9A

In p u t Ca p a cita n ce

Ou tp u t Ca p a cita n ce

Re ve rse Tra n s fe r Ca p a cita n ce

SWITCHING(2) (3)

Tu rn -On De la y Tim e

Ris e Tim e

C_{is s}

C_{o s s}

C_{rs s}

1100

350

p F

V_DS=15 V,

V_GS=0V, f=1MHz

100

t_{d (o n )}

t_r

t_{d (o ff)}

t_f

5.7

n s

9.6

n s

V_DD=10V, I_D=3.8A

R_G=6.2Ω, R_D=2.6Ω

(Re fe r to te s t

circu it)

Tu rn -Off De la y Tim e

Fa ll Tim e

28.3

11.6

n s

To ta l Ga te Ch a rg e

Ga te -So u rce Ch a rg e

Ga te Dra in Ch a rg e

Q_g

n C

V_DS=16V,V_GS=4.5V

, I_D=3.8A

(Re fe r to te s t

circu it)

Q_{g s}

Q_{g d}

3.5

5.4

SOURCE-DRAIN DIODE

Dio d e Fo rw a rd Vo lta g e (1)

V_{S D}

0.95

T_j=25°C, I_S=3.8A,

V_GS=0V

Re ve rse Re co ve ry Tim e (3)

Re ve rse Re co ve ry Ch a rg e (3)

t_rr

23.7

13.3

n s

T_j=25°C, I_F=3.8A,

d i/d t= 100A/µs

Q_rr

n C

(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% .

(2) Switching characteristics are independent of operating junction tem perature.

(3) For design aid only, not subject to production testing.

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

208221 b8066

GERMANY

ASIA

USA

Ze te x Gm b H

Mu n ich

Ze te x As ia

Ho n g Ko n g

Ze te x In c

Lo n g Is la n d NY

Ze te x PLC

Ch a d d e rto n ,

Old h a m

Zetex

(49) 894549490

(852) 2610 0611

(1) 631 543 7100

(44) 161 622 4444

h ttp ://w w w .ze te x.co m

Su m id a Ele ctric

USA (CHICAGO

He a d Office )

Ole Wo lf

Ele ctro n ics Ltd .

Sum ida

(852) 2880 6688

Ta iw a n Su m id a

Ele ctric

(886) 2762 2177

(1) 847 956-0666

(44) 1525 290755

h ttp ://w w w .ja p a n lin k.co m /su m id a /

Sch a ffn e r

Ele ctro n ik Gm b H

(49) 72156910

Fa ir Rite Asia Pte

Ltd Sin g a p o re

(65) 281 1969

J a p a n /Ko re a

Fa irRite Pro d u cts

Co rp

(1) 914 895 2055

S ch a ffn e r EMC Ltd

(44) 118 977 0070

FairRite

(81) 332255055

AVX Asia

Sin g a p o re

(65) 258 2833

AVX US A

(1) 843 448 9411

AVX UK

(44) 1252 770000

AVX

h ttp ://w w w .a vxco rp .co m

We lw yn

TTC Gro u p p lc

IRC In c

We lw yn

Co m p o n e n ts Ltd

(44) 1670 822181

Welw yn, IRC

Coilcraft

Ele ctro n ics Gm b H Sin g a p o re

(49)871 973760

(65) 536 51667

(1) 512 992 7900

h ttp ://w e lw yn -tt.co .u k

Co ilcra ft In c

(1) 847 639 6400

Co ilcra ft Eu ro p e

(44) 1236 730595

h ttp ://w w w .co ilcra ft.co m

Sa n yo Eu ro p e

Mu n ich

SANYO

Ele ctro n ics Ltd .

SANYO

S e m ico n UK Ltd

(44) 1279 422224

Sanyo Electronic

Com p. (OS-CON)

Ele ctro n ics Ltd .

Fo rre st City, AR

870 633 5030

Sa n Die g o , CA

619 661 6835

Ro ch e lle Pk, NJ

201 843 8100

(49) 89 457693 16 Ho n g Ko n g

(852) 21936888

Sin g a p o re

(65) 281 3226

J a p a n

(81) 720 70 6306

h ttp ://w w w .sa n yo vid e o .co m

Co n ta ct

C & D

Te ch n o lo g ie s

(NCL)

C & D

Te ch n o lo g ie s

(NCL)

5816 Cre e d m o o r

Ro a d ,

Ra le ig h

No rth Ca ro lin a

27612

(1) 919 571 9405

C & D

Te ch n o lo g ie s

(NCL)

C & D Technologies

(NCL)

Te ch n o lo g ie s

Gu a n g zh o u ,

Gu a n g d o n g , PRC

(86) 208221 8066

Ta n n e rs Drive

Bla ke la n d s No rth

Milto n Ke yn e s

MK14 5BU

(44) 1908 615232

h ttp ://w w w .d c-d c.co m

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Connection Diagram

Note:

Bootstrap

Connection diagram is the sam e for N and P Phase, adjustable and

fixed controllers. The V_FBpin has a different function between

adjustable and fixed versions.

Com p

Delay

DRIVE

PWRG

SET

INT

LBF

Decoup

SHDN

SENSE +

SENSE -

Package Dim ensions

IDENTIFICATION

RECESS

FOR PIN 1

PIN No.1

DIM

Millim e tre s

MIN

In ch e s

MAX

4.98

MIN

MAX

0.196

4.80

0.189

0.025 NOM

0.007

0.008

0.15

0.635

0.177

0.20

0.267

0.30

3.99

1.75

0.25

6.20

8°

0.011

0.012

0.157

0.069

0.01

3.81

1.35

0.053

0.004

0.228

0°

0.10

5.79

0.244

8°

0°

ISSUE 4 - OCTOBER 2000

ZXRD1000 SERIES

Ordering Inform ation

Device

Description

T&R Suffix

Partmarking

ZXRD1033NQ16

3.3V Fixe d co n tro lle r N m a in sw itch

TA, TC

ZXRD1033N

ZXRD1050NQ16

5.0V Fixe d co n tro lle r N m a in sw itch

TA, TC

ZXRD1050N

ZXRD100AN

ZXRD1033P

ZXRD1050P

ZXRD100AP

ZXRD100ANQ16 Ad ju s ta b le co n tro lle r N m a in s w itch

ZXRD1033PQ16

ZXRD1050PQ16

ZXRD100APQ16

3.3V Fixe d co n tro lle r P m a in sw itch

5.0V Fixe d co n tro lle r P m a in sw itch

Ad ju s ta b le co n tro lle r P m a in s w itch

’N main switch’ indicates controller for use with N channel main switch elem ent.

’P main switch’ indicates controller for use with P channel m ain switch element.

TA= Tape and Reel quantity of 500

TC= Tape and Reel quantity of 2500

Dem onstration Boards

These can be requested through your local Zetex office or representative. These boards can be tailored to your

specific needs. If you would like to obtain a demo board then a request form is available to help determine your

exact requirem ent.

Zetex plc.

Fields New Road, Chadderton, Oldham, OL9-8NP, United Kingdom.

Telephone: (44)161 622 4422 (Sales), (44)161 622 4444 (General Enquiries)

Fax: (44)161 622 4420

Zetex GmbH

Zetex Inc.

Zetex (Asia) Ltd.

3701-04 Metroplaza, Tower 1

Hing Fong Road,

Kwai Fong, Hong Kong

Telephone:(852) 26100 611

Fax: (852) 24250 494

These are supported by

agents and distributors in

major countries world-wide

Zetex plc 2001

Streitfeldstraße 19

D-81673 München

Germany

Telefon: (49) 89 45 49 49 0

Fax: (49) 89 45 49 49 49

47 Mall Drive, Unit 4

Commack NY 11725

USA

Telephone: (631) 543-7100

Fax: (631) 864-7630

http://www.zetex.com

This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any

purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves the

right to alter without notice the specification, design, price or conditions of supply of any product or service.

ISSUE 4 - OCTOBER 2000

ZXRD1033NQ16 [ZETEX]

相关型号：

ZXRD1033NQ16TA

ZXRD1033NQ16TC

ZXRD1033PQ16

ZXRD1033PQ16

ZXRD1033PQ16TA

ZXRD1033PQ16TC

ZXRD1050NQ16

ZXRD1050NQ16

ZXRD1050NQ16TA

ZXRD1050NQ16TC

ZXRD1050NQ16TC

ZXRD1050PQ16