Z86743 [ZILOG]

CMOS Z8 OTP Microcontrollers; CMOS Z8 OTP微控制器
Z86743
型号: Z86743
厂家: ZILOG, INC.    ZILOG, INC.
描述:

CMOS Z8 OTP Microcontrollers
CMOS Z8 OTP微控制器

微控制器
文件: 总10页 (文件大小:46K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION  
1
Z86E33/733/E34  
Z86E43/743/E44  
1
®
CMOS Z8 OTP MICROCONTROLLERS  
FEATURES  
Programmable Crystal Oscillator, EPROM Protect,  
RAM Protect, Auto Latch Disable, Permanent WDT,  
32 KHz Oscillator, and EPROM /Test Mode Disable  
ROM  
(KBytes)  
RAM*  
(Bytes)  
I/O  
Lines  
Speed  
(MHz)  
Device  
Z86E33  
Z86733  
Z86E34  
Z86E43  
Z86743  
Z86E44  
4
8
237  
237  
237  
236  
236  
236  
24  
24  
24  
32  
32  
32  
16  
16  
16  
16  
16  
16  
Fast Instruction Pointer: 0.6µs  
16  
4
Two Standby Modes: STOP and HALT  
24/32 Input and Output Lines  
8
16  
Digital Inputs CMOS Levels, Schmitt-Triggered  
Software Programmable Low EMI Mode  
Note: *General-Purpose  
Standard Temperature (V = 3.5V to 5.5V)  
CC  
Two Programmable 8-Bit Counter/Timers Each with a 6-  
Extended Temperature (V = 4.5V to 5.5V)  
CC  
Bit Programmable Prescaler  
28-Pin DIP/SOIC/PLCC Packages (E33/733/E34)  
40-Pin DIP Package (E43/743/E44)  
Six Vectored, Priority Interrupts from Six Different  
Sources  
44-Pin PLCC/QFP Packages (E43/743/E44)  
Auto Latches  
Software Enabled Watch-Dog Timer (WDT)  
Auto Power-On Reset (POR)  
Two Comparators  
Push-Pull/Open-Drain Programmable on  
Port 0, Port 1, and Port 2  
Low-Power Consumption: 60 mW  
On-Chip Oscillator that Accepts a Crystal, Ceramic  
Resonator, LC, RC, or External Clock Drive  
GENERAL DESCRIPTION  
The Z86E33/733/E34/E43/743/E44 8-bit CMOS One-Time  
Programmable (OTP) microcontrollers are members of  
Zilog's Z8 single-chip microcontroller family featuring en-  
hanced wake-up circuitry, programmable Watch-Dog Tim-  
ers, Low Noise EMI options, and easy hardware/software  
system expansion capability.  
For applications demanding powerful I/O capabilities, the  
Z86E33/733/E34 have 24 pins and the Z86E43/743/E44  
have 32 pins of dedicated input and output. These lines are  
grouped into four ports, eight lines per port, and are config-  
urable under software control to provide timing, status sig-  
nals, and parallel I/O with or without handshake, and ad-  
dress/data bus for interfacing external memory.  
®
Four basic address spaces support a wide range of mem-  
ory configurations. The designer has easy access to regis-  
ter mapped peripheral and I/O circuits.  
Notes: All Signals with a preceding front slash, "/", are  
active Low, e.g., B//W (WORD is active Low); /B/W (BYTE  
is active Low, only).  
CP97DZ83300  
P R E L I M I N A R Y  
1
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
Power connections follow conventional descriptions be-  
low:  
Connection  
Power  
Circuit  
Device  
V
V
DD  
CC  
Ground  
GND  
V
SS  
(E43/743/E44)  
VCC  
XTAL /AS /DS R//W /RESET  
Output Input  
GND  
Machine Timing  
&
Port 3  
Instruction Control  
RESET  
WDT, POR  
Counter/  
Timers (2)  
ALU  
FLAGS  
Interrupt  
Control  
OTP  
Register  
Pointer  
Two Analog  
Comparators  
Program  
Counter  
Register File  
Port 2  
Port 0  
Port 1  
8
4
4
I/O  
(Bit Programmable)  
Address or I/O  
(Nibble Programmable)  
Address/Data or I/O  
(Byte Programmable)  
(E43/743/E44 Only)  
Figure 1. Functional Block Diagram  
2
P R E L I M I N A R Y  
CP97DZ83300  
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
PIN IDENTIFICATION  
Table 1. 40-Pin DIP Pin Identification  
Standard Mode  
1
1
R//W  
P25  
P26  
P27  
P04  
P05  
P06  
P14  
P15  
40  
/DS  
Pin #  
Symbol  
R//W  
Function  
Direction  
Output  
P24  
P23  
P22  
P21  
P20  
P03  
P13  
P12  
GND  
P02  
P11  
P10  
P01  
P00  
P30  
P36  
P37  
P35  
/RESET  
1
Read/Write  
2-4  
5-7  
8-9  
10  
P25-P27  
P04-P06  
P14-P15  
P07  
Port 2, Pins 5,6,7 In/Output  
Port 0, Pins 4,5,6 In/Output  
Port 1, Pins 4,5 In/Output  
Port 0, Pin 7  
In/Output  
11  
V
Power Supply  
CC  
P07  
VCC  
P16  
12-13 P16-P17  
Port 1, Pins 6,7 In/Output  
Crystal Oscillator Output  
Crystal Oscillator Input  
Port 3, Pins 1,2,3 Input  
DIP  
14  
15  
XTAL2  
XTAL1  
P17  
16-18 P31-P33  
XTAL2  
XTAL1  
P31  
19  
20  
21  
22  
23  
24  
25  
P34  
Port 3, Pin 4  
Output  
/AS  
Address Strobe Output  
P32  
P33  
P34  
/AS  
/RESET  
P35  
Reset  
Input  
Port 3, Pin 5  
Port 3, Pin 7  
Port 3, Pin 6  
Port 3, Pin 0  
Output  
Output  
Output  
Input  
P37  
20  
21  
P36  
P30  
Figure 2. 40-Pin DIP Pin Configuration  
Standard Mode  
26-27 P00-P01  
28-29 P10-P11  
Port 0, Pins 0,1 In/Output  
Port 1, Pins 0,1 In/Output  
30  
31  
P02  
Port 0, Pin 2  
Ground  
In/Output  
GND  
32-33 P12-P13  
34 P03  
35-39 P20-P24  
Port 1, Pins 2,3 In/Output  
Port 0, Pin 3  
In/Output  
In/Output  
Port 2, Pins  
0,1,2,3,4  
40  
DS  
Data Strobe  
Output  
Notes:  
Pin Configuration and Identification identical on DIP  
and Cerdip Window Lid style packages.  
CP97DZ83300  
P R E L I M I N A R Y  
3
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
6
1
40  
39  
7
P21  
P22  
P23  
P24  
/DS  
NC  
R//W  
P25  
P26  
P27  
P04  
P30  
P36  
P37  
P35  
/RESET  
R//RL  
/AS  
P34  
P33  
PLCC 44 - Pin  
P32  
P31  
17  
29  
28  
18  
Figure 3. 44-Pin PLCC Pin Configuration  
Standard Mode  
Table 2. 44-Pin PLCC Pin Identification  
Table 2. 44-Pin PLCC Pin Identification  
Pin #  
Symbol  
Function  
Direction  
Pin #  
Symbol  
Function  
Direction  
1-2  
3-4  
5
GND  
Ground  
33  
34  
/AS  
Address Strobe Output  
P12-P13  
P03  
Port 1, Pins 2,3 In/Output  
R//RL  
ROM/ROMless Input  
select  
Port 0, Pin 3  
In/Output  
In/Output  
6-10  
P20-P24  
Port 2, Pins  
0,1,2,3,4  
35  
36  
37  
38  
39  
/RESET  
P35  
Reset  
Input  
Port 3, Pin 5  
Port 3, Pin 7  
Port 3, Pin 6  
Port 3, Pin 0  
Output  
Output  
Output  
Input  
11  
12  
13  
/DS  
NC  
Data Strobe  
No Connection  
Read/Write  
Output  
P37  
P36  
R//W  
Output  
P30  
14-16 P25-P27  
17-19 P04-P06  
20-21 P14-P05  
Port 2, Pins 5,6,7In/Output  
Port 0, Pins 4,5,6In/Output  
Port 1, Pins 4,5 In/Output  
40-41 P00-P01  
42-43 P10-P11  
Port 0, Pins 0,1 In/Output  
Port 1, Pins 0,1 In/Output  
44  
P02  
Port 0, Pin 2  
In/Output  
22  
P07  
Port 0, Pin 7  
In/Output  
23-24 VCC  
Power Supply  
25-26 P16-P17  
Port 1, Pins 6,7 In/Output  
Crystal OscillatorOutput  
Crystal OscillatorInput  
Port 3, Pins 1,2,3Input  
27  
28  
XTAL2  
XTAL1  
29-31 P31-P33  
32 P34  
Port 3, Pin 4  
Output  
4
P R E L I M I N A R Y  
CP97DZ83300  
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
1
33  
23  
22  
P21  
P22  
P23  
P24  
/DS  
NC  
R//W  
P25  
P26  
P27  
P04  
34  
P30  
P36  
P37  
P35  
/RESET  
R//RL  
/AS  
P34  
P33  
P32  
P31  
QFP 44 - Pin  
12  
11  
44  
1
Figure 4. 44-Pin QFP Pin Configuration  
Standard Mode  
Table 3. 44-Pin QFP Pin Identification  
Table 3. 44-Pin QFP Pin Identification  
Pin # Symbol Function Direction  
Pin # Symbol Function  
Direction  
1-2  
3-4  
5
P05-P06 Port 0, Pins 5,6  
P14-P05 Port 1, Pins 4,5  
In/Output  
In/Output  
In/Output  
27  
P02  
Port 0, Pin 2  
Ground  
In/Output  
28-29 GND  
P07  
Port 0, Pin 7  
30-31 P12-P13 Port 1, Pins 2,3  
32 P03 Port 0, Pin 3  
33-37 P20-4  
In/Output  
In/Output  
6-7  
8-9  
10  
11  
VCC  
Power Supply  
P16-P17 Port 1, Pins 6,7  
XTAL2 Crystal Oscillator  
XTAL1 Crystal Oscillator  
In/Output  
Output  
Input  
Port 2, Pins 0,1,2,3,4 In/Output  
38  
39  
40  
/DS  
NC  
Data Strobe  
No Connection  
Read/Write  
Output  
12-14 P31-P13 Port 3, Pins 1,2,3  
Input  
R//W  
Output  
15  
16  
17  
18  
19  
20  
21  
22  
P34  
Port 3, Pin 4  
Output  
Output  
41-43 P25-P27 Port 2, Pins 5,6,7  
44 P04 Port 0, Pin 4  
In/Output  
In/Output  
/AS  
Address Strobe  
R//RL  
ROM/ROMless select Input  
/RESET Reset  
Input  
P35  
P37  
P36  
P30  
Port 3, Pin 5  
Output  
Output  
Output  
Input  
Port 3, Pin 7  
Port 3, Pin 6  
Port 3, Pin 0  
23-24 P00-P01 Port 0, Pins 0,1  
25-26 P10-P11 Port 1, Pins 0,1  
In/Output  
In/Output  
CP97DZ83300  
P R E L I M I N A R Y  
5
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
1
P25  
P26  
P27  
P04  
P05  
15  
P24  
P23  
P22  
P21  
P20  
P03  
VSS  
P02  
P01  
P00  
P30  
P36  
P37  
P35  
4
26  
25  
1
P06  
P07  
5
XPX0X5  
P06  
P07  
VCC
XT2  
XT1  
P31  
PXX21X  
P20
P03
VSS  
P02
P01
P00
DIP 28 - Pin  
VCC  
XTAL2  
XTAL1  
P31  
PLCC 28 - Pin  
P32  
P33  
P34  
11  
19  
18  
12  
14  
28  
Figure 5. Standard Mode  
28-Pin DIP/SOIC Pin Configuration  
Figure 6. Standard Mode  
28-Pin PLCC Pin Configuration  
Table 4. 28-Pin DIP/SOIC/PLCC  
Pin Identification  
Pin # Symbol  
Function  
Direction  
1-3  
4-7  
8
P25-P27  
P04-P07  
Port 2, Pins 5,6,7 In/Output  
Port 0, Pins 4,5,6,7 In/Output  
Power Supply  
V
CC  
9
XTAL2  
XTAL1  
Crystal Oscillator Output  
Crystal Oscillator Input  
Port 3, Pins 1,2,3 Input  
10  
11-13 P31-P33  
14-15 P34-P35  
Port 3, Pins 4,5  
Port 3, Pin 7  
Port 3, Pin 6  
Port 3, Pin 0  
Output  
Output  
Output  
Input  
16  
17  
18  
P37  
P36  
P30  
19-21 P00-P02  
Port 0, Pins 0,1,2 In/Output  
Ground  
22  
23  
V
SS  
P03  
Port 0, Pin 3  
In/Output  
In/Output  
24-28 P20-P24  
Port 2, Pins  
0,1,2,3,4  
Notes:  
Pin Identification and Configuration identical on DIP and  
Cerdip Window Lid style packages.  
6
P R E L I M I N A R Y  
CP97DZ83300  
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Min  
Max  
Units  
1
Ambient Temperature under Bias  
Storage Temperature  
–40  
–65  
+105  
+150  
+7  
C
C
V
Voltage on any Pin with Respect to V [Note 1]  
–0.6  
SS  
Voltage on V Pin with Respect to V  
–0.3  
–0.6  
+7  
V
V
DD  
SS  
Voltage on XTAL1 and /RESET Pins with Respect to V [Note 2]  
V
+1  
DD  
SS  
Total Power Dissipation  
1.21  
220  
W
Maximum Allowable Current out of V  
mA  
SS  
Maximum Allowable Current into V  
180  
mA  
DD  
Maximum Allowable Current into an Input Pin [Note 3]  
Maximum Allowable Current into an Open-Drain Pin [Note 4]  
Maximum Allowable Output Current Sinked by Any I/O Pin  
Maximum Allowable Output Current Sourced by Any I/O Pin  
–600  
–600  
+600  
+600  
25  
µA  
µA  
mA  
mA  
25  
Notes:  
1. This applies to all pins except XTAL pins and where otherwise noted.  
2. There is no input protection diode from pin to V  
.
DD  
3. This excludes XTAL pins.  
4. Device pin is not at an output Low state.  
Stresses greater than those listed under Absolute Maxi-  
mum Ratings may cause permanent damage to the de-  
vice. This is a stress rating only; functional operation of the  
device at any condition above those indicated in the oper-  
ational sections of these specifications is not implied. Ex-  
posure to absolute maximum rating conditions for an ex-  
tended period may affect device reliability.  
Total power dissipation should not exceed 1.2 W for the  
package. Power dissipation is calculated as follows:  
Total Power Dissipation = V x [ I – (sum of I ) ]  
DD  
DD  
OH  
+ sum of [ (V  
– V ) x I  
]
DD  
OH  
OH  
+ sum of (V x I )  
0L  
0L  
STANDARD TEST CONDITIONS  
The characteristics listed below apply for standard test  
conditions as noted. All voltages are referenced to  
Ground. Positive current flows into the referenced pin  
(Test Load).  
From Output  
Under Test  
150 pF  
Figure 7. Test Load Diagram  
CP97DZ83300  
P R E L I M I N A R Y  
7
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
CAPACITANCE  
T = 25°C, V = GND = 0V, f = 1.0 MHz; unmeasured pins returned to GND.  
A
CC  
Parameter  
Min  
Max  
Input capacitance  
Output capacitance  
I/O capacitance  
0
0
0
12 pF  
12 pF  
12 pF  
8
P R E L I M I N A R Y  
CP97DZ83300  
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
1
© 1997 by Zilog, Inc. All rights reserved. No part of this  
document may be copied or reproduced in any form or by  
any means without the prior written consent of Zilog, Inc.  
The information in this document is subject to change  
without notice. Devices sold by Zilog, Inc. are covered by  
warranty and patent indemnification provisions appearing  
in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc.  
makes no warranty, express, statutory, implied or by  
description, regarding the information set forth herein or  
regarding the freedom of the described devices from  
intellectual property infringement. Zilog, Inc. makes no  
warranty of merchantability or fitness for any purpose.  
Zilog, Inc. shall not be responsible for any errors that may  
appear in this document. Zilog, Inc. makes no commitment  
to update or keep current the information contained in this  
document.  
Zilog’s products are not authorized for use as critical  
components in life support devices or systems unless a  
specific written agreement pertaining to such intended use  
is executed between the customer and Zilog prior to use.  
Life support devices or systems are those which are  
intended for surgical implantation into the body, or which  
sustains life whose failure to perform, when properly used  
in accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in  
significant injury to the user.  
Zilog, Inc. 210 East Hacienda Ave.  
Campbell, CA 95008-6600  
Telephone (408) 370-8000  
FAX 408 370-8056  
Internet: http://www.zilog.com  
CP97DZ83300  
P R E L I M I N A R Y  
9
Z86E33/733/E34/E43/743/E44  
CMOS Z8® OTP Microcontrollers  
Zilog  
10  
P R E L I M I N A R Y  
CP97DZ83300  

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