Z89305 [ZILOG]
DIGITAL TELEVISION CONTROLLER; 数字电视控制器
| 型号： | Z89305 |
| 厂家： | 
ZILOG, INC. |
| 描述： | DIGITAL TELEVISION CONTROLLER |
| 文件： | 总8页 (文件大小：52K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
CUSTOMERPROCUREMENTSPECIFICATION
Z89303/05/07
DIGITALTELEVISIONCONTROLLER
GENERAL DESCRIPTION
The Z89303/05/07 Digital Television Controllers are
application-specific controllers designed to provide
complete audio and video control of television receivers,
video recorders, with advanced on-screen display facilities.
The Z89303/05/07 are 24K, 16K and 12K ROM versions in
52-pin SDIP packages. The powerful 12 MHz Z89C00
RISC processor core allows the user to control the on-
board peripheral functions and registers using the standard
processor instruction set.
Serial interfacing with the television tuner is provided
through the tuner serial port. Other serial devices, such as
digital channel tunning adjustments, may be accessed
through the industry standard I2C port.
Additional hardware provides the capability to display two
times normal size characters. The smoothing logic
contained in the on-screen display circuit improves the
appearance of larger fonts. Fringing circuitry can be
activated to improve the visibiity of text by surrounding the
character lines with a one-pixel border.
The extensive character attributes can be controlled in two
modes: by the on-screen display controller character
control mode for maximum display control flexibility, and
closed caption mode for optimum display of closed caption
text.
RGB outputs provide the direct video signals, and a
blanking output is provided to control the video multiplexor.
Dot clock and verticle line synchronization are normally
obtained from H_FLYBACK and V_FLYBACK, but can be
generated by the Z89303/05/047, and driven to the external
deflection unit through the bidirectional SYNC ports when
external video synchronization signals are not present.
Closed caption text can be decoded directly from the
composite video signal with the assistance of the
processor's digital signal processing capabilities and
displayed on the screen. The character representation in
this mode allows for a simple attribute control through the
insertion of control characters, and each word of RAM
specifies two displayed characters.
User control can be monitored through the keypad scanning
port, or the 16-bit remote control capture register. Receiver
functions such as color and volume can be directly
controlled by eight 8-bit pulse width modulated ports.
The character control mode provides access to the full set
of attribute controls. Each word of RAM specifies a single
displayed character and basic character attributes, allowing
the modification of attributes on a character-by-character
basis. The insertion of control characters permits direction
of other character attributes.
All nine PWM ports are available in the 52-pin package.
The Z89303/05/07 has two internal 12 MHz VCOs that are
referenced to a 32 KHz internal oscillator to provide the
system clock. In Sleep mode, the controller uses the 32
KHz clock for the system clock to reduce power
consumption. The processor can be suspended by placing
it into STOP mode when main power is not available for
minimal power consumption.
The fully customized 512 character set, formatted in two
256 character banks, can be displayed with a host of
display attributes that incude underlining, italics, blinking,
eight foreground/background colors, character position
offset delay, and background transparency. The 16-bit
display character representation allows the modification of
some key attributes on a character-by-character basis. A
character's pixel array is stored as a 16- or 18-word
representation in Character Graphics ROM (CGROM).
The ROM contents are referenced by a 16-bit word stored
in video RAM (VRAM) defining the character type and its
key attributes.
DC-4222-03
(10-10-94)
1
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
GENERAL DESCRIPTION (Continued)
PWM
Capture
IRIN
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM9
ADC
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
Port 17
Port 00
Port1
Port 0
Port 00
Port 01
Port 02
Port 03
Port 04
Port 05
Port 06
Port 07
Port 08
Port 09
Port 0A
Port 0B
Port 0C
Port 0D
Port 0E
Port 0F
Port 10
Port 11
Port 12
Port 13
Port 14
Port 15
Port 16
Port 17
Port 18
Port 19
Note: Shaded pin functions
not available on 40-pin device.
Control
XTAL1
XTAL2
LPF
HSYNC
VSYNC
/Reset
OSD
Register Addr/Data
V1
V2
V3
CPU
BLANK
Port0F
HALFBLNK
RAM
640 x 16
Address
ROM
ROM Addr
ROM Data
Note: Z89307
12K x 16
16K x 16
24K x 16
Data
has 12K words of ROM.
Z89305 has 16K words.
Z89302/03 has 24K words.
Functional Block Diagram
2
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
1
2
3
4
5
6
7
8
9
PWM8
52
51
50
PWM9
IRIN
PWM7
PWM6
PWM5
Port18/G<0>
Port19
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PWM4
PWM3
PWM2
PWM1
Port0E
Port00/ADC2
Port01/I2SSC
Port02/I2SSD
Port03
ADC5
CVI/ADC0
LPF
GND
10
11
Port04/ADC4
Z89303
Z89305
Z89307
12
13
14
15
16
17
18
19
20
XTAL2
Port05/ADC3
AN GND
Port06/Counter
52-Pin
Shrink
DIP
Port07/CSync
Port08/R<1>
Port09
XTAL1
AN VCC
/Reset
VCC
Port0F/HalfBlnk
Port17/ADC1
Blank
Port10/R<0>
Port11/I2MSC
Port12/I2MSD
V1
Port13/G<1>
Port14/B<0>
V2
V3
32
31
30
29
28
27
21
22
23
24
Port15/B<1>
Port16/SCLK
VSync
HSync
Port0D
Port0C
Port0A
Port0B
25
26
52-Pin Shrink DIP Configuration
3
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
PIN DESCRIPTIONS
Z89303/05/07
Pin
Name
Z89303/05/07
52-Pin
Configuration
Function
Direction
Reset
VCC
–
GND
–
+5 V
17,38
10,40
PWR
0 V
PWR
IRIN
Infrared Remote Capture Input
2
I
I
I
ADC[5:0]a
4-Bit Analog to Digital Converter 44,11,12,6,35,43
nAI
Inputb
PWM10,
PWM9
14-Bit Pulse Width Modulator
Output
–,1
OD
O
PWM[8:1]c
Port0[F:0]d
8-Bit Pulse Width Modulator
Output
Bit Programmable
Input/Output Ports
52,51,50,49,
48,47,46,45
36,5,28,27,26,25,
16,15,14,13,12,
11,9,8,7,6
OD
B
O
I
Port1[9:0]c
Bit Programmable
Input/Output Ports
4,3,35,24,23,22,
21,20,19,18
B
I
SCLf
SCDg
12C Clock I/O
12C Data I/O
7 or 19
8 or 20
BOD
BOD
XTAL1
XTAL2
Crystal Oscillator Input
Crystal Oscillator Output
39
41
AI
AO
I
O
LPF
HSYNC
Loop Filter
H_Sync
42
29
AB
B
O
I
VSYNC
V_Sync
30
B
I
/RESET
V[3:1]
Device Reset
37
I
I
OSD Video Output
31,32,33
O
O
(Typically Drive B, G, and R Outputs)
Blank OSD Blank Output
34
O
O
Half Blankh OSD Half Blank Output
RGB Digital R[1:0],G[1:0], and B[1:0]
36
23,22,21,
18,15,3
O
O
Outputsi
Outputs of the RGB Matrix
SCLKk
Internal Processor SCLK
24
O
4
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
V1, V2, V3 ANALOG OUTPUT
Specifications VCC = 5.25 V
VCC = 5.25 V
Condition
Limit
Output Voltage
Bit = 11
Bit = 10
4.55 V +/– 0.25 V
3.205V +/– 0.2 V
Bit = 01
Bit = 00
1.95 V +/– 0.15 V
0.65 V +/– 0.1 V
Settling Time
70% of DC Level, 10pf Load
< 50 nsec
V1, V2, V3 ANALOG OUTPUT
Specifications VCC = 4.75V
VCC = 4.75V
Condition
Limit
Output Voltage
Bit = 11
Bit = 10
3.90 V +/– 0.25 V
2.90 V +/– 0.2 V
Bit = 01
Bit = 00
1.90 V +/– 0.15 V
0.1 V +/– 0.1 V
Settling Time
70% of DC Level, 10pf Load
< 50 nsec
Z893XX
32K Oscillator Recommended Circuit
Notes:
c) PWM[8,7] is not available on the 40-pin DIP version.
d) Port0[F:A] is not available on the 40-pin DIP version.
e) Port19 is not available on the 40-pin DIP version.
f) SCL I/O pin is shared with Port0 or Port11.
g) SCD I/O pin is shared with Port02 or Port12.
h) Half Blank output is a function shared with Port0F.
Half Blank output is not available on the 40-pin DIP version.
i)
Digital RGB outputs and the internal SCLK are shared with Port1[5:0].
k) Internal processor SCLK is shared with Port16.
5
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Units
Conditions
VCC
Power Supply Voltage
Input Voltage
0
–0.3
7
V
V
V
VCC +0.3
Digital Inputs
ID
V
VO
VO
Input Voltage
Output Voltage
Output Voltage
–0.3
–0.3
–0.3
VCC +0.3
VCC +0.3
VCC +8.0
V
V
V
Analog Inputs (A/D0...A/D4)
All Push-Pull Digital Output
Open-Drain PWM Outputs
(PWM1...PWM8)
One Pin
All Pins
One Pin
All Pins
IA
IOH
IOH
IOL
IOL
Output Current High
Output Current High
Output Current Low
Output Current Low
–10
–100
20
mA
mA
mA
mA
200
TA
TA
Operating Temperature
Storage Temperature
0
–65
70
150
°C
°C
DC CHARACTERISTICS
TA = 0°C to + 70°C; VCC = 4.5 V to + 5.5 V; FOSC = 32.768 KHz
Symbol
Parameter
Min
Max
Typical
Units
Conditions
V
Input Voltage Low
Input Voltage High
0
0.2 VCC
VCC
0.4
3.6
V
V
IL
V
0.6 VCC
IH
VPU
VOL
VOL
Max. Pull-Up Voltage
Output Voltage Low
Output Voltage High
12
0.4
V
V
V
PWM0...PWM8 Only
@ IOL = 1 mA
@ IOL = 0.75 mA
0.16
4.75
VCC –0.9
VXL
VXH
VHY
IIR
Input Voltage XTAL1 Low
Input Voltage XTAL1 High
Schmitt Hysteresis
0.3 VCC
1.0
3.5
0.5
90
V
V
V
External Clock
Generator Driven
On XTAL1 Input Pin
VRL = 0 V
VCC –2.0
3.0
0.75
150
Reset Input Current
µA
I
ICC
Input Leakage
Supply Current
–3.0
3.0
100
700
0.01
60
300
µA
mA
µA
@ 0 V and VCC
IL
ICC1E Supply Current of the OTP
Sleep Mode @ 32 KHz
ICC1
ICC2
Supply Current
Supply Current
300
10
100
5
µA
µA
Sleep Mode @ 32 KHz
Sleep Mode
6
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
AC CHARACTERISTICS
TA = 0°C to + 70°C; VCC = 4.5 V to 5.5 V; FOSC = 32.768 KHz
Symbol
Parameter
Min
Max
Typical Units
TPC
TRC,TFC
Input Clock Period
Clock Input Rise and Fall
16
100
32
12
µS
µS
TDPOR
Power On Reset Delay
0.8
1.2
s
AC CHARACTERISTICS
TA = 0°C to + 70°C; VCC = 4.5 V to 5.5 V; FOSC = 32.768 KHz
Symbol
Parameter
Min
Max
Typical
Units
TWRES
TDHS
Power-On Reset Min. Width
H_Sync Incoming Signal Width
5TPC
12.5
µS
µS
5.5
11
TDVS
TDES
V_Sync Incoming Signal Width
Time Delay Between Leading Edge
of V_Sync and H_Sync in Even Field
0.15
–12
1.5
+12
1.0
0
mS
µS
TDOS
Time Delay Between Leading Edge
of H_Sync in Odd Field
H_Sync/V_Sync Edge Width
20
44
32
µS
µS
TWHVS
2.0
0.5
Notes:
All timing of the I2C bus interface are defined by related specifications
of the I2C bus interface.
7
Z89303/05/07
P R E L I M I N A R Y
CPS DC-4222-03
Development Projects:
Customer is cautioned that while reasonable efforts will be
employed to meet performance objectives and milestone
dates, development is subject to unanticipated problems
and delays. No production release is authorized or com-
mitted until the Customer and Zilog have agreed upon a
Customer Procurement Specification for this project.
Pre-Characterization Product:
The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-con-
formance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.
© 1994 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of mer-
chantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
Zilog’s products are not authorized for use as critical compo-
nents in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
8
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