CY74FCT541TPC
更新时间:2025-05-22 14:21:32
品牌:CYPRESS
描述:Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20
CY74FCT541TPC 概述
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20 总线驱动器/收发器
CY74FCT541TPC 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | DIP | 包装说明: | 0.300 INCH, PLASTIC, DIP-20 |
针数: | 20 | Reach Compliance Code: | not_compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.26 |
Is Samacsys: | N | 其他特性: | WITH DUAL OUTPUT ENABLE |
控制类型: | ENABLE LOW | 系列: | FCT |
JESD-30 代码: | R-PDIP-T20 | JESD-609代码: | e0 |
长度: | 25.527 mm | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | BUS DRIVER | 最大I(ol): | 0.064 A |
位数: | 8 | 功能数量: | 1 |
端口数量: | 2 | 端子数量: | 20 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出特性: | 3-STATE | 输出极性: | TRUE |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装等效代码: | DIP20,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 峰值回流温度(摄氏度): | NOT SPECIFIED |
电源: | 5 V | Prop。Delay @ Nom-Sup: | 8 ns |
传播延迟(tpd): | 8 ns | 认证状态: | Not Qualified |
座面最大高度: | 4.826 mm | 子类别: | Bus Driver/Transceivers |
最大供电电压 (Vsup): | 5.25 V | 最小供电电压 (Vsup): | 4.75 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | CMOS | 温度等级: | INDUSTRIAL |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 宽度: | 7.62 mm |
Base Number Matches: | 1 |
CY74FCT541TPC 数据手册
通过下载CY74FCT541TPC数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载1CY54/74FCT541T
fax id: 7002
CY54/74FCT540T
CY54/74FCT541T
8-Bit Buffers/Line Drivers
Features
Functional Description
• Function, pinout and drive compatible with FCT and
The FCT540T inverting buffer/line driver and the FCT541T
non-inverting buffer/line driver are designed to be employed
as memory address drivers, clock drivers, and bus-oriented
transmitters/receivers. The devices provide speed and drive
capabilities equivalent to their fastest bipolar logic
counterparts while reducing power dissipation. The input and
output voltage levels allow direct interface with TTL, NMOS,
and CMOS devices without external components.
F logic
• FCT-C speed at 4.1 ns max. (Com’l)
FCT-A speed at 4.8 ns max. (Com’l)
• Reduced V
(typically = 3.3V) versions of equivalent
OH
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• ESD > 2000V
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Sink current
Source current
64 mA (Com’l), 48 mA (Mil)
32 mA (Com’l), 12 mA (Mil)
• Extended commercial range of −40°C to +85°C
Pin Configurations
Logic Block Diagram—FCT540T
CERDIP/SOIC/QSOP
Top View
OE
A
OE
B
1
20
19
18
17
16
OE
V
A
CC
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
2
OE
B
3
D
1
O
O
O
0
4
D
2
1
D
3
5
2
FCT540T
D
4
6
O
15
14
3
4
5
6
7
D
5
O
O
O
O
7
D
6
8
13
12
11
D
7
9
GND
10
Logic Block Diagram—FCT541T
CERDIP/DIP/SOIC/QSOP
Top View
OE
OE
B
A
1
20
19
18
17
16
OE
V
CC
A
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
2
3
4
5
6
OE
B
D
1
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
2
D
3
FCT541T
D
4
15
14
D
5
7
8
9
D
6
13
12
11
D
7
GND
10
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
May 1994 – Revised March 17, 1997
CY54/74FCT540T
CY54/74FCT541T
Function Table FCT540T[1]
Ambient Temperature with
Power Applied ............................................ –65°C to +135°C
Supply Voltage to Ground Potential ...............–0.5V to +7.0V
DC Input Voltage ............................................–0.5V to +7.0V
DC Output Voltage .........................................–0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ...... 120 mA
Power Dissipation.......................................................... 0.5W
Inputs
OE
OE
D
Output
A
B
L
L
H
L
L
H
L
H
X
H
L
Z
Function Table FCT541T[1]
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Inputs
OE
OE
D
Output
A
B
Operating Range
L
L
H
L
L
H
L
H
X
L
H
Z
Ambient
Temperature
Range
Range
V
CC
Commercial DT
0°C to +70°C
5V ± 5%
5V ± 5%
5V ± 10%
Maximum Ratings[2, 3]
Commercial T, AT, CT
–40°C to +85°C
–55°C to +125°C
[4]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Military
All
Storage Temperature ................................. –65°C to +150°C
Electrical Characteristics Over the Operating Range
[5]
Parameter
Description
Test Conditions
= Min., I = –32 mA
Min.
2.0
Typ.
Max.
Unit
V
V
Output HIGH Voltage
V
V
V
V
V
Com’l
Com’l
Mil
OH
CC
CC
CC
CC
CC
OH
= Min., I = –15 mA
2.4
3.3
3.3
0.3
0.3
V
OH
= Min., I = –12 mA
2.4
V
OH
V
Output LOW Voltage
= Min., I = 64 mA
Com’l
Mil
0.55
0.55
V
OL
OL
= Min., I = 48 mA
V
OL
V
V
V
V
Input HIGH Voltage
Input LOW Voltage
2.0
V
IH
IL
H
0.8
V
[6]
Hysteresis
All inputs
0.2
V
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
V
V
V
V
V
= Min., I = –18 mA
–0.7
–1.2
5
V
IK
CC
CC
CC
CC
CC
IN
I
I
I
I
= Max., V = V
CC
µA
µA
µA
µA
I
IN
= Max., V = 2.7V
±1
±1
10
IH
IN
= Max., V = 0.5V
IL
IN
Off State HIGH-Level Output
Current
= Max., V
= Max., V
= Max,. V
= 2.7V
= 0.5V
= 0.0V
OZH
OUT
OUT
OUT
I
Off State LOW-Level
Output Current
V
–10
µA
OZL
CC
[7]
I
I
Output Short Circuit Current
Power-Off Disable
V
V
–60
–120
–225
mA
OS
CC
CC
= 0V, V
= 4.5V
±1
µA
OFF
OUT
Notes:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25°C ambient.
6. This parameter is guaranteed but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parametric
tests, IOS tests should be performed last.
2
CY54/74FCT540T
CY54/74FCT541T
Capacitance[6]
[5]
Parameter
Description
Input Capacitance
Output Capacitance
Test Conditions
Test Conditions
Typ.
5
Max.
10
Unit
pF
C
C
IN
9
12
pF
OUT
Power Supply Characteristics
[5]
Parameter
Description
Typ.
Max.
Unit
mA
mA
I
Quiescent Power Supply Current
V
V
=Max., V ≤ 0.2V, V ≥ V –0.2V
0.1
0.5
0.2
2.0
CC
CC
CC
IN
IN
CC
[8]
∆I
Quiescent Power Supply Current
(TTL inputs)
= Max., V = 3.4V, f = 0, Outputs Open
IN 1
CC
[9]
I
Dynamic Power Supply Current
V
= Max., 50% Duty Cycle, Outputs Open,
0.06
0.7
1.0
1.3
3.3
0.12
mA/MHz
CCD
CC
One Bit Toggling at f = 10 MHz,
OE =OE =GND, or OE =GND, OE =V
V
V
One Bit Toggling at f =10 MHz,
OE =OE =GND, or OE =GND, OE =V
V
V
One Bit Toggling at f =10 MHz,
OE =OE =GND, or OE =GND, OE =V
V
V
Eight Bits Toggling at f = 2.5 MHz,
OE =OE =GND, or OE =GND, OE =V
V
V
1
A
B
A
B
CC,
≤ 0.2V or V ≥ V –0.2V
IN
IN CC
[10]
I
Total Power Supply Current
=Max., 50% Duty Cycle, Outputs Open,
1.4
mA
C
CC
1
A
IN
B
A
B
CC,
≤0.2V or V ≥V –0.2V
IN CC
= Max., 50% Duty Cycle, Outputs Open,
2.4
mA
CC
1
A
B
A
B
CC,
= 3.4V or V = GND
IN
IN
[11]
= Max., 50% Duty Cycle, Outputs Open,
2.6
mA
CC
1
A
IN
B
A
B
CC,
≤ 0.2V or V ≥ V –0.2V
IN CC
[11]
= Max., 50% Duty Cycle, Outputs Open,
10.6
mA
CC
Eight Bits Toggling at f =2.5 MHz,
1
OE =OE =GND, or OE =GND, OE =V
A
B
A
B
CC,
V
= 3.4V or V = GND
IN
IN
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
3
CY54/74FCT540T
CY54/74FCT541T
[12]
Switching Characteristics Over the Operating Range
FCT540T/FCT541T FCT540AT/FCT541AT
Commercial Commercial
Min. Max.
[13]
Parameter
Description
Propagation Delay
Data to Output (FCT540)
Min.
Max.
Unit
Fig. No.
t
t
1.5
8.5
1.5
1.5
1.5
1.5
4.8
4.8
6.2
5.6
ns
1, 2
PLH
PHL
t
t
Propagation Delay
Data to Output (FCT541)
1.5
1.5
1.5
8.0
ns
ns
ns
1, 3
PLH
PHL
t
t
Output Enable Time
Output Disable Time
10.0
9.5
1, 7, 8
1, 7, 8
PZH
PZL
t
t
PHZ
PLZ
FCT540DT/
FCT541DT
FCT540CT/FCT541CT
Military Commercial
Commercial
Fig.
No.
1, 2
[13]
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
t
Propagation Delay
Data to Output (FCT540)
1.5
1.5
1.5
1.5
4.7
1.5
4.1
1.5
3.8
ns
PLH
PHL
t
t
Propagation Delay
Data to Output (FCT541)
4.6
6.5
5.7
1.5
1.5
1.5
4.1
5.8
5.2
1.5
1.5
1.5
3.8
5.2
5.0
ns
ns
ns
1, 3
PLH
PHL
t
t
Output Enable Time
1, 7, 8
1, 7, 8
PZH
PZL
t
t
Output Disable Time
PHZ
PLZ
Shaded areas contain preliminary information.
Notes:
12. Minimum limits are guaranteed but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
4
CY54/74FCT540T
CY54/74FCT541T
Ordering Information—FCT540T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT540DTQC
Package Type
20-Lead (150-Mil) QSOP
3.8
Q5
S5
Q5
S5
D6
Q5
S5
Q5
Commercial
CY74FCT540DTSOC
CY74FCT540CTQC
CY74FCT540CTSOC
CY54FCT540CTDMB
CY74FCT540ATQC
CY74FCT540ATSOC
CY74FCT540TQC
20-Lead (300-Mil) Molded SOIC
20-Lead (150-Mil) QSOP
4.1
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
20-Lead (150-Mil) QSOP
4.7
4.8
Military
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (150-Mil) QSOP
8.5
Commercial
Ordering Information—FCT541T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY74FCT541DTQC
Package Type
20-Lead (150-Mil) QSOP
3.8
Q5
S5
Q5
S5
D6
P5
Q5
S5
P5
S5
Commercial
CY74FCT541DTSOC
CY74FCT541CTQC
CY74FCT541CTSOC
CY54FCT541CTDMB
CY74FCT541ATPC
CY74FCT541ATQC
CY74FCT541ATSOC
CY74FCT541TPC
20-Lead (300-Mil) Molded SOIC
20-Lead (150-Mil) QSOP
4.1
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) CerDIP
4.6
4.8
Military
20-Lead (300-Mil) Molded DIP
20-Lead (150-Mil) QSOP
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) Molded DIP
20-Lead (300-Mil) Molded SOIC
8.0
Commercial
CY74FCT541TSOC
Shaded areas contain preliminary information.
Document #: 38-00260-B
5
CY54/74FCT540T
CY54/74FCT541T
Package Diagrams
20-Lead (300-Mil) CerDIP D6
MIL-STD-1835 D-8 Config.A
20-Lead (300-Mil) Molded DIP P5
6
CY54/74FCT540T
CY54/74FCT541T
Package Diagrams (continued)
20-Lead Quarter Size Outline Q5
20-Lead (300-Mil) Molded SOIC S5
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of anycircuitry other than circuitry embodied in a CypressSemiconductor product. Nor does it conveyor imply any license under patent or other rights. CypressSemiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
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