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04N03LA

更新时间：2025-06-30 08:38:23
品牌：INFINEON
描述：OptiMOS?2 Power-Transistor

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中文翻译

免费 PCB/SMT

04N03LA 概述

OptiMOS?2 Power-Transistor OptiMOS®2功率三极管

04N03LA 数据手册

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IPI04N03LA, IPP04N03LA  
OptiMOS®2 Power-Transistor  
Product Summary  
Features  
V DS  
25  
4.2  
80  
V
• Ideal for high-frequency dc/dc converters  
• Qualified according to JEDEC1) for target applications  
R DS(on),max  
I D  
m:  
A
• N-channel - Logic level  
• Excellent gate charge x R DS(on) product (FOM)  
• Very low on-resistance R DS(on)  
PG-TO262-3  
PG-TO220-3  
• Superior thermal resistance  
• 175 °C operating temperature  
• dv /dt rated  
• Pb-free lead plating; RoHS compliant  
Type  
Package  
Marking  
04N03LA  
04N03LA  
IPI04N03LA  
IPP04N03LA  
PG-TO262-3  
PG-TO220-3  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol Conditions  
Unit  
T C=25 °C2)  
I D  
Continuous drain current  
80  
80  
A
T C=100 °C  
T C=25 °C3)  
I D,pulse  
Pulsed drain current  
385  
290  
E AS  
I D=77 A, R GS=25 :  
Avalanche energy, single pulse  
mJ  
I D=80 A, V DS=20 V,  
di /dt =200 A/μs,  
Reverse diode dv /dt  
dv /dt  
6
kV/μs  
T
j,max=175 °C  
Gate source voltage4)  
V GS  
20  
V
P tot  
T C=25 °C  
Power dissipation  
107  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... 175  
55/175/56  
1) J-STD20 and JESD22  
Rev. 1.9  
page 1  
2007-08-29  
IPI04N03LA, IPP04N03LA  
Values  
typ.  
Parameter  
Symbol Conditions  
Unit  
min.  
max.  
Thermal characteristics  
R thJC  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
-
1.4  
62  
40  
K/W  
R thJA  
minimal footprint  
6 cm2 cooling area5)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS  
V GS(th)  
V
V
GS=0 V, I D=1 mA  
DS=V GS, I D=60 μA  
Drain-source breakdown voltage  
Gate threshold voltage  
25  
-
-
V
1.2  
1.6  
2
V
DS=25 V, V GS=0 V,  
I DSS  
Zero gate voltage drain current  
-
-
0.1  
10  
1
μA  
T j=25 °C  
V
DS=25 V, V GS=0 V,  
100  
T j=125 °C  
I GSS  
V
V
GS=20 V, V DS=0 V  
GS=4.5 V, I D=55 A  
Gate-source leakage current  
-
-
10  
100 nA  
R DS(on)  
Drain-source on-state resistance  
5.4  
6.7  
m:  
V
GS=10 V, I D=55 A  
-
-
3.5  
1.1  
85  
4.2  
R G  
g fs  
Gate resistance  
-
-
:
|V DS|>2|I D|R DS(on)max  
I D=55 A  
,
Transconductance  
43  
S
2) Current is limited by bondwire; with an  
R
thJC=1.4 K/W the chip is able to carry 125  
3) See figure 3  
4) T j,max=150 °C and duty cycle D <0.25 for  
V
GS<-5 V  
5) Device on 40 mm x 40 mm x 1.5 mm  
epoxy PCB FR4 with 6 cm2 (one layer, 70  
μm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.9  
page 2  
2007-08-29  
IPI04N03LA, IPP04N03LA  
Values  
typ.  
Parameter  
Symbol Conditions  
Unit  
min.  
max.  
Dynamic characteristics  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
-
-
-
-
-
-
-
2915  
1236  
175  
13  
3877 pF  
1643  
V
GS=0 V, V DS=15 V,  
C oss  
Crss  
t d(on)  
t r  
f =1 MHz  
263  
19  
7.0  
57  
ns  
4.5  
V
DD=15 V, V GS=10 V,  
I D=20 A, R G=2.7 :  
t d(off)  
t f  
Turn-off delay time  
Fall time  
38  
5.4  
8.1  
Gate Charge Characteristics6)  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Q gs  
-
-
-
-
-
-
10  
4.6  
7.2  
12  
13  
6.2  
11  
17  
32  
-
nC  
Q g(th)  
Q gd  
V
V
DD=15 V, I D=40 A,  
GS=0 to 5 V  
Q sw  
Q g  
Gate charge total  
24  
V plateau  
Gate plateau voltage  
3.3  
V
V
V
DS=0.1 V,  
GS=0 to 5 V  
Q g(sync)  
Q oss  
Gate charge total, sync. FET  
Output charge  
-
-
20  
27  
27  
35  
nC  
V
DD=15 V, V GS=0 V  
Reverse Diode  
I S  
Diode continous forward current  
Diode pulse current  
-
-
-
-
80  
A
T C=25 °C  
I S,pulse  
385  
V
GS=0 V, I F=80 A,  
V SD  
Q rr  
Diode forward voltage  
-
-
0.96  
-
1.2  
15  
V
T j=25 °C  
V R=15 V, I F=I S,  
di F/dt =400 A/μs  
Reverse recovery charge  
nC  
6) See figure 16 for gate charge parameter definition  
Rev. 1.9  
page 3  
2007-08-29  
IPI04N03LA, IPP04N03LA  
1 Power dissipation  
2 Drain current  
P
tot=f(T C)  
I D=f(T C); V GS•10 V  
120  
100  
80  
100  
80  
60  
40  
20  
0
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
C [°C]  
T
C [°C]  
3 Safe operating area  
I D=f(V DS); T C=25 °C; D =0  
parameter: t p  
4 Max. transient thermal impedance  
thJC=f(t p)  
Z
parameter: D =t p/T  
1000  
10  
1 μs  
limited by on-state  
resistance  
10 μs  
1
0.5  
100  
0.2  
100 μs  
DC  
0.1  
0.1  
0.05  
1 ms  
0.02  
10 ms  
0.01  
single pulse  
10  
0.01  
1
0.001  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
0.1  
1
10  
100  
V
DS [V]  
t p [s]  
Rev. 1.9  
page 4  
2007-08-29  
IPI04N03LA, IPP04N03LA  
6 Typ. drain-source on resistance  
DS(on)=f(I D); T j=25 °C  
5 Typ. output characteristics  
I D=f(V DS); T j=25 °C  
R
parameter: V GS  
parameter: V GS  
20  
140  
4.1 V  
3.8 V  
10 V  
3 V  
3.5 V  
4.5 V  
3.2 V  
120  
100  
80  
60  
40  
20  
0
4.1 V  
3.8 V  
15  
10  
5
3.5 V  
3.2 V  
4.5 V  
10 V  
3 V  
2.8 V  
0
0
20  
40  
60  
80  
D [A]  
100  
120  
140  
0
1
2
3
V
DS [V]  
I
7 Typ. transfer characteristics  
I D=f(V GS); |V DS|>2|I D|R DS(on)max  
parameter: T j  
8 Typ. forward transconductance  
g fs=f(I D); T j=25 °C  
160  
140  
120  
100  
80  
120  
100  
80  
60  
40  
20  
0
60  
40  
175 °C  
20  
25 °C  
0
0
1
2
3
4
5
0
20  
40  
60  
80  
V
GS [V]  
I
D [A]  
Rev. 1.9  
page 5  
2007-08-29  
IPI04N03LA, IPP04N03LA  
9 Drain-source on-state resistance  
10 Typ. gate threshold voltage  
GS(th)=f(T j); V GS=V DS  
R
DS(on)=f(T j); I D=55 A; V GS=10 V  
V
parameter: I D  
8
7
6
2.5  
2
1.5  
1
600 μA  
5
98 %  
60 μA  
4
typ  
3
2
1
0
0.5  
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
T j [°C]  
11 Typ. capacitances  
12 Forward characteristics of reverse diode  
I F=f(V SD  
C =f(V DS); V GS=0 V; f =1 MHz  
)
parameter: T j  
104  
103  
25°C 98%  
Ciss  
25 °C  
175 °C  
102  
175°C 98%  
Coss  
103  
101  
Crss  
102  
100  
0
0
10  
20  
30  
0.5  
1
1.5  
2
V
DS [V]  
V SD [V]  
Rev. 1.9  
page 6  
2007-08-29  
IPI04N03LA, IPP04N03LA  
13 Avalanche characteristics  
AS=f(t AV); R GS=25 :  
14 Typ. gate charge  
GS=f(Q gate); I D=40 A pulsed  
V
I
parameter: Tj(start)  
parameter: V DD  
100  
12  
25 °C  
150 °C  
100 °C  
15 V  
10  
8
5 V  
20 V  
10  
6
4
2
1
1
0
0
10  
100  
1000  
10  
20  
30  
gate [nC]  
40  
50  
t
AV [μs]  
Q
15 Drain-source breakdown voltage  
16 Gate charge waveforms  
V
BR(DSS)=f(T j); I D=1 mA  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
V GS  
Q g  
V gs(th)  
Q g(th)  
Q sw  
Q gd  
Q gate  
Q gs  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
Rev. 1.9  
page 7  
2007-08-29  
IPI04N03LA, IPP04N03LA  
PG-TO262-3: Outline  
Rev. 1.9  
page 8  
2007-08-29  
IPI04N03LA, IPP04N03LA  
PG-TO220-3: Outline  
Rev. 1.9  
page 9  
2007-08-29  
IPI04N03LA, IPP04N03LA  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© Infineon Technologies AG 2007.  
All Rights Reserved.  
Legal disclaimer  
The information given in this data sheet shall in no event be regarded as a guarantee of conditions or  
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical  
values stated herein and/or any information regarding the application of the device, Infineon Technologies  
hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of  
non-infringement of intellectual property rights of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies Office (www.infineon.com ).  
Warnings  
Due to technical requirements components may contain dangerous substances. For information on the types  
in question please contact your nearest Infineon Technologies Office.  
Infineon Technologies Components may only be used in life-support devices or systems with the express  
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to  
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or  
system. Life support devices or systems are intended to be implanted in the human body, or to support and/or  
maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the  
user or other persons may be endangered.  
Rev. 1.9  
page 10  
2007-08-29  

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