1EDC20H12AHXUMA1

更新时间:2024-12-03 14:19:35
品牌:INFINEON
描述:Buffer/Inverter Based Peripheral Driver, 4A, PDSO8, DSO-8

1EDC20H12AHXUMA1 概述

Buffer/Inverter Based Peripheral Driver, 4A, PDSO8, DSO-8 MOSFET 驱动器

1EDC20H12AHXUMA1 规格参数

是否Rohs认证:符合生命周期:Active
包装说明:SOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.7
Is Samacsys:N内置保护:OVER CURRENT; UNDER VOLTAGE
接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVERJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:7.5 mm
湿度敏感等级:3功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C输出电流流向:SOURCE AND SINK
标称输出峰值电流:4 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:2.65 mm最大供电电压:17 V
最小供电电压:3.1 V标称供电电压:5 V
电源电压1-最大:35 V电源电压1-分钟:13 V
电源电压1-Nom:15 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
断开时间:0.15 µs接通时间:0.142 µs
宽度:6.3 mmBase Number Matches:1

1EDC20H12AHXUMA1 数据手册

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1EDCxxI12AH and 1EDCxxH12AH  
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Features  
Single channel isolated IGBT driver  
For 600 V/650 V/1200 V IGBTs, MOSFETs and SiC MOSFETs  
Up to 10 A typical peak current at rail-to-rail outputs  
Separate source and sink outputs  
Galvanically isolated coreless transformer driver  
Wide input voltage operating range  
Suitable for operation at high ambient temperature  
Recognized under UL 1577 with an insulation test voltage of VISO = 3000 V for 1 s  
Potential applications  
AC and brushless DC motor drives  
High voltage DC/DC-converter and DC/AC-inverter  
Induction heating resonant application  
UPS-systems, welding and solar  
Product type  
1EDC05I12AH  
1EDC20H12AH  
1EDC20I12AH  
1EDC40I12AH  
1EDC60H12AH  
1EDC60I12AH  
Output current configuration  
Package  
±0.5 A  
±2.0 A  
±2.0 A  
±4.0 A  
±6.0 A  
±6.0 A  
PG-DSO-8-59  
PG-DSO-8-59  
PG-DSO-8-59  
PG-DSO-8-59  
PG-DSO-8-59  
PG-DSO-8-59  
Product validation  
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.  
Datasheet  
Please read the Important Notice and Warnings at the end of this document  
2.0  
www.infineon.com/eicedriver  
2017-07-17  
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Description  
Description  
The 1EDCxxI12AH and 1EDCxxH12AH are galvanically isolated single channel IGBT driver in a PG-DSO-8-59  
package that provide output currents up to 10 A at separated output pins.  
The input logic pins operate on a wide input voltage range from 3 V to 15 V using scaled CMOS threshold levels  
to support even 3.3 V microcontrollers.  
Data transfer across the isolation barrier is realized by the coreless transformer technology.  
Every driver family member comes with logic input and driver output undervoltage lockout (UVLO) and active  
shutdown.  
VCC1  
VCC2,H  
OUT+  
IN+  
IN-  
Single channel  
EiceDRIVERTM with separate  
output  
OUT-  
GND1  
VCC1  
GND2,H  
VCC2,L  
Control  
OUT+  
IN+  
IN-  
Single channel  
EiceDRIVERTM with separate  
output  
OUT-  
GND1  
GND2,L  
Figure 1  
Typical application  
Datasheet  
2
2.0  
2017-07-17  
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Table of contents  
Table of contents  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
2
2.1  
2.2  
Pin configuration and functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5  
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5  
3
3.1  
3.2  
3.3  
3.3.1  
3.3.2  
3.3.3  
3.4  
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Active shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8  
Non-inverting and inverting inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9  
3.5  
4
4.1  
4.2  
4.3  
4.3.1  
4.3.2  
4.3.3  
4.3.4  
4.3.5  
4.3.6  
Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Voltage supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14  
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Active shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
5
6
Recognized under UL 1577 (File E311313) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
7
7.1  
7.2  
Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17  
Reference layout for thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17  
Printed circuit board guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Datasheet  
3
2.0  
2017-07-17  
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Block diagram  
1
Block diagram  
OUT-  
8
7
&
VCC1  
1
2
UVLO  
GND2  
VCC2  
Shoot  
through  
protection  
input  
filter  
IN+  
&
active  
filter  
OUT+  
TX  
RX  
GND1  
VCC1  
input  
filter  
IN-  
3
4
VCC2  
GND2  
UVLO  
6
5
GND1  
Figure 2  
Block diagram  
Datasheet  
4
2.0  
2017-07-17  
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Pin configuration and functionality  
2
Pin configuration and functionality  
2.1  
Pin configuration  
Table 1  
Pin configuration  
Pin No. Name  
Function  
1
2
3
4
5
6
7
8
VCC1  
IN+  
Positive logic supply  
Non-inverted driver input (active high)  
Inverted driver input (active low)  
Logic ground  
IN-  
GND1  
GND2  
VCC2  
OUT+  
OUT-  
Power ground  
Positive power supply output side  
Driver source output  
Driver sink output  
1
2
3
4
VCC1  
IN+  
OUT-  
OUT+  
VCC2  
GND2  
8
7
6
5
IN-  
GND1  
Figure 3  
PG-DSO-8-59 (top view)  
2.2  
Pin functionality  
VCC1  
Logic input supply voltage of 3.3 V up to 15 V wide operating range.  
IN+ non inverting driver input  
IN+ non-inverted control signal for driver output if IN- is set to low. (Output sourcing active at IN+ = high and  
IN- = low)  
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN+. An internal  
weak pull-down-resistor favors off-state.  
IN- inverting driver input  
IN- inverted control signal for driver output if IN+ is set to high. (Output sourcing active at IN- = low and  
IN+ = high)  
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN-. An internal  
weak pull-up-resistor favors off-state.  
Datasheet  
5
2.0  
2017-07-17  
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Pin configuration and functionality  
GND1  
Ground connection of input circuit.  
GND2 reference ground  
Reference ground of the output driving circuit.  
In case of a bipolar supply (positive and negative voltage referred to IGBT emitter) this pin is connected to the  
negative supply voltage.  
VCC2  
Positive power supply pin of output driving circuit. A proper blocking capacitor has to be placed close to this  
supply pin.  
OUT+ driver source output  
Driver source output pin to turn on external IGBT. During on-state the driving output is switched to VCC2.  
Switching of this output is controlled by IN+ and IN-. This output will also be turned off at an UVLO event.  
During turn off the OUT+ terminal is able to sink approx. 100 mA. In case of an unconnected OUT- the complete  
gate charge is discharged through this channel resulting in a slow turn off.  
OUT- driver sink output  
Driver sink output pin to turn off external IGBT. During off-state the driving output is switched to GND2.  
Switching of this output is controlled by IN+ and IN-. In case of UVLO an active shut down keeps the output  
voltage at a low level.  
Datasheet  
6
2.0  
2017-07-17  
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Functional description  
3
Functional description  
3.1  
Introduction  
The 1EDIxxI12AH and 1EDIxxH12AH are general purpose IGBT gate drivers. Basic control and protection features  
support fast and easy design of highly reliable systems.  
The integrated galvanic isolation between control input logic and driving output stage grants additional safety.  
Its wide input voltage supply range supports the direct connection of various signal sources like DSPs and  
microcontrollers.  
The separated rail-to-rail driver outputs simplify gate resistor selection, save an external high current bypass  
diode and enhance dV/dt control.  
3.2  
Supply  
The driver can operate over a wide supply voltage range, either unipolar or bipolar.  
+5V  
+15V  
VCC1  
VCC2  
1µ  
100n  
10R  
3R3  
OUT+  
OUT-  
SGND  
IN  
GND1  
IN+  
1µ  
0V  
IN-  
GND2  
-8V  
Figure 4  
Application example bipolar supply  
With bipolar supply the driver is typically operated with a positive voltage of 15 V at VCC2 and a negative voltage  
of -8 V at GND2 relative to the emitter of the IGBT. Negative supply can help to prevent a dynamic turn on due to  
the additional charge which is generated from IGBT’s input capacitance.  
+5V  
+15V  
VCC1  
VCC2  
1µ  
10R  
100n  
OUT+  
OUT-  
SGND  
IN  
GND1  
IN+  
3R3  
IN-  
GND2  
Figure 5  
Application example unipolar supply  
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15 V at VCC2. In this  
case, careful evaluation for turn off gate resistor selection is recommended to avoid dynamic turn on.  
Datasheet  
7
2.0  
2017-07-17  
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Functional description  
3.3  
Protection features  
3.3.1  
Undervoltage lockout (UVLO)  
IN+  
VUVLOH1  
VUVLOL1  
VCC1  
VUVLOH2  
VUVLOL2  
VCC2  
OUT  
Figure 6  
UVLO behavior  
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output  
independently. Operation starts only aꢀer both VCC levels have increased beyond the respective VUVLOH levels.  
If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output chip  
before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored until VVCC1 reaches the  
power-up voltage VUVLOH1 again.  
If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and  
signals from the input chip are ignored until VVCC2 reaches the power-up voltage VUVLOH2 again.  
Note:  
VVCC2 is always referred to GND2 and does not differentiate between unipolar or bipolar supply.  
3.3.2  
Active shut-down  
The active shut-down feature ensures a safe IGBT off-state in case the output chip is not connected to the power  
supply or an undervoltage lockout is in effect. The IGBT gate is clamped at OUT- to GND2.  
3.3.3  
Short circuit clamping  
During short circuit the IGBT’s gate voltage tends to rise because of the feedback via the Miller capacitance. An  
additional protection circuit connected to OUT+ limits this voltage to a value slightly higher than the supply  
voltage. A maximum current of 500 mA may be fed back to the supply through this path for 10 μs. If higher  
currents are expected or tighter clamping is desired external Schottky diodes may be added.  
Datasheet  
8
2.0  
2017-07-17  
 
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Functional description  
3.4  
Non-inverting and inverting inputs  
IN+  
IN-  
OUT  
Figure 7  
Logic input to output switching behavior  
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output  
while IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high. A minimum input  
pulse width is defined to filter occasional glitches.  
3.5  
Driver outputs  
The output driver section uses MOSFETs to provide a rail-to-rail output. This feature permits that tight control of  
gate voltage during on-state and short circuit can be maintained as long as the driver’s supply is stable. Due to  
the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the gate resistor.  
Furthermore, it reduces the power to be dissipated by the driver.  
Datasheet  
9
2.0  
2017-07-17  
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Electrical parameters  
4
Electrical parameters  
4.1  
Absolute maximum ratings  
Note:  
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to  
destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1.  
Table 2  
Absolute maximum ratings  
Parameter  
Symbol  
Values  
Max.  
40  
Unit Note /  
Test Condition  
Min.  
1)  
1)  
Power supply output side  
Gate driver output  
VVCC2  
VOUT  
VVCC1  
VLogicIN  
VGND2  
TJ  
-0.3  
V
VGND2-0.3 VVCC2+0.3  
V
Positive power supply input side  
Logic input voltages (IN+,IN-)  
Input to output isolation voltage (GND2)  
Junction temperature  
-0.3  
-0.3  
-1200  
-40  
18.0  
18.0  
1200  
150  
150  
V
V
V
GND2 - GND1  
°C  
°C  
Storage temperature  
TS  
-55  
Comparative tracking index  
CTI  
400  
IEC 60601-1: Material  
group II  
Power dissipation (Input side)  
Power dissipation (Output side)  
Thermal resistance (Input side)  
Thermal resistance (Output side)  
ESD capability  
PD, IN  
25  
400  
145  
165  
2
mW  
mW  
K/W  
K/W  
kV  
2) @TA = 25°C  
2) @TA = 25°C  
2) @TA = 85°C  
2) @TA = 85°C  
PD, OUT  
RTHJA,IN  
RTHJA,OUT  
VESD,HBM  
VESD,CDM  
Human body model3)  
1
kV  
Charged device  
model4)  
1
With respect to GND2.  
2
See Figure 11 for reference layouts for these thermal data. Thermal performance may change significantly  
with layout and heat dissipation of components in close proximity.  
According to EIA/JESD22-A114-C (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).  
According to EIA/JESD22-C101 (specified waveform characteristics)  
3
4
Datasheet  
10  
2.0  
2017-07-17  
 
 
 
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Electrical parameters  
4.2  
Operating parameters  
Note:  
Within the operating range the IC operates as described in the functional description. Unless  
otherwise noted all parameters refer to GND1.  
Table 3  
Operating parameters  
Parameter  
Symbol  
Values  
Max.  
Unit Note /  
Test Condition  
Min.  
13  
3.1  
-0.3  
5)  
Power supply output side  
Power supply input side  
VVCC2  
VVCC1  
VLogicIN  
fsw  
35  
V
17  
V
Logic input voltages (IN+,IN-)  
Switching frequency  
17  
V
6)7)  
1.0  
125  
4.8  
100  
MHz  
Ambient temperature  
TA  
-40  
°C  
Thermal coefficient, junction-top  
Common mode transient immunity (CMTI)  
Ψth,jt  
|dVISO/dt|  
K/W 7) at TA = 85°C  
kV/μs 7) at 1000 V  
4.3  
Electrical characteristics  
Note:  
The electrical characteristics include the spread of values in supply voltages, load and junction  
temperatures given below. Typical values represent the median values at TA = 25°C. Unless otherwise  
noted all voltages are given with respect to their respective GND (GND1 for pins 1 to 3, GND2 for pins 6  
to 8).  
4.3.1  
Voltage supply  
Table 4  
Voltage supply  
Parameter  
Symbol  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
Max.  
3.1  
UVLO threshold input chip  
UVLO hysteresis input chip  
VUVLOH1  
VUVLOL1  
VHYS1  
2.85  
V
V
V
2.55  
0.09  
2.75  
0.1  
(VUVLOH1 - VUVLOL1  
)
8)  
8)  
UVLO threshold output chip (IGBT VUVLOH2  
12.0  
11.1  
12.7  
V
V
supply)  
VUVLOL2  
10.5  
5
With respect to GND2.  
do not exceed max. power dissipation  
Parameter is not subject to production test - verified by design/characterization  
With respect to GND2.  
6
7
8
Datasheet  
11  
2.0  
2017-07-17  
 
 
 
 
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Electrical parameters  
Table 4  
Voltage supply (continued)  
Symbol  
Parameter  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
0.7  
Max.  
UVLO hysteresis output chip  
(VUVLOH2 - VUVLOL2  
VHYS2  
IQ1  
0.85  
V
)
Quiescent current input chip  
0.65  
1.2  
1.0  
2.0  
mA  
VVCC1 = 5 V  
IN+ = High, IN- = Low  
=>OUT = High  
Quiescent current output chip  
IQ2  
mA  
VVCC2 = 15 V  
IN+ = High, IN- = Low  
=>OUT = High  
4.3.2  
Logic input  
V
IN+L ,VIN-L  
VIN+H ,VIN-H  
0.7×15V  
10  
UVLO  
No driver  
operation  
5
0.3×15V  
0.7×5V  
0.7×3.3V  
0.3×5V  
0.3×3.3V  
15  
10  
3.3  
5
VVCC1  
Figure 8  
VCC1 scaled input threshold voltage of IN+ and IN-  
Beginning from the input undervoltage lockout level, threshold levels for IN+ and IN- are scaled to VVCC1. The  
high input threshold is 70% of VVCC1 and the low input threshold is at 30% of VVCC1  
.
Table 5  
Logic input  
Parameter  
Symbol  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
Max.  
0.3 ×  
VVCC1  
IN+,IN- low input voltage  
IN+,IN- high input voltage  
VIN+L  
VIN-L  
,
9)3.1 V ≤ VVCC1 ≤ 17 V  
VIN+H  
VIN-H  
,
0.7 ×  
VVCC1  
9
Parameter is not subject to production test - verified by design/characterization  
Datasheet  
12  
2.0  
2017-07-17  
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Electrical parameters  
Table 5  
Logic input (continued)  
Symbol  
Parameter  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
Max.  
1.5  
IN+,IN- low input voltage  
IN+,IN- high input voltage  
VIN+L  
VIN-L  
,
V
V
VVCC1 = 5.0 V  
VIN+H  
VIN-H  
,
3.5  
IN- input current  
IN+ input current  
IIN-  
70  
70  
200  
200  
μA  
μA  
VVCC1 = 5.0 V, VIN-  
GND1  
=
IIN+  
VVCC1 = 5.0 V, VIN+  
VVCC1  
=
4.3.3  
Gate driver  
Note:  
minimum Peak current rating valid over temperature range!  
Table 6  
Gate driver  
Parameter  
Symbol  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
Max.  
High level output peak current  
(source)  
IOUT+,PEAK  
A
10)IN+ = High,  
IN- = Low,  
1EDC05I12AH  
1EDC20I12AH  
1EDC20H12AH  
1EDC40I12AH  
1EDC60I12AH  
1EDC60H12AH  
0.5  
1.3  
4.0  
4.0  
7.5  
10.0  
10.0  
VVCC2 = 15 V  
2.0  
2.0  
4.0  
6.0  
6.0  
Low level output peak current  
(sink)  
IOUT-,PEAK  
A
10)IN+ = Low,  
IN- = Low,  
1EDC05I12AH  
1EDC20I12AH  
1EDC20H12AH  
1EDC40I12AH  
1EDC60I12AH  
1EDC60H12AH  
0.5  
2.0  
2.0  
4.0  
6.0  
6.0  
0.9  
3.5  
3.5  
6.8  
9.4  
9.4  
VVCC2 = 15 V  
10  
specified min. output current is forced; voltage across the device V(VCC2 - OUT+) or V(OUT- - GND2) < VVCC2  
.
Datasheet  
13  
2.0  
2017-07-17  
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Electrical parameters  
4.3.4  
Short circuit clamping  
Table 7  
Short circuit clamping  
Parameter  
Symbol  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
Max.  
1.3  
Clamping voltage (OUT+)  
VCLPout  
0.9  
V
11)IN+ = High, IN- =  
Low,  
(VOUT+ - VVCC2  
)
OUT = High  
IOUT = 500 mA,  
(pulse test tCLPmax  
10 μs)  
=
4.3.5  
Dynamic characteristics  
Dynamic characteristics are measured with VVCC1 = 5 V and VVCC2 = 15 V.  
50%  
IN+  
80%  
50%  
20%  
OUT  
TRISE  
TFALL  
TPDON  
TPDOFF  
Figure 9  
Propagation delay, rise and fall time  
Table 8  
Dynamic characteristics  
Symbol  
Parameter  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
270  
Max.  
330  
Input IN to output propagation  
delay ON  
TPDON  
300  
ns  
ns  
ns  
ns  
CLOAD = 100 pF  
VIN+ = 50%,  
VOUT=50% @25°C  
1EDC05I12AH,  
1EDC20I12AH,  
1EDC40I12AH,  
1EDC60I12AH  
Input IN to output propagation  
delay OFF  
TPDOFF  
TPDISTO  
270  
-30  
230  
300  
5
330  
40  
Input IN to output propagation  
delay distortion (TPDOFF - TPDON  
)
Input pulse suppression time IN+, TMININ+  
,
240  
IN-  
TMININ-  
11  
With respect to GND2.  
Datasheet  
14  
2.0  
2017-07-17  
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Recognized under UL 1577 (File E311313)  
Table 8  
Dynamic characteristics (continued)  
Symbol  
Parameter  
Values  
Typ.  
Unit Note or Test  
Condition  
Min.  
Max.  
142  
Input IN to output propagation  
delay ON  
TPDON  
95  
120  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
CLOAD = 100 pF  
VIN+ = 50%,  
VOUT=50% @25°C  
1EDC20H12AH,  
1EDC60H12AH  
Input IN to output propagation  
delay OFF  
TPDOFF  
TPDISTO  
105  
-35  
30  
125  
-5  
40  
150  
25  
Input IN to output propagation  
delay distortion (TPDOFF - TPDON  
)
Input Pulse Suppressiontime IN+, TMININ+  
,
IN-  
TMININ-  
12)  
Input IN to output propagation  
delay ON variation due to temp  
TPDONt  
14  
14  
8
C
LOAD  
= 100 pF  
VIN+ = 50%,  
VOUT=50%  
Input IN to output propagation  
delay OFF variation due to temp  
TPDONt  
Input IN to output propagation  
delay distortion variation due to  
TPDISTOt  
temp (TPDOFF-TPDON  
)
Rise time  
TRISE  
TFALL  
5
4
10  
9
20  
19  
ns  
ns  
CLOAD = 1 nF  
VL20%, VH 80%  
Fall time  
4.3.6  
Active shut down  
Table 9  
Active shut down  
Parameter  
Symbol  
Values  
Typ.  
2.0  
Unit Note or Test  
Condition  
Min.  
Max.  
2.3  
13)  
Active shut down voltage  
VACTSD  
V
I
/IOUT-,PEAK=0.1,  
OUT-  
VCC2 open  
5
Recognized under UL 1577 (File E311313)  
Table 10  
Recognized under UL 1577  
Description  
Symbol  
VISO  
Characteristic  
2500  
Unit  
Insulation Withstand Voltage / 1 min  
Insulation Test Voltage / 1 s  
Vrms  
Vrms  
VISO  
3000  
12  
Parameter is not subject to production test - verified by design/characterization  
With respect to GND2.  
13  
Datasheet  
15  
2.0  
2017-07-17  
 
 
 
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Package outline  
6
Package outline  
DOCUMENT NO.  
Z8B00179262  
0
MILLIMETERS  
DIM  
INCHES  
SCALE  
MIN  
-
MAX  
MIN  
-
MAX  
0.104  
0.008  
0.096  
0.020  
0.013  
0.252  
0.417  
0.299  
A
A1  
A2  
b
2.65  
0.20  
2.45  
0.50  
0.32  
6.40  
10.60  
7.60  
2
0.10  
2.25  
0.30  
0.23  
6.20  
10.00  
7.40  
0.004  
0.089  
0.012  
0.009  
0.244  
0.394  
0.291  
0
2
4mm  
c
D
EUROPEAN PROJECTION  
E
E1  
e
1.27 BSC  
8
0.050 BSC  
8
N
L
0.50  
0.90  
0.020  
0.035  
L2  
h
0.25 BSC  
0.010 BSC  
ISSUE DATE  
05.11.2015  
0.25  
0.45  
0.010  
0.018  
Ĭ
ꢀƒ  
ꢁƒ  
ꢀƒ  
ꢁƒ  
REVISION  
01  
ccc  
ddd  
0.10  
0.25  
0.004  
0.010  
Figure 10 PG-DSO-8-59 (Plastic (green) dual small outline package)  
Datasheet  
16  
2.0  
2017-07-17  
 
EiceDRIVER1EDC Compact  
Single channel IGBT gate driver IC in wide body package  
Application notes  
7
Application notes  
7.1  
Reference layout for thermal data  
Figure 11 Reference layout for fhermal data (Copper thickness 35 μm)  
This PCB layout represents the reference layout used for the thermal characterization.  
Pin 4 (GND1) and pin 5 (GND2) require each a ground plane of 100 mm² for achieving maximum power  
dissipation. The package is built to dissipate most of the heat generated through these pins.  
The thermal coefficient junction-top (Ψth,jt) can be used to calculate the junction temperature at a given top  
case temperature and driver power dissipation:  
T j = Ψth,jt PD + Ttop  
7.2  
Printed circuit board guidelines  
The following factors should be taken into account for an optimum PCB layout.  
Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.  
The same minimum distance between two adjacent high-side isolated parts of the PCB should be  
maintained to increase the effective isolation and to reduce parasitic coupling.  
In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be  
kept as short as possible.  
Revision history  
Document  
version  
Date of  
release  
Description of changes  
2.0  
1.0  
0.5  
2017-07-17  
2017-03-28  
2016-10-04  
UL file number added  
Comparative tracking index added  
initial version  
Datasheet  
17  
2.0  
2017-07-17  
 
 
 
 
 
Trademarks  
All referenced product or service names and trademarks are the property of their respective owners.  
Edition 2017-07-17  
Published by  
IMPORTANT NOTICE  
WARNINGS  
The information given in this document shall in no  
event be regarded as a guarantee of conditions or  
characteristics (“Beschaffenheitsgarantie”) .  
With respect to any examples, hints or any typical values  
stated herein and/or any information regarding the  
application of the product, Infineon Technologies  
hereby disclaims any and all warranties and liabilities of  
any kind, including without limitation warranties of  
non-infringement of intellectual property rights of any  
third party.  
In addition, any information given in this document is  
subject to customer’s compliance with its obligations  
stated in this document and any applicable legal  
requirements, norms and standards concerning  
customer’s products and any use of the product of  
Infineon Technologies in customer’s applications.  
Due to technical requirements products may contain  
dangerous substances. For information on the types  
in question please contact your nearest Infineon  
Technologies office.  
Except as otherwise explicitly approved by Infineon  
Technologies in a written document signed by  
authorized representatives of Infineon Technologies,  
Infineon Technologies’ products may not be used in  
any applications where a failure of the product or  
any consequences of the use thereof can reasonably  
be expected to result in personal injury  
Infineon Technologies AG  
81726 Munich, Germany  
©
2017 Infineon Technologies AG  
All Rights Reserved.  
Do you have a question about any  
aspect of this document?  
Email: erratum@infineon.com  
Document reference  
IFX-acq1467706781217  
The data contained in this document is exclusively  
intended for technically trained staff. It is the  
responsibility of customer’s technical departments to  
evaluate the suitability of the product for the intended  
application and the completeness of the product  
information given in this document with respect to such  
application.  
 

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