2ED020I12FIXUMA1

更新时间:2025-01-13 14:14:29
品牌:INFINEON
描述:Half Bridge Based Peripheral Driver, 2A, PDSO18, GREEN, PLASTIC, DSO-20/18

2ED020I12FIXUMA1 概述

Half Bridge Based Peripheral Driver, 2A, PDSO18, GREEN, PLASTIC, DSO-20/18 MOSFET 驱动器

2ED020I12FIXUMA1 规格参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.72内置保护:OVER CURRENT; THERMAL; UNDER VOLTAGE
高边驱动器:YES接口集成电路类型:HALF BRIDGE BASED IGBT DRIVER
JESD-30 代码:R-PDSO-G18JESD-609代码:e3
长度:12.8 mm湿度敏感等级:3
功能数量:1端子数量:18
最高工作温度:125 °C最低工作温度:-40 °C
输出电流流向:SOURCE AND SINK标称输出峰值电流:2 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:2.65 mm
最大供电电压:5 V最小供电电压:
标称供电电压:2 V电源电压1-最大:18 V
电源电压1-分钟:14 V电源电压1-Nom:15 V
表面贴装:YES温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED断开时间:0.13 µs
接通时间:0.12 µs宽度:7.6 mm
Base Number Matches:1

2ED020I12FIXUMA1 数据手册

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Final Datasheet, September 2007  
2ED020I12-FI  
Dual IGBT Driver IC  
Power Managment & Drives  
N e v e r s t o p t h i n k i n g .  
2ED020I12-FI  
Revision History: 2007-09-10 Final Datasheet  
Previous Version:  
Preliminary Datasheet V3.2 2ED020I12-FI  
Page  
12  
Subjects (major changes since last revision)  
Update Operating Range  
21  
Update Application Advices  
For questions on technology, delivery and prices, please contact the Infineon offices in Germany or the Infineon  
companies and representatives worldwide:  
See our webpage at http://www.infineon.com/gatedriver  
Edition 2007-09-10  
Published by Infineon Technologies AG,  
Am Campeon 1-12,  
D-85579 Neubiberg  
© Infineon 2007.  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as warranted char-  
acteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding  
circuits, descriptions and charts stated herein.  
Infineon Technologies AG is an approved CECC manufacturer.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact your nearest Infi-  
neon office in Germany or our Infineon representatives worldwide (see at http://www.infineon.com).  
Warnings  
Due to technical requirements components may contain dangerous substances. For information on the types in  
question, please contact your nearest Infineon office.  
Infineon components may only be used in life-support devices or systems with the express written approval of In-  
fineon, if a failure of such components can reasonably be expected to cause the failure of that life-support device  
or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are  
intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life.  
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.  
2ED020I12-FI  
Final Data  
Dual IGBT Driver IC  
2ED020I12-FI  
Product Highlights  
• Fully operational to ±1.2 kV  
• Power supply operating range from 14 to 18 V  
• Gate drive currents of +1 A / –2 A  
• Matched propagation delay for both channels  
• High dV/dt immunity  
PG-DSO-18-2  
• Low power consumption  
• General purpose operational amplifier  
• General purpose comparator  
Features  
• Floating high side driver  
• Undervoltage lockout for both channels  
• 3.3 V and 5 V TTL compatible inputs  
• CMOS Schmitt-triggered inputs with pull-down  
• Non-inverting inputs  
• Interlocking inputs  
• Dedicated shutdown input with pull-up  
• RoHS compliant  
Type  
Ordering Code  
Package  
Packaging  
2ED020I12-FI  
SP0002-65782  
PG-DSO-18-2 Tape&Reel  
Final Datasheet  
3
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Overview  
1
Overview  
The 2ED020I12-FI is a high voltage, high speed power MOSFET and IGBT driver with  
interlocking high and low side referenced outputs. The floating high side driver may be  
supplied directly or by means of a bootstrap diode and capacitor. In addition to the logic  
input of each driver the 2ED020I12-FI is equipped with a dedicated shutdown input. All  
logic inputs are compatible with 3.3 V and 5 V TTL. The output drivers feature a high  
pulse current buffer stage designed for minimum driver cross-conduction. Propagation  
delays are matched to simplify use in high frequency applications. Both drivers are  
designed to drive an N-channel power MOSFET or IGBT which operate up to 1.2 kV. In  
addition, a general purpose operational amplifier and a general purpose comparator are  
provided which may be used for instance for current measurement or overcurrent  
detection.  
Final Datasheet  
4
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Pin Configuration and Functionality  
2
Pin Configuration and Functionality  
2.1  
Pin Configuration  
InH  
InL  
SD  
GNDH  
OutH  
VSH  
GNDH  
GND  
CPO  
CP -  
n.c.  
CP+  
VSL  
OPO  
OutL  
GNDL  
OP -  
OP+  
P-DSO-18-2 (300mil)  
Figure 1 Pin Configuration (top view)  
2.2  
Pin Definitions and Functions  
Symbol  
Pin  
Function  
1
2
3
4
5
6
7
8
InH  
Logic input for high side driver  
Logic input for low side driver  
InL  
SD  
Logic input for shutdown of both drivers  
Common ground  
GND  
CPO  
CP–  
CP+  
OPO  
Open collector output of general purpose comparator  
Inverting input of general purpose comparator  
Non-inverting input of general purpose comparator  
Output of general purpose OP  
Table 1  
Pin Description  
Final Datasheet  
5
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Pin Configuration and Functionality  
Pin  
Symbol  
OP–  
Function  
9
Inverting input of general purpose OP  
Non-inverting input of general purpose OP  
Low side power ground 1)  
Low side gate driver output  
Low side supply voltage  
(not connected)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
OP+  
GNDL  
OutL  
VSL  
n.c.  
n.e.  
(not existing)  
n.e.  
(not existing)  
GNDH  
VSH  
OutH  
GNDH  
High side (power) ground  
High side supply voltage  
High side gate driver output  
High side (power) ground  
Table 1  
Pin Description (cont’d)  
1)  
Please note : GNDL has to be connected directly to GND  
Final Datasheet  
6
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Block Diagram  
3
Block Diagram  
High Side  
VCC  
Voltage  
Supply  
UVLO  
Logic  
VSH  
SD  
OutH  
RX  
InH  
GNDH  
InL  
CLT  
TX  
CPO  
VSL  
Input  
Logic  
CP+  
CP -  
CP  
OP  
OutL  
Delay  
OPO  
OP+  
OP -  
UVLO  
Voltage  
Supply  
GND  
GNDL  
Low Side  
Figure 2 Block Diagram  
Final Datasheet  
7
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Functional Description  
4
Functional Description  
4.1  
Power Supply  
The power supply of both sides, “VSL” and “VSH”, is monitored by an undervoltage  
lockout block (UVLO) which enables operation of the corresponding side when the  
supply voltage reaches the “on” threshold. Afterwards the internal voltage reference and  
the biasing circuit are enabled. When the supply voltage (VSL, VSH) drops below the  
“off” threshold, the circuit is disabled.  
4.2  
Logic Inputs  
The logic inputs InH, InL and SD are fed into Schmitt-Triggers with thresholds compatible  
to 3.3V and 5V TTL. When SD is enabled (low), InH and InL are disabled. If InH is high  
(while InL is low), OutH is enabled and vice versa. However, if both signals are high, they  
are internally disabled until one of them gets low again. This is due to the interlocking  
logic of the device. See Figure 3 (section 4.7).  
4.3  
Gate Driver  
2ED020I12-FI features two hard-switching gate drivers with N-channel output stages  
capable to source 1A and to sink 2A peak current. Both drivers are equipped with active-  
low-clamping capability. Furthermore, they feature a large ground bounce ruggedness  
in order to compensate ground bounces caused by a turn-off of the driven IGBT.  
4.4  
General Purpose Operational Amplifier  
This general purpose operational amplifier can be applied for current measurement of  
the driven low-side IGBT. It is dedicated for fast operation with a gain of at least 3. The  
OP is equipped with a -0.1 to 2V input stage and a rail-to-rail output stage which is  
capable to drive ± 5mA.  
4.5  
General Purpose Comparator  
The general purpose comparator can be applied for overcurrent detection of the low side  
IGBT. A dedicated offset as well as a pull-up and pull-down resistor has been introduced  
to its inputs for security reasons.  
4.6  
Coreless Transformer (CLT)  
In order to enable signal transmission across the isolation barrier between low-side and  
high-side driver, a transformer based on CLT-Technology is employed. Signals, that are  
to be transmitted, are specially encoded by the transmitter and correspondingly restored  
by the receiver. In this way EMI due to variations of GNDH (dVGNDH/dt) or the magnetic  
flux density (dΗ/dt) can be suppresed.To compensate the additional propagation delay  
Final Datasheet  
8
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Functional Description  
of transmitter, level shifter and receiver, a dedicated propagation delay is introduced into  
the low-side driver.  
4.7  
Diagrams  
InH  
InL  
/SD  
OutH  
OutL  
Figure 3 Input/Output Timing Diagram  
Final Datasheet  
9
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
5
Electrical Parameters  
5.1  
Absolute Maximum Ratings  
Note: Absolute maximum ratings are defined as ratings, which when being exceeded  
may lead to destruction of the integrated circuit. Unless otherwise noted all  
parameters refer to GND.  
Parameter  
Symbol  
Limit Values  
max.  
Unit Remarks  
min.  
High side ground  
GNDH  
VSH  
–1200  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
1200  
20  
V
1)  
High side supply voltage  
V
1)  
High side gate driver output OutH  
VSH + 0.3  
5.3  
V
Low side ground  
GNDL  
VSL  
V
2)  
Low side supply voltage  
20  
V
3)  
Low side gate driver output OutL  
VSL + 0.3  
5.3  
V
Logic input voltages  
(InH, InL, SD)  
VIN  
V
4)  
OP input voltages  
(OP–, OP+)  
VOP  
–0.3  
5.3  
V
OP output voltage  
VOPO  
VCP  
–0.3  
–0.3  
5.3  
5.3  
V
4)  
CP input voltages  
(CP–, CP+)  
V
CP output voltage  
VCPO  
ICPO  
–0.3  
5.3  
5
V
CP output maximal sink  
current  
mA  
High side ground, voltage  
transient  
dVGNDH/dt –50  
50  
2
V/ns  
ESD Capability  
VESD  
PD  
kV  
5)Human  
Body Model  
6)  
Package power disipation  
@TA = 25°C  
1.4  
90  
W
7)  
Thermal resistance (both  
chips active), junction to  
ambient  
RTHJA  
K/W  
Final Datasheet  
10  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
Parameter  
Symbol  
Limit Values  
Unit Remarks  
min.  
max.  
6)  
Thermal resistance (high  
side chip), junction to  
ambient  
RTHJA(HS)  
110  
K/W  
6)  
Thermal resistance (low  
side chip), junction to  
ambient  
RTHJA(LS)  
110  
K/W  
Junction temperature  
TJ  
150  
150  
°C  
°C  
Storage temperature  
TS  
–55  
1)  
With reference to high side ground GNDH.  
With respect to both GND and GNDL.  
With respect to GNDL.  
2)  
3)  
4)  
5)  
6)  
7)  
Please note the different specifications for the operating range (section 5.2).  
According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kseries resistor).  
Considering Rth(both chips active)=90K/W  
Device soldered to reference PCB without cooling area  
5.2  
Operating Range  
Note: Within the operating range the IC operates as described in the functional  
description. Unless otherwise noted all parameters refer to GND.  
Parameter  
Symbol  
Limit Values  
max.  
Unit Remarks  
min.  
High side ground  
GNDH  
VSH  
VSL  
VIN  
–1200  
14  
1200  
18  
V
1)  
High side supply voltage  
Low side supply voltage  
V
2)  
14  
18  
V
Logic input voltages  
(InH, InL, SD)  
0
5
V
V
V
OP input voltages  
(OP–, OP+)  
VOP  
VCP  
–0.1  
–0.1  
2
2
CP input voltages  
(CP–, CP+)  
Final Datasheet  
11  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
Parameter  
Symbol  
Limit Values  
Unit Remarks  
min.  
max.  
Junction temperature  
TJ  
–40  
105  
°C  
°C  
Industrial  
applications,  
useful  
lifetime  
87600h  
Junction temperature  
TJ  
–40  
125  
Other  
applications,  
useful  
lifetime  
15000h  
1)  
With reference to high side ground GNDH.  
With respect to both GND and GNDL.  
2)  
5.3  
Electrical Characteristics  
Note: The electrical characteristics involve the spread of values guaranteed for the  
supply voltages, load and junction temperature given below. Typical values  
represent the median values, which are related to production processes. Unless  
otherwise noted all voltages are given with respect to ground (GND).  
VSL = VSH – GNDH = 15V, CL = 1nF, TA = 25°C. Positive currents are assumed  
to be flowing into pins.  
Voltage Supply  
Parameter  
Symbol  
Limit Values  
min. typ max.  
Unit Test Condition  
High side  
leakage current  
IGNDH  
IVSH  
0
µA  
GNDH = 1.2kV  
GNDL = 0V  
VSH = 15V1)  
VSH = 15V1)  
TJ = 125 °C  
High side quiescent  
supply current  
2.4  
2.3  
3.2  
mA  
mA  
3.2  
13.5  
1)  
High side undervoltage VVSH  
lockout, upper threshold  
10.9  
12.2  
11.2  
1
V
V
V
1)  
High side undervoltage VVSH  
lockout, lower threshold  
High side undervoltage VVSH  
0.7  
1.3  
lockout hysteresis  
Final Datasheet  
12  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
Voltage Supply (cont’d)  
Parameter  
Symbol  
Limit Values  
min. typ max.  
Unit Test Condition  
Low side quiescent  
supply current  
IVSL  
3.9  
3.9  
5.0  
5.5  
mA  
mA  
VSL = 15V  
VSL = 15V  
TJ = 125 °C  
Low side undervoltage VVSL  
lockout, upper threshold  
10.7  
12  
11  
1
13.3  
V
V
V
Low side undervoltage VVSL  
lockout, lower threshold  
Low side undervoltage VVSL  
0.7  
1.3  
lockout hysteresis  
1)  
With reference to high side ground GNDH.  
Logic Inputs  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ  
max.  
Logic “1” input voltages VIN  
(InH, InL, SD)  
2
V
V
Logic “0” input voltages VIN  
(InH, InL, SD)  
0.8  
Logic “1” input currents IIN  
(InH, InL)  
40 55  
µA  
µA  
µA  
µA  
VIN = 5V  
VIN = 0V  
VIN = 5V  
VIN = 0V  
Logic “0” input currents IIN  
(InH, InL)  
0
0
Logic “1” input currents IIN  
(SD)  
Logic “0” input currents IIN  
(SD)  
–60  
–40  
Final Datasheet  
13  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
Gate Drivers  
Parameter  
Symbol  
Limit Values  
min. typ max.  
1.4 1.7  
Unit Test Condition  
High side high level  
output voltage  
VVSH  
VOutH  
V
V
V
V
A
A
V
V
IOutH = –1mA  
VInH = 5V  
1)  
High side low level  
output voltage  
VOutH  
0.1  
IOutH = 1mA  
VInH = 0V  
Low side high level  
output voltage  
VVSL  
VOutL  
1.4 1.7  
IOutL = –1mA  
VInL = 5V  
Low side low level  
output voltage  
VOutL  
0.1  
–1  
IOutL = 1mA  
VInL = 0V  
Output high peak  
current (OutL, OutH)  
IOut  
VIN = 5V  
VOut = 0V  
Output low peak current IOut  
(OutL, OutH)  
2
VIN = 0V  
VOut = 15V  
1)  
High side active low  
clamping  
VOutH  
2.6  
2.7  
3
InH =0V, VSH open  
IOutH =200mA  
3.2  
InH =0V, VSH open  
IOutH =200mA  
TJ = 125 °C  
Low side active low  
clamping  
VOutL  
2.6  
2.7  
3
V
V
InL =0V, VSL open  
IOutL =200mA  
3.2  
InL =0V, VSL open  
IOutL =200mA  
TJ = 125 °C  
1)  
With reference to high side ground GNDH.  
Dynamic Characteristics  
Parameter  
Symbol  
Limit Values  
Unit Test Condition  
min. typ  
max.  
Turn-on propagation  
delay  
tON  
85  
105  
ns  
ns  
GNDH = 0V  
20% Vout  
95  
120  
GNDH = 0V  
20% Vout  
TJ = 125 °C  
Final Datasheet  
14  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
Dynamic Characteristics (cont’d)  
Parameter  
Symbol  
Limit Values  
min. typ max.  
Unit Test Condition  
Turn-off propagation  
delay  
tOFF  
85  
115  
ns  
ns  
80% Vout  
100  
130  
80% Vout  
TJ = 125 °C  
Shutdown propagation tSD  
delay  
85  
115  
130  
ns  
ns  
80% Vout  
100  
80% Vout  
TJ = 125 °C  
Turn-on rise time  
Turn-off fall time  
tr  
tf  
20  
30  
40  
50  
ns  
ns  
20% to 80% Vout  
20% to 80% Vout  
TJ = 125 °C  
20  
25  
35  
40  
ns  
ns  
80% to 20% Vout  
80% to 20% Vout  
TJ = 125 °C  
Delay mismatch (high & t  
low side turn-on/off)  
15  
15  
25  
30  
ns  
ns  
TJ = 25°C  
see Figure 6  
TJ = 125°C  
see Figure 6  
1)  
Minimum turn-on input tpON  
(InH, InL) pulse width  
50  
55  
50  
55  
75  
80  
75  
80  
ns  
ns  
ns  
ns  
1) TJ = 125°C  
1)  
Minimum turn-off input tpOFF  
(InH, InL) pulse width  
1) TJ = 125 °C  
1)  
InH-Pulses shorter than the “minimum turn-on(off) input pulse width” are prolonged to 50ns (See Figure 7). InL-  
Input doesn´t have this feature.  
General Purpose Operational Amplifier OP  
Parameter  
Symbol  
Limit Values  
min. typ max.  
10  
Unit Test Condition  
OP input offset voltage VIN  
–10  
0
mV  
OP input offset voltage VDrift  
drift  
±15  
µV/K  
OP input high currents IIN  
(OP–, OP+)  
0
0.2  
µA  
VIN = 2V  
Final Datasheet  
15  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
General Purpose Operational Amplifier OP (cont’d)  
Parameter  
Symbol  
Limit Values  
min. typ max.  
Unit Test Condition  
OP input low currents  
(OP–, OP+)  
IIN  
–0.2  
4.9  
0
µA  
V
VIN = 0V  
OP high output voltage VOPO  
OP low output voltage VOPO  
VOP– = 0V  
VOP+ = 2V  
0.1  
–5  
V
VOP– = 2V  
VOP+ = 0V  
OP output source  
current  
IOPO  
mA  
VOP+ = 2V  
VOP– = 0V  
VOPO = 0V  
OP output sink current IOPO  
5
mA  
VOP+ = 0V  
VOP– = 2V  
VOPO = 5V  
OP open loop gain  
AOL  
120  
20  
dB  
1)  
1)  
OP gain-bandwidth  
product  
A x BW  
MHz  
OP phase margin 2)  
Φ
70  
°
1)  
Design value  
2)  
Due to inevitable parasitics a minimal gain of 3 is recommended  
General Purpose Comparator CP  
Parameter  
Symbol  
Limit Values  
min. typ max.  
–45 –30 –15  
20 35  
Unit Test Condition  
CP input offset voltage VIN  
mV  
µA  
µA  
V
VCP+ = VCP-  
VCP– = 5V  
VCP+ = 0V  
CP input high current  
CP input low current  
ICP–  
ICP+  
–35  
–20  
CP low output voltage VCPO  
0.2  
VCP+ = 2V  
ICPO = 1mA  
CP output leakage  
current  
ICPO  
5
µA  
VCP+ = 0V  
VCP– = 2V  
VCPO = 5V  
Final Datasheet  
16  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Electrical Parameters  
General Purpose Comparator CP (cont’d)  
Parameter  
Symbol  
Limit Values  
min. typ max.  
Unit Test Condition  
CP switch-on delay  
td  
100  
ns  
ns  
RCPO = 4.7kΩ  
Vres = 5V  
VCPO = 4V  
CP switch-off delay  
td  
300  
RCPO = 4.7kΩ  
Vres = 5V  
VCPO = 1V  
Final Datasheet  
17  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Package Outline  
6
Package Outline  
Note: dimensions are given in mm.  
6.1  
Soldering Profile  
The soldering profile qualified for 2ED020I12-FI (according to the standard IPC/JEDEC  
J-STD-020C) is moisture sensitivity level 3. The peak reflow temperature for its package  
(volume < 350 mm3) is 260 +0/-5 °C.  
Final Datasheet  
18  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Diagrams  
7
Diagrams  
InH/L  
2V  
0.8V  
tr  
tOFF  
80%  
80%  
OutH/L  
20%  
20%  
tf  
tON  
Figure 4 Switching Time Waveform Definition  
/SD  
0.8V  
tSD  
80%  
OutH/L  
Figure 5 Shutdown Waveform Definition  
Final Datasheet  
19  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Diagrams  
InL  
2V  
2V  
0.8V  
0.8V  
InH  
OutL  
80%  
20%  
80%  
20%  
OutH  
tOFFH  
tONL  
tOFFL  
tONH  
t = max (|tONH - tOFFL| , |tOFFH - tONL|)  
Figure 6 Delay Matching Waveform Definitions  
InH  
OutH  
50ns  
50ns  
Figure 7 Short InH-Pulses Prolongation  
Final Datasheet  
20  
September 2007  
High and Low Side Driver  
2ED020I12-FI  
Final Data  
Application Advices  
8
Application Advices  
8.1  
Operational Amplifier  
To minimize the current consumption when the operational amplifier is not used, it is  
necessary to connect both inputs properly, e.g connect OP+ to 5V and OP- to 0V or vice  
versa.  
On the other hand, the operational amplifier cannot operate with a follower configuration  
, i.e OP- = OPO. A minimum gain of 3 has to be used so that its output OPO has a stable  
behaviour.  
8.2  
Power Supply  
a) The connection of a capacitor (>10nF) as close as possible to the supply pins VSH,  
VSL is recommended for avoiding that possible oscillations in the supply voltage can  
cause erroneous operation of the output driver stage. Total value of capacitance  
connected to the supply terminals has to be determined by taking into account  
gatecharge, peak current, supply voltage and kind of power supply.  
b) If a bootstrap power supply for the high side driver is applied, a resistor of 10Ω  
minimum in series with the bootstrap diode is recommended.  
Final Datasheet  
21  
September 2007  
Total Quality Management  
Qualität hat für uns eine umfassende  
Bedeutung. Wir wollen allen Ihren  
Ansprüchen in der bestmöglichen  
Weise gerecht werden. Es geht uns also  
nicht nur um die Produktqualität –  
unsere Anstrengungen gelten  
gleichermaßen der Lieferqualität und  
Logistik, dem Service und Support  
sowie allen sonstigen Beratungs- und  
Betreuungsleistungen.  
Quality takes on an all encompassing  
significance at Infineon AG. For us it  
means living up to each and every one  
of your demands in the best possible  
way. So we are not only concerned with  
product quality. We direct our efforts  
equally at quality of supply and logistics,  
service and support, as well as all the  
other ways in which we advise and  
attend to you.  
Dazu gehört eine bestimmte  
Part of this is the very special attitude of  
our staff. Total Quality in thought and  
deed, towards co-workers, suppliers  
and you, our customer. Our guideline is  
“do everything with zero defects”, in an  
open manner that is demonstrated  
beyond your immediate workplace, and  
to constantly improve.  
Geisteshaltung unserer Mitarbeiter.  
Total Quality im Denken und Handeln  
gegenüber Kollegen, Lieferanten und  
Ihnen, unserem Kunden. Unsere  
Leitlinie ist jede Aufgabe mit „Null  
Fehlern“ zu lösen – in offener  
Sichtweise auch über den eigenen  
Arbeitsplatz hinaus – und uns ständig  
zu verbessern.  
Throughout the corporation we also  
think in terms of Time Optimized  
Processes (top), greater speed on our  
part to give you that decisive  
competitive edge.  
Unternehmensweit orientieren wir uns  
dabei auch an „top“ (Time Optimized  
Processes), um Ihnen durch größere  
Schnelligkeit den entscheidenden  
Wettbewerbsvorsprung zu verschaffen.  
Give us the chance to prove the best of  
performance through the best of quality  
– you will be convinced.  
Geben Sie uns die Chance, hohe  
Leistung durch umfassende Qualität zu  
beweisen.  
Wir werden Sie überzeugen.  
h t t p : / / w w w . i n f i n e o n . c o m  
Published by Infineon Technologies AG  

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